^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * bsbe1.h - ALPS BSBE1 tuner support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * the project's page is at https://linuxtv.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef BSBE1_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define BSBE1_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static u8 alps_bsbe1_inittab[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 0x01, 0x15, /* XTAL = 4MHz, VCO = 352 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 0x02, 0x30, /* MCLK = 88 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 0x03, 0x00, /* ACR output 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 0x05, 0x05, /* I2CT = 0, SCLT = 1, SDAT = 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 0x06, 0x00, /* DAC output 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 0x09, 0x00, /* FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 0x0c, 0x51, /* OP1/OP0 normal, val = 1 (LNB power on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 0x0d, 0x82, /* DC offset compensation = on, beta_agc1 = 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 0x0f, 0x92, /* AGC1R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 0x10, 0x34, /* AGC2O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 0x11, 0x84, /* TLSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 0x12, 0xb9, /* CFD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 0x15, 0xc9, /* lock detector threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 0x28, 0x00, /* out imp: normal, type: parallel, FEC mode: QPSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 0x33, 0xfc, /* RS control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0x34, 0x93, /* count viterbi bit errors per 2E18 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 0xff, 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int alps_bsbe1_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 aclk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u8 bclk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) stv0299_writereg(fe, 0x13, aclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) stv0299_writereg(fe, 0x14, bclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int alps_bsbe1_tuner_set_params(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct dtv_frontend_properties *p = &fe->dtv_property_cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u8 data[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct i2c_adapter *i2c = fe->tuner_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) if ((p->frequency < 950000) || (p->frequency > 2150000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) div = p->frequency / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) data[0] = (div >> 8) & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) data[1] = div & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) data[3] = 0xe0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (fe->ops.i2c_gate_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) fe->ops.i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ret = i2c_transfer(i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return (ret != 1) ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static struct stv0299_config alps_bsbe1_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .demod_address = 0x68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .inittab = alps_bsbe1_inittab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .mclk = 88000000UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .invert = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .skip_reinit = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .min_delay_ms = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .set_symbol_rate = alps_bsbe1_set_symbol_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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