Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)     Auvitek AU8522 QAM/8VSB demodulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)     Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)     Copyright (C) 2008 Devin Heitmueller <dheitmueller@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)     Copyright (C) 2005-2008 Auvitek International, Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)     Copyright (C) 2012 Michael Krufky <mkrufky@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <media/dvb_frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "au8522_priv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) static int debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define dprintk(arg...)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)   do { if (debug)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	 printk(arg);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)   } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* Despite the name "hybrid_tuner", the framework works just as well for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)    hybrid demodulators as well... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static LIST_HEAD(hybrid_tuner_instance_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static DEFINE_MUTEX(au8522_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /* 16 bit registers, 8 bit values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	u8 buf[] = { (reg >> 8) | 0x80, reg & 0xff, data };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct i2c_msg msg = { .addr = state->config.demod_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			       .flags = 0, .buf = buf, .len = 3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	ret = i2c_transfer(state->i2c, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, ret == %i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		       __func__, reg, data, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	return (ret != 1) ? -1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) EXPORT_SYMBOL(au8522_writereg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) u8 au8522_readreg(struct au8522_state *state, u16 reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u8 b0[] = { (reg >> 8) | 0x40, reg & 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u8 b1[] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		{ .addr = state->config.demod_address, .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		  .buf = b0, .len = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		{ .addr = state->config.demod_address, .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		  .buf = b1, .len = 1 } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	ret = i2c_transfer(state->i2c, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	if (ret != 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		printk(KERN_ERR "%s: readreg error (ret == %i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		       __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	return b1[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) EXPORT_SYMBOL(au8522_readreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct au8522_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	dprintk("%s(%d)\n", __func__, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (state->operational_mode == AU8522_ANALOG_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		/* We're being asked to manage the gate even though we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		   not in digital mode.  This can occur if we get switched
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		   over to analog mode before the dvb_frontend kernel thread
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		   has completely shutdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		return au8522_writereg(state, 0x106, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		return au8522_writereg(state, 0x106, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) EXPORT_SYMBOL(au8522_i2c_gate_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) int au8522_analog_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct au8522_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	dprintk("%s(%d)\n", __func__, enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return au8522_writereg(state, 0x106, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		return au8522_writereg(state, 0x106, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) EXPORT_SYMBOL(au8522_analog_i2c_gate_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Reset the demod hardware and reset all of the configuration registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)    to a default state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int au8522_get_state(struct au8522_state **state, struct i2c_adapter *i2c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		     u8 client_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	mutex_lock(&au8522_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	ret = hybrid_tuner_request_state(struct au8522_state, (*state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 					 hybrid_tuner_instance_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 					 i2c, client_address, "au8522");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	mutex_unlock(&au8522_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) EXPORT_SYMBOL(au8522_get_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) void au8522_release_state(struct au8522_state *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	mutex_lock(&au8522_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (state != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		hybrid_tuner_release_state(state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	mutex_unlock(&au8522_list_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) EXPORT_SYMBOL(au8522_release_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int au8522_led_gpio_enable(struct au8522_state *state, int onoff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct au8522_led_config *led_config = state->config.led_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	/* bail out if we can't control an LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (!led_config || !led_config->gpio_output ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	    !led_config->gpio_output_enable || !led_config->gpio_output_disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	val = au8522_readreg(state, 0x4000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			     (led_config->gpio_output & ~0xc000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	if (onoff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		/* enable GPIO output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		val &= ~((led_config->gpio_output_enable >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		val |=  (led_config->gpio_output_enable & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		/* disable GPIO output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		val &= ~((led_config->gpio_output_disable >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		val |=  (led_config->gpio_output_disable & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	return au8522_writereg(state, 0x8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			       (led_config->gpio_output & ~0xc000), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* led = 0 | off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)  * led = 1 | signal ok
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)  * led = 2 | signal strong
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)  * led < 0 | only light led if leds are currently off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int au8522_led_ctrl(struct au8522_state *state, int led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	struct au8522_led_config *led_config = state->config.led_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	int i, ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	/* bail out if we can't control an LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (!led_config || !led_config->gpio_leds ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	    !led_config->num_led_states || !led_config->led_states)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (led < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		/* if LED is already lit, then leave it as-is */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		if (state->led_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			led *= -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	/* toggle LED if changing state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (state->led_state != led) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dprintk("%s: %d\n", __func__, led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		au8522_led_gpio_enable(state, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		val = au8522_readreg(state, 0x4000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				     (led_config->gpio_leds & ~0xc000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		/* start with all leds off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		for (i = 0; i < led_config->num_led_states; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			val &= ~led_config->led_states[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		/* set selected LED state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (led < led_config->num_led_states)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			val |= led_config->led_states[led];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		else if (led_config->num_led_states)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			val |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			led_config->led_states[led_config->num_led_states - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		ret = au8522_writereg(state, 0x8000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				      (led_config->gpio_leds & ~0xc000), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		state->led_state = led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		if (led == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			au8522_led_gpio_enable(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) EXPORT_SYMBOL(au8522_led_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int au8522_init(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct au8522_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	dprintk("%s()\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	state->operational_mode = AU8522_DIGITAL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	/* Clear out any state associated with the digital side of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	   chip, so that when it gets powered back up it won't think
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	   that it is already tuned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	state->current_frequency = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	state->current_modulation = VSB_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	au8522_writereg(state, 0xa4, 1 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	au8522_i2c_gate_ctrl(fe, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) EXPORT_SYMBOL(au8522_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int au8522_sleep(struct dvb_frontend *fe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	struct au8522_state *state = fe->demodulator_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	dprintk("%s()\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	/* Only power down if the digital side is currently using the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	if (state->operational_mode == AU8522_ANALOG_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		/* We're not in one of the expected power modes, which means
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		   that the DVB thread is probably telling us to go to sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		   even though the analog frontend has already started using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		   the chip.  So ignore the request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	/* turn off led */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	au8522_led_ctrl(state, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	/* Power down the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	au8522_writereg(state, 0xa4, 1 << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	state->current_frequency = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) EXPORT_SYMBOL(au8522_sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) module_param(debug, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MODULE_PARM_DESC(debug, "Enable verbose debug messages");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) MODULE_AUTHOR("Steven Toth");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) MODULE_LICENSE("GPL");