^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Auvitek AU8522 QAM/8VSB demodulator driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __AU8522_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __AU8522_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/dvb/frontend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum au8522_if_freq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) AU8522_IF_6MHZ = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) AU8522_IF_4MHZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) AU8522_IF_3_25MHZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct au8522_led_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u16 vsb8_strong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u16 qam64_strong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u16 qam256_strong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u16 gpio_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /* unset hi bits, set low bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u16 gpio_output_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u16 gpio_output_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u16 gpio_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u8 *led_states;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int num_led_states;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct au8522_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* the demodulator's i2c address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u8 demod_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Return lock status based on tuner lock, or demod lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define AU8522_TUNERLOCKING 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define AU8522_DEMODLOCKING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u8 status_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct au8522_led_config *led_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) enum au8522_if_freq vsb_if;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) enum au8522_if_freq qam_if;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #if IS_REACHABLE(CONFIG_DVB_AU8522_DTV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern struct dvb_frontend *au8522_attach(const struct au8522_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct i2c_adapter *i2c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct dvb_frontend *au8522_attach(const struct au8522_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct i2c_adapter *i2c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #endif /* CONFIG_DVB_AU8522 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Other modes may need to be added later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) enum au8522_video_input {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) AU8522_COMPOSITE_CH1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) AU8522_COMPOSITE_CH2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) AU8522_COMPOSITE_CH3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) AU8522_COMPOSITE_CH4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) AU8522_COMPOSITE_CH4_SIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) AU8522_SVIDEO_CH13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) AU8522_SVIDEO_CH24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enum au8522_audio_input {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) AU8522_AUDIO_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) AU8522_AUDIO_SIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif /* __AU8522_H__ */