^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Texas Instruments' Message Manager Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Nishanth Menon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define pr_fmt(fmt) "%s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mailbox_controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/soc/ti/ti-msgmgr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define Q_DATA_OFFSET(proxy, queue, reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define Q_STATE_OFFSET(queue) ((queue) * 0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SPROXY_THREAD_OFFSET(tid) (0x1000 * (tid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SPROXY_THREAD_DATA_OFFSET(tid, reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) (SPROXY_THREAD_OFFSET(tid) + ((reg) * 0x4) + 0x4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SPROXY_THREAD_STATUS_OFFSET(tid) (SPROXY_THREAD_OFFSET(tid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SPROXY_THREAD_STATUS_COUNT_MASK (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SPROXY_THREAD_CTRL_OFFSET(tid) (0x1000 + SPROXY_THREAD_OFFSET(tid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SPROXY_THREAD_CTRL_DIR_MASK (0x1 << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * @queue_id: Queue Number for this path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @proxy_id: Proxy ID representing the processor in SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @is_tx: Is this a receive path?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct ti_msgmgr_valid_queue_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u8 queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u8 proxy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) bool is_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * struct ti_msgmgr_desc - Description of message manager integration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @queue_count: Number of Queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @max_message_size: Message size in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @max_messages: Number of messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @data_first_reg: First data register for proxy data region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @data_last_reg: Last data register for proxy data region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @status_cnt_mask: Mask for getting the status value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @status_err_mask: Mask for getting the error value, if applicable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @tx_polled: Do I need to use polled mechanism for tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @tx_poll_timeout_ms: Timeout in ms if polled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @valid_queues: List of Valid queues that the processor can access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @data_region_name: Name of the proxy data region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @status_region_name: Name of the proxy status region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @ctrl_region_name: Name of the proxy control region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @num_valid_queues: Number of valid queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * @is_sproxy: Is this an Secure Proxy instance?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * This structure is used in of match data to describe how integration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * for a specific compatible SoC is done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct ti_msgmgr_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u8 queue_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 max_message_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 max_messages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u8 data_first_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 data_last_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 status_cnt_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u32 status_err_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) bool tx_polled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int tx_poll_timeout_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const struct ti_msgmgr_valid_queue_desc *valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) const char *data_region_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) const char *status_region_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) const char *ctrl_region_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int num_valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) bool is_sproxy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * struct ti_queue_inst - Description of a queue instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * @name: Queue Name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * @queue_id: Queue Identifier as mapped on SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * @proxy_id: Proxy Identifier as mapped on SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @irq: IRQ for Rx Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @is_tx: 'true' if transmit queue, else, 'false'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @queue_buff_start: First register of Data Buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * @queue_buff_end: Last (or confirmation) register of Data buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @queue_state: Queue status register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @queue_ctrl: Queue Control register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @chan: Mailbox channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @rx_buff: Receive buffer pointer allocated at probe, max_message_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct ti_queue_inst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) char name[30];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 proxy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) bool is_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void __iomem *queue_buff_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __iomem *queue_buff_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void __iomem *queue_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void __iomem *queue_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mbox_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 *rx_buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * struct ti_msgmgr_inst - Description of a Message Manager Instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @dev: device pointer corresponding to the Message Manager instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @desc: Description of the SoC integration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * @queue_proxy_region: Queue proxy region where queue buffers are located
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @queue_state_debug_region: Queue status register regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @queue_ctrl_region: Queue Control register regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @num_valid_queues: Number of valid queues defined for the processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Note: other queues are probably reserved for other processors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * in the SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @qinsts: Array of valid Queue Instances for the Processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @mbox: Mailbox Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @chans: Array for channels corresponding to the Queue Instances.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct ti_msgmgr_inst {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) const struct ti_msgmgr_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void __iomem *queue_proxy_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) void __iomem *queue_state_debug_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) void __iomem *queue_ctrl_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u8 num_valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct ti_queue_inst *qinsts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct mbox_controller mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct mbox_chan *chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * @d: Description of message manager
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * @qinst: Queue instance for which we check the number of pending messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * Return: number of messages pending in the queue (0 == no pending messages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct ti_queue_inst *qinst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) u32 status_cnt_mask = d->status_cnt_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * We cannot use relaxed operation here - update may happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * real-time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) val = readl(qinst->queue_state) & status_cnt_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) val >>= __ffs(status_cnt_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * ti_msgmgr_queue_is_error() - Check to see if there is queue error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @d: Description of message manager
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @qinst: Queue instance for which we check the number of pending messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * Return: true if error, else false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static inline bool ti_msgmgr_queue_is_error(const struct ti_msgmgr_desc *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct ti_queue_inst *qinst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Msgmgr has no error detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (!d->is_sproxy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * We cannot use relaxed operation here - update may happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * real-time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) val = readl(qinst->queue_state) & d->status_err_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return val ? true : false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @irq: Interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @p: Channel Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * Return: -EINVAL if there is no instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * IRQ_NONE if the interrupt is not ours.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * IRQ_HANDLED if the rx interrupt was successfully handled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct mbox_chan *chan = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct device *dev = chan->mbox->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) const struct ti_msgmgr_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int msg_count, num_words;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct ti_msgmgr_message message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) void __iomem *data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) u32 *word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (WARN_ON(!inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(dev, "no platform drv data??\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* Do I have an invalid interrupt source? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (qinst->is_tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) desc = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (ti_msgmgr_queue_is_error(desc, qinst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) dev_err(dev, "Error on Rx channel %s\n", qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Do I actually have messages to read? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!msg_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Shared IRQ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) dev_dbg(dev, "Spurious event - 0 pending data!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * I have no idea about the protocol being used to communicate with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * remote producer - 0 could be valid data, so I wont make a judgement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * of how many bytes I should be reading. Let the client figure this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * out.. I just read the full message and pass it on..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) message.len = desc->max_message_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) message.buf = (u8 *)qinst->rx_buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * NOTE about register access involved here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * the hardware block is implemented with 32bit access operations and no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * support for data splitting. We don't want the hardware to misbehave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * with sub 32bit access - For example: if the last register read is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * split into byte wise access, it can result in the queue getting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * stuck or indeterminate behavior. An out of order read operation may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * result in weird data results as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * we depend on readl for the purpose.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * Also note that the final register read automatically marks the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * queue message as read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) num_words = (desc->max_message_size / sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) num_words; num_words--, data_reg += sizeof(u32), word_data++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) *word_data = readl(data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * Last register read automatically clears the IRQ if only 1 message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * is pending - so send the data up the stack..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * NOTE: Client is expected to be as optimal as possible, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * we invoke the handler in IRQ context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mbox_chan_received_data(chan, (void *)&message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * @chan: Channel Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * Return: 'true' if there is pending rx data, 'false' if there is none.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct device *dev = chan->mbox->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) const struct ti_msgmgr_desc *desc = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (qinst->is_tx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (ti_msgmgr_queue_is_error(desc, qinst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dev_err(dev, "Error on channel %s\n", qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return msg_count ? true : false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * ti_msgmgr_last_tx_done() - See if all the tx messages are sent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * @chan: Channel pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * Return: 'true' is no pending tx data, 'false' if there are any.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct device *dev = chan->mbox->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) const struct ti_msgmgr_desc *desc = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) int msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!qinst->is_tx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (ti_msgmgr_queue_is_error(desc, qinst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_err(dev, "Error on channel %s\n", qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (desc->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* In secure proxy, msg_count indicates how many we can send */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return msg_count ? true : false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* if we have any messages pending.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) return msg_count ? false : true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * ti_msgmgr_send_data() - Send data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * @chan: Channel Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * @data: ti_msgmgr_message * Message Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Return: 0 if all goes good, else appropriate error messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct device *dev = chan->mbox->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) const struct ti_msgmgr_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int num_words, trail_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct ti_msgmgr_message *message = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) void __iomem *data_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u32 *word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (WARN_ON(!inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) dev_err(dev, "no platform drv data??\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) desc = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ti_msgmgr_queue_is_error(desc, qinst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev_err(dev, "Error on channel %s\n", qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (desc->max_message_size < message->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) dev_err(dev, "Queue %s message length %zu > max %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) qinst->name, message->len, desc->max_message_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* NOTE: Constraints similar to rx path exists here as well */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) for (data_reg = qinst->queue_buff_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) num_words = message->len / sizeof(u32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) word_data = (u32 *)message->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) num_words; num_words--, data_reg += sizeof(u32), word_data++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) writel(*word_data, data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) trail_bytes = message->len % sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (trail_bytes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u32 data_trail = *word_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Ensure all unused data is 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) writel(data_trail, data_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) data_reg++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * 'data_reg' indicates next register to write. If we did not already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * write on tx complete reg(last reg), we must do so for transmit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (data_reg <= qinst->queue_buff_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) writel(0, qinst->queue_buff_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * ti_msgmgr_queue_rx_irq_req() - RX IRQ request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * @dev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * @d: descriptor for ti_msgmgr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * @qinst: Queue instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * @chan: Channel pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static int ti_msgmgr_queue_rx_irq_req(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) const struct ti_msgmgr_desc *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct ti_queue_inst *qinst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) char of_rx_irq_name[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) snprintf(of_rx_irq_name, sizeof(of_rx_irq_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) "rx_%03d", d->is_sproxy ? qinst->proxy_id : qinst->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* Get the IRQ if not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (qinst->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) np = of_node_get(dev->of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) qinst->irq = of_irq_get_byname(np, of_rx_irq_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (qinst->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) dev_err(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) "QID %d PID %d:No IRQ[%s]: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) qinst->queue_id, qinst->proxy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) of_rx_irq_name, qinst->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return qinst->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* With the expectation that the IRQ might be shared in SoC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) IRQF_SHARED, qinst->name, chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) qinst->irq, qinst->name, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * ti_msgmgr_queue_startup() - Startup queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * @chan: Channel pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * Return: 0 if all goes good, else return corresponding error message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static int ti_msgmgr_queue_startup(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct device *dev = chan->mbox->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) struct ti_msgmgr_inst *inst = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) const struct ti_msgmgr_desc *d = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) int msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * If sproxy is starting and can send messages, we are a Tx thread,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * else Rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (d->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) qinst->is_tx = (readl(qinst->queue_ctrl) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) SPROXY_THREAD_CTRL_DIR_MASK) ? false : true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) msg_count = ti_msgmgr_queue_get_num_messages(d, qinst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (!msg_count && qinst->is_tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) dev_err(dev, "%s: Cannot transmit with 0 credits!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) qinst->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (!qinst->is_tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* Allocate usage buffer for rx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (!qinst->rx_buff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* Request IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ret = ti_msgmgr_queue_rx_irq_req(dev, d, qinst, chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) kfree(qinst->rx_buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * ti_msgmgr_queue_shutdown() - Shutdown the queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) * @chan: Channel pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct ti_queue_inst *qinst = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (!qinst->is_tx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) free_irq(qinst->irq, chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) kfree(qinst->rx_buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * ti_msgmgr_of_xlate() - Translation of phandle to queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * @mbox: Mailbox controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * @p: phandle pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * Return: Mailbox channel corresponding to the queue, else return error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) const struct of_phandle_args *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) struct ti_msgmgr_inst *inst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) int req_qid, req_pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct ti_queue_inst *qinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) const struct ti_msgmgr_desc *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) int i, ncells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) inst = container_of(mbox, struct ti_msgmgr_inst, mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (WARN_ON(!inst))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) d = inst->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (d->is_sproxy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) ncells = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) ncells = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (p->args_count != ncells) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) dev_err(inst->dev, "Invalid arguments in dt[%d]. Must be %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) p->args_count, ncells);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (ncells == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) req_qid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) req_pid = p->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) req_qid = p->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) req_pid = p->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (d->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (req_pid >= d->num_valid_queues)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) qinst = &inst->qinsts[req_pid];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return qinst->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) i++, qinst++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return qinst->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %pOFn\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) req_qid, req_pid, p->np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) return ERR_PTR(-ENOENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * ti_msgmgr_queue_setup() - Setup data structures for each queue instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * @idx: index of the queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * @dev: pointer to the message manager device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * @np: pointer to the of node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * @inst: Queue instance pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * @d: Message Manager instance description data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * @qd: Queue description data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * @qinst: Queue instance pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * @chan: pointer to mailbox channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * Return: 0 if all went well, else return corresponding error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int ti_msgmgr_queue_setup(int idx, struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct ti_msgmgr_inst *inst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) const struct ti_msgmgr_desc *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) const struct ti_msgmgr_valid_queue_desc *qd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct ti_queue_inst *qinst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) char *dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) qinst->proxy_id = qd->proxy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) qinst->queue_id = qd->queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (qinst->queue_id > d->queue_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) idx, qinst->queue_id, d->queue_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (d->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) qinst->queue_buff_start = inst->queue_proxy_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) d->data_first_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) qinst->queue_buff_end = inst->queue_proxy_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) d->data_last_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) qinst->queue_state = inst->queue_state_debug_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) SPROXY_THREAD_STATUS_OFFSET(qinst->proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) qinst->queue_ctrl = inst->queue_ctrl_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) SPROXY_THREAD_CTRL_OFFSET(qinst->proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) /* XXX: DONOT read registers here!.. Some may be unusable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) dir = "thr";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) dev_name(dev), dir, qinst->proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) qinst->queue_buff_start = inst->queue_proxy_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) d->data_first_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) qinst->queue_buff_end = inst->queue_proxy_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) d->data_last_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) qinst->queue_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) inst->queue_state_debug_region +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) Q_STATE_OFFSET(qinst->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) qinst->is_tx = qd->is_tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) dir = qinst->is_tx ? "tx" : "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) dev_name(dev), dir, qinst->queue_id, qinst->proxy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) qinst->chan = chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /* Setup an error value for IRQ - Lazy allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) qinst->irq = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) chan->con_priv = qinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) idx, qinst->queue_id, qinst->proxy_id, qinst->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) qinst->queue_buff_start, qinst->queue_buff_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) /* Queue operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const struct mbox_chan_ops ti_msgmgr_chan_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .startup = ti_msgmgr_queue_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .shutdown = ti_msgmgr_queue_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .peek_data = ti_msgmgr_queue_peek_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .last_tx_done = ti_msgmgr_last_tx_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .send_data = ti_msgmgr_send_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /* Keystone K2G SoC integration details */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {.queue_id = 0, .proxy_id = 0, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) {.queue_id = 1, .proxy_id = 0, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {.queue_id = 2, .proxy_id = 0, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {.queue_id = 3, .proxy_id = 0, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) {.queue_id = 5, .proxy_id = 2, .is_tx = false,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {.queue_id = 56, .proxy_id = 1, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {.queue_id = 57, .proxy_id = 2, .is_tx = false,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {.queue_id = 58, .proxy_id = 3, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {.queue_id = 59, .proxy_id = 4, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {.queue_id = 60, .proxy_id = 5, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {.queue_id = 61, .proxy_id = 6, .is_tx = true,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static const struct ti_msgmgr_desc k2g_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .queue_count = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .max_message_size = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .max_messages = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .data_region_name = "queue_proxy_region",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .status_region_name = "queue_state_debug_region",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .data_first_reg = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .data_last_reg = 31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .tx_polled = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .valid_queues = k2g_valid_queues,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .num_valid_queues = ARRAY_SIZE(k2g_valid_queues),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .is_sproxy = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static const struct ti_msgmgr_desc am654_desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .queue_count = 190,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .num_valid_queues = 190,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .max_message_size = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .data_region_name = "target_data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .status_region_name = "rt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .ctrl_region_name = "scfg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .data_first_reg = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .data_last_reg = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .tx_polled = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .is_sproxy = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static const struct of_device_id ti_msgmgr_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {.compatible = "ti,k2g-message-manager", .data = &k2g_desc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {.compatible = "ti,am654-secure-proxy", .data = &am654_desc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) { /* Sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static int ti_msgmgr_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) const struct of_device_id *of_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) const struct ti_msgmgr_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) struct ti_msgmgr_inst *inst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) struct ti_queue_inst *qinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) struct mbox_controller *mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct mbox_chan *chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) int queue_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) int ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) const struct ti_msgmgr_valid_queue_desc *queue_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (!dev->of_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) dev_err(dev, "no OF information\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) of_id = of_match_device(ti_msgmgr_of_match, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (!of_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) dev_err(dev, "OF data missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) desc = of_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (!inst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) inst->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) inst->desc = desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) desc->data_region_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) inst->queue_proxy_region = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if (IS_ERR(inst->queue_proxy_region))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) return PTR_ERR(inst->queue_proxy_region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) desc->status_region_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) inst->queue_state_debug_region = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (IS_ERR(inst->queue_state_debug_region))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return PTR_ERR(inst->queue_state_debug_region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (desc->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) desc->ctrl_region_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) inst->queue_ctrl_region = devm_ioremap_resource(dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (IS_ERR(inst->queue_ctrl_region))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return PTR_ERR(inst->queue_ctrl_region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) dev_dbg(dev, "proxy region=%p, queue_state=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) inst->queue_proxy_region, inst->queue_state_debug_region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) queue_count = desc->num_valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (!queue_count || queue_count > desc->queue_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) dev_crit(dev, "Invalid Number of queues %d. Max %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) queue_count, desc->queue_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) inst->num_valid_queues = queue_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if (!qinst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) inst->qinsts = qinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (!chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) inst->chans = chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (desc->is_sproxy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct ti_msgmgr_valid_queue_desc sproxy_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) /* All proxies may be valid in Secure Proxy instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) for (i = 0; i < queue_count; i++, qinst++, chans++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) sproxy_desc.queue_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) sproxy_desc.proxy_id = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) ret = ti_msgmgr_queue_setup(i, dev, np, inst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) desc, &sproxy_desc, qinst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) chans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) /* Only Some proxies are valid in Message Manager */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) for (i = 0, queue_desc = desc->valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) i < queue_count; i++, qinst++, chans++, queue_desc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) ret = ti_msgmgr_queue_setup(i, dev, np, inst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) desc, queue_desc, qinst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) chans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) mbox = &inst->mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) mbox->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) mbox->ops = &ti_msgmgr_chan_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) mbox->chans = inst->chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) mbox->num_chans = inst->num_valid_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) mbox->txdone_irq = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) mbox->txdone_poll = desc->tx_polled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (desc->tx_polled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) mbox->txpoll_period = desc->tx_poll_timeout_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) mbox->of_xlate = ti_msgmgr_of_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) platform_set_drvdata(pdev, inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) ret = devm_mbox_controller_register(dev, mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dev_err(dev, "Failed to register mbox_controller(%d)\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static struct platform_driver ti_msgmgr_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .probe = ti_msgmgr_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .name = "ti-msgmgr",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .of_match_table = of_match_ptr(ti_msgmgr_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) module_platform_driver(ti_msgmgr_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) MODULE_DESCRIPTION("TI message manager driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) MODULE_AUTHOR("Nishanth Menon");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) MODULE_ALIAS("platform:ti-msgmgr");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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