^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2017-2019 Samuel Holland <samuel@sholland.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mailbox_controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define NUM_CHANS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define CTRL_REG(n) (0x0000 + 0x4 * ((n) / 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define CTRL_RX(n) BIT(0 + 8 * ((n) % 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define CTRL_TX(n) BIT(4 + 8 * ((n) % 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define REMOTE_IRQ_EN_REG 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define REMOTE_IRQ_STAT_REG 0x0050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LOCAL_IRQ_EN_REG 0x0060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LOCAL_IRQ_STAT_REG 0x0070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RX_IRQ(n) BIT(0 + 2 * (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define RX_IRQ_MASK 0x5555
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TX_IRQ(n) BIT(1 + 2 * (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TX_IRQ_MASK 0xaaaa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define FIFO_STAT_REG(n) (0x0100 + 0x4 * (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define FIFO_STAT_MASK GENMASK(0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MSG_STAT_REG(n) (0x0140 + 0x4 * (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MSG_STAT_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MSG_DATA_REG(n) (0x0180 + 0x4 * (n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct sun6i_msgbox {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct mbox_controller controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static bool sun6i_msgbox_peek_data(struct mbox_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static inline int channel_number(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return chan - chan->mbox->chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static inline struct sun6i_msgbox *to_sun6i_msgbox(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static irqreturn_t sun6i_msgbox_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct sun6i_msgbox *mbox = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) uint32_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Only examine channels that are currently enabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) status = readl(mbox->regs + LOCAL_IRQ_EN_REG) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) readl(mbox->regs + LOCAL_IRQ_STAT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (!(status & RX_IRQ_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) for (n = 0; n < NUM_CHANS; ++n) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct mbox_chan *chan = &mbox->controller.chans[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (!(status & RX_IRQ(n)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) while (sun6i_msgbox_peek_data(chan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) mbox_chan_received_data(chan, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* The IRQ can be cleared only once the FIFO is empty. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int sun6i_msgbox_send_data(struct mbox_chan *chan, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int n = channel_number(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) uint32_t msg = *(uint32_t *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Using a channel backwards gets the hardware into a bad state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (WARN_ON_ONCE(!(readl(mbox->regs + CTRL_REG(n)) & CTRL_TX(n))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) writel(msg, mbox->regs + MSG_DATA_REG(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mbox_dbg(mbox, "Channel %d sent 0x%08x\n", n, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int sun6i_msgbox_startup(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int n = channel_number(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* The coprocessor is responsible for setting channel directions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Flush the receive FIFO. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) while (sun6i_msgbox_peek_data(chan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) readl(mbox->regs + MSG_DATA_REG(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Enable the receive IRQ. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) spin_lock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) | RX_IRQ(n),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) mbox->regs + LOCAL_IRQ_EN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) spin_unlock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) mbox_dbg(mbox, "Channel %d startup complete\n", n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static void sun6i_msgbox_shutdown(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int n = channel_number(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Disable the receive IRQ. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) spin_lock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) & ~RX_IRQ(n),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) mbox->regs + LOCAL_IRQ_EN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) spin_unlock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Attempt to flush the FIFO until the IRQ is cleared. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) while (sun6i_msgbox_peek_data(chan))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) readl(mbox->regs + MSG_DATA_REG(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) } while (readl(mbox->regs + LOCAL_IRQ_STAT_REG) & RX_IRQ(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) mbox_dbg(mbox, "Channel %d shutdown complete\n", n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int n = channel_number(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * The hardware allows snooping on the remote user's IRQ statuses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * We consider a message to be acknowledged only once the receive IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * for that channel is cleared. Since the receive IRQ for a channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * cannot be cleared until the FIFO for that channel is empty, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * ensures that the message has actually been read. It also gives the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * recipient an opportunity to perform minimal processing before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * acknowledging the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return !(readl(mbox->regs + REMOTE_IRQ_STAT_REG) & RX_IRQ(n));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static bool sun6i_msgbox_peek_data(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int n = channel_number(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return readl(mbox->regs + MSG_STAT_REG(n)) & MSG_STAT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static const struct mbox_chan_ops sun6i_msgbox_chan_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .send_data = sun6i_msgbox_send_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .startup = sun6i_msgbox_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .shutdown = sun6i_msgbox_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .last_tx_done = sun6i_msgbox_last_tx_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .peek_data = sun6i_msgbox_peek_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int sun6i_msgbox_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct mbox_chan *chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct reset_control *reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct sun6i_msgbox *mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (!mbox)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) chans = devm_kcalloc(dev, NUM_CHANS, sizeof(*chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (!chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) for (i = 0; i < NUM_CHANS; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) chans[i].con_priv = mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) mbox->clk = devm_clk_get(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (IS_ERR(mbox->clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = PTR_ERR(mbox->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) dev_err(dev, "Failed to get clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ret = clk_prepare_enable(mbox->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) dev_err(dev, "Failed to enable clock: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) reset = devm_reset_control_get_exclusive(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (IS_ERR(reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = PTR_ERR(reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_err(dev, "Failed to get reset control: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * NOTE: We rely on platform firmware to preconfigure the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * directions, and we share this hardware block with other firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * that runs concurrently with Linux (e.g. a trusted monitor).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * Therefore, we do *not* assert the reset line if probing fails or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * when removing the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ret = reset_control_deassert(reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) dev_err(dev, "Failed to deassert reset: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mbox->regs = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (IS_ERR(mbox->regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = PTR_ERR(mbox->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) dev_err(dev, "Failed to map MMIO resource: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Disable all IRQs for this end of the msgbox. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) writel(0, mbox->regs + LOCAL_IRQ_EN_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) sun6i_msgbox_irq, 0, dev_name(dev), mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) dev_err(dev, "Failed to register IRQ handler: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) mbox->controller.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) mbox->controller.ops = &sun6i_msgbox_chan_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) mbox->controller.chans = chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) mbox->controller.num_chans = NUM_CHANS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) mbox->controller.txdone_irq = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) mbox->controller.txdone_poll = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) mbox->controller.txpoll_period = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) spin_lock_init(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) platform_set_drvdata(pdev, mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = mbox_controller_register(&mbox->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) dev_err(dev, "Failed to register controller: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) goto err_disable_unprepare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) err_disable_unprepare:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) clk_disable_unprepare(mbox->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int sun6i_msgbox_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct sun6i_msgbox *mbox = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) mbox_controller_unregister(&mbox->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* See the comment in sun6i_msgbox_probe about the reset line. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) clk_disable_unprepare(mbox->clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static const struct of_device_id sun6i_msgbox_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) { .compatible = "allwinner,sun6i-a31-msgbox", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_DEVICE_TABLE(of, sun6i_msgbox_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct platform_driver sun6i_msgbox_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .name = "sun6i-msgbox",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .of_match_table = sun6i_msgbox_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .probe = sun6i_msgbox_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .remove = sun6i_msgbox_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) module_platform_driver(sun6i_msgbox_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MODULE_AUTHOR("Samuel Holland <samuel@sholland.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MODULE_DESCRIPTION("Allwinner sun6i/sun8i/sun9i/sun50i Message Box");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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