Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * STi Mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2015 ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Author: Lee Jones <lee.jones@linaro.org> for ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Based on the original driver written by;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *   Alexandre Torgue, Olivier Lebreton and Loic Pallardy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mailbox_controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "mailbox.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define STI_MBOX_INST_MAX	4      /* RAM saving: Max supported instances */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define STI_MBOX_CHAN_MAX	20     /* RAM saving: Max supported channels  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define STI_IRQ_VAL_OFFSET	0x04   /* Read interrupt status	              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define STI_IRQ_SET_OFFSET	0x24   /* Generate a Tx channel interrupt     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define STI_IRQ_CLR_OFFSET	0x44   /* Clear pending Rx interrupts	      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define STI_ENA_VAL_OFFSET	0x64   /* Read enable status		      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define STI_ENA_SET_OFFSET	0x84   /* Enable a channel		      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define STI_ENA_CLR_OFFSET	0xa4   /* Disable a channel		      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define MBOX_BASE(mdev, inst)   ((mdev)->base + ((inst) * 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * STi Mailbox device data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * An IP Mailbox is currently composed of 4 instances
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * Each instance is currently composed of 32 channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * This means that we have 128 channels per Mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * A channel an be used for TX or RX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * @dev:	Device to which it is attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * @mbox:	Representation of a communication channel controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * @base:	Base address of the register mapping region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * @name:	Name of the mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * @enabled:	Local copy of enabled channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * @lock:	Mutex protecting enabled status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) struct sti_mbox_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct device		*dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct mbox_controller	*mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	void __iomem		*base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	const char		*name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32			enabled[STI_MBOX_INST_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	spinlock_t		lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * STi Mailbox platform specific configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * @num_inst:	Maximum number of instances in one HW Mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * @num_chan:	Maximum number of channel per instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) struct sti_mbox_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	unsigned int		num_inst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	unsigned int		num_chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * STi Mailbox allocated channel information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  * @mdev:	Pointer to parent Mailbox device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * @instance:	Instance number channel resides in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * @channel:	Channel number pertaining to this container
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) struct sti_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct sti_mbox_device	*mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	unsigned int		instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int		channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static inline bool sti_mbox_channel_is_enabled(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	return mdev->enabled[instance] & BIT(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) struct mbox_chan *sti_mbox_to_channel(struct mbox_controller *mbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				      unsigned int instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				      unsigned int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct sti_channel *chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	for (i = 0; i < mbox->num_chans; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		chan_info = mbox->chans[i].con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (chan_info &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		    chan_info->instance == instance &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		    chan_info->channel == channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			return &mbox->chans[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	dev_err(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		"Channel not registered: instance: %d channel: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static void sti_mbox_enable_channel(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	spin_lock_irqsave(&mdev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	mdev->enabled[instance] |= BIT(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	writel_relaxed(BIT(channel), base + STI_ENA_SET_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	spin_unlock_irqrestore(&mdev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void sti_mbox_disable_channel(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	spin_lock_irqsave(&mdev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	mdev->enabled[instance] &= ~BIT(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	writel_relaxed(BIT(channel), base + STI_ENA_CLR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	spin_unlock_irqrestore(&mdev->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void sti_mbox_clear_irq(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	writel_relaxed(BIT(channel), base + STI_IRQ_CLR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct mbox_chan *sti_mbox_irq_to_channel(struct sti_mbox_device *mdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 						 unsigned int instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct mbox_controller *mbox = mdev->mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct mbox_chan *chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	unsigned int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	unsigned long bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	bits = readl_relaxed(base + STI_IRQ_VAL_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (!bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		/* No IRQs fired in specified instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	/* An IRQ has fired, find the associated channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	for (channel = 0; bits; channel++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		if (!test_and_clear_bit(channel, &bits))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		chan = sti_mbox_to_channel(mbox, instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		if (chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			dev_dbg(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 				"IRQ fired on instance: %d channel: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 				instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	return chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static irqreturn_t sti_mbox_thread_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct sti_mbox_device *mdev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct mbox_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	unsigned int instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	for (instance = 0; instance < pdata->num_inst; instance++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) keep_looking:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		chan = sti_mbox_irq_to_channel(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (!chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		mbox_chan_received_data(chan, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		sti_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		sti_mbox_enable_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		goto keep_looking;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static irqreturn_t sti_mbox_irq_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct sti_mbox_device *mdev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct sti_channel *chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct mbox_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	unsigned int instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	int ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	for (instance = 0; instance < pdata->num_inst; instance++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		chan = sti_mbox_irq_to_channel(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		if (!chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		if (!sti_mbox_channel_is_enabled(chan)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 			dev_warn(mdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 				 "Unexpected IRQ: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 				 "  instance: %d: channel: %d [enabled: %x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 				 mdev->name, chan_info->instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				 chan_info->channel, mdev->enabled[instance]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			/* Only handle IRQ if no other valid IRQs were found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			if (ret == IRQ_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 				ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		sti_mbox_disable_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		ret = IRQ_WAKE_THREAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	if (ret == IRQ_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		dev_err(mdev->dev, "Spurious IRQ - was a channel requested?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static bool sti_mbox_tx_is_ready(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (!(readl_relaxed(base + STI_ENA_VAL_OFFSET) & BIT(channel))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		dev_dbg(mdev->dev, "Mbox: %s: inst: %d, chan: %d disabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			mdev->name, instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	if (readl_relaxed(base + STI_IRQ_VAL_OFFSET) & BIT(channel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		dev_dbg(mdev->dev, "Mbox: %s: inst: %d, chan: %d not ready\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			mdev->name, instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static int sti_mbox_send_data(struct mbox_chan *chan, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct sti_mbox_device *mdev = chan_info->mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	unsigned int instance = chan_info->instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	unsigned int channel = chan_info->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	void __iomem *base = MBOX_BASE(mdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	/* Send event to co-processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	writel_relaxed(BIT(channel), base + STI_IRQ_SET_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	dev_dbg(mdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		"Sent via Mailbox %s: instance: %d channel: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		mdev->name, instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int sti_mbox_startup_chan(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	sti_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	sti_mbox_enable_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static void sti_mbox_shutdown_chan(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	struct sti_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct mbox_controller *mbox = chan_info->mdev->mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	for (i = 0; i < mbox->num_chans; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		if (chan == &mbox->chans[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	if (mbox->num_chans == i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		dev_warn(mbox->dev, "Request to free non-existent channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	/* Reset channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	sti_mbox_disable_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	sti_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	chan->con_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static struct mbox_chan *sti_mbox_xlate(struct mbox_controller *mbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 					const struct of_phandle_args *spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	struct sti_mbox_device *mdev = dev_get_drvdata(mbox->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	struct sti_channel *chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	struct mbox_chan *chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	unsigned int instance  = spec->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	unsigned int channel   = spec->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	/* Bounds checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (instance >= pdata->num_inst || channel  >= pdata->num_chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		dev_err(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			"Invalid channel requested instance: %d channel: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 			instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	for (i = 0; i < mbox->num_chans; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		chan_info = mbox->chans[i].con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		/* Is requested channel free? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		if (chan_info &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		    mbox->dev == chan_info->mdev->dev &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		    instance == chan_info->instance &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		    channel == chan_info->channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			dev_err(mbox->dev, "Channel in use\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		 * Find the first free slot, then continue checking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		 * to see if requested channel is in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		if (!chan && !chan_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 			chan = &mbox->chans[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	if (!chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		dev_err(mbox->dev, "No free channels left\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	if (!chan_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	chan_info->mdev		= mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	chan_info->instance	= instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	chan_info->channel	= channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	chan->con_priv = chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	dev_info(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		 "Mbox: %s: Created channel: instance: %d channel: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		 mdev->name, instance, channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	return chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static const struct mbox_chan_ops sti_mbox_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	.startup	= sti_mbox_startup_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	.shutdown	= sti_mbox_shutdown_chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	.send_data	= sti_mbox_send_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	.last_tx_done	= sti_mbox_tx_is_ready,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static const struct sti_mbox_pdata mbox_stih407_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	.num_inst	= 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	.num_chan	= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static const struct of_device_id sti_mailbox_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 		.compatible = "st,stih407-mailbox",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		.data = (void *)&mbox_stih407_pdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) MODULE_DEVICE_TABLE(of, sti_mailbox_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int sti_mbox_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	const struct of_device_id *match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	struct mbox_controller *mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	struct sti_mbox_device *mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	struct device_node *np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	struct mbox_chan *chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	match = of_match_device(sti_mailbox_match, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	if (!match) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		dev_err(&pdev->dev, "No configuration found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	pdev->dev.platform_data = (struct sti_mbox_pdata *) match->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	if (!mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	platform_set_drvdata(pdev, mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	mdev->base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	if (IS_ERR(mdev->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 		return PTR_ERR(mdev->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	ret = of_property_read_string(np, "mbox-name", &mdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		mdev->name = np->full_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	if (!mbox)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	chans = devm_kcalloc(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 			     STI_MBOX_CHAN_MAX, sizeof(*chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	if (!chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	mdev->dev		= &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	mdev->mbox		= mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	spin_lock_init(&mdev->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	/* STi Mailbox does not have a Tx-Done or Tx-Ready IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	mbox->txdone_irq	= false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	mbox->txdone_poll	= true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	mbox->txpoll_period	= 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	mbox->ops		= &sti_mbox_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	mbox->dev		= mdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	mbox->of_xlate		= sti_mbox_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	mbox->chans		= chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	mbox->num_chans		= STI_MBOX_CHAN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	ret = devm_mbox_controller_register(&pdev->dev, mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	/* It's okay for Tx Mailboxes to not supply IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	if (irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 		dev_info(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 			 "%s: Registered Tx only Mailbox\n", mdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	ret = devm_request_threaded_irq(&pdev->dev, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 					sti_mbox_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 					sti_mbox_thread_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 					IRQF_ONESHOT, mdev->name, mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		dev_err(&pdev->dev, "Can't claim IRQ %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	dev_info(&pdev->dev, "%s: Registered Tx/Rx Mailbox\n", mdev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static struct platform_driver sti_mbox_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	.probe = sti_mbox_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 		.name = "sti-mailbox",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		.of_match_table = sti_mailbox_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) module_platform_driver(sti_mbox_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MODULE_DESCRIPTION("STMicroelectronics Mailbox Controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) MODULE_AUTHOR("Lee Jones <lee.jones@linaro.org");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) MODULE_ALIAS("platform:mailbox-sti");