Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Copyright (C) 2010,2015 Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *  Copyright (C) 2013-2014 Lubomir Rintel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2013 Craig McGeachie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Parts of the driver are based on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *  - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *    obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *    linux.git
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *  - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *    https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *    mailbox/bcm2835-ipc.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *  - documentation available on the following web site:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *    https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/mailbox_controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* Mailboxes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define ARM_0_MAIL0	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define ARM_0_MAIL1	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * Mailbox registers. We basically only support mailbox 0 & 1. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * deliver to the VC in mailbox 1, it delivers to us in mailbox 0. See
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * BCM2835-ARM-Peripherals.pdf section 1.3 for an explanation about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * the placement of memory barriers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define MAIL0_RD	(ARM_0_MAIL0 + 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define MAIL0_POL	(ARM_0_MAIL0 + 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define MAIL0_STA	(ARM_0_MAIL0 + 0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MAIL0_CNF	(ARM_0_MAIL0 + 0x1C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MAIL1_WRT	(ARM_0_MAIL1 + 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MAIL1_STA	(ARM_0_MAIL1 + 0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* Status register: FIFO state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ARM_MS_FULL		BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ARM_MS_EMPTY		BIT(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /* Configuration register: Enable interrupts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define ARM_MC_IHAVEDATAIRQEN	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) struct bcm2835_mbox {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	void __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct mbox_controller controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static struct bcm2835_mbox *bcm2835_link_mbox(struct mbox_chan *link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return container_of(link->mbox, struct bcm2835_mbox, controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static irqreturn_t bcm2835_mbox_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct bcm2835_mbox *mbox = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct device *dev = mbox->controller.dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct mbox_chan *link = &mbox->controller.chans[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	while (!(readl(mbox->regs + MAIL0_STA) & ARM_MS_EMPTY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		u32 msg = readl(mbox->regs + MAIL0_RD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		dev_dbg(dev, "Reply 0x%08X\n", msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		mbox_chan_received_data(link, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static int bcm2835_send_data(struct mbox_chan *link, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	u32 msg = *(u32 *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	spin_lock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	writel(msg, mbox->regs + MAIL1_WRT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	dev_dbg(mbox->controller.dev, "Request 0x%08X\n", msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	spin_unlock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static int bcm2835_startup(struct mbox_chan *link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	/* Enable the interrupt on data reception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	writel(ARM_MC_IHAVEDATAIRQEN, mbox->regs + MAIL0_CNF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void bcm2835_shutdown(struct mbox_chan *link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	writel(0, mbox->regs + MAIL0_CNF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static bool bcm2835_last_tx_done(struct mbox_chan *link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	struct bcm2835_mbox *mbox = bcm2835_link_mbox(link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	bool ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	spin_lock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	ret = !(readl(mbox->regs + MAIL1_STA) & ARM_MS_FULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	spin_unlock(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static const struct mbox_chan_ops bcm2835_mbox_chan_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.send_data	= bcm2835_send_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.startup	= bcm2835_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	.shutdown	= bcm2835_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	.last_tx_done	= bcm2835_last_tx_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct mbox_chan *bcm2835_mbox_index_xlate(struct mbox_controller *mbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		    const struct of_phandle_args *sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (sp->args_count != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return &mbox->chans[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int bcm2835_mbox_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct resource *iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct bcm2835_mbox *mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (mbox == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	spin_lock_init(&mbox->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			       bcm2835_mbox_irq, 0, dev_name(dev), mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	mbox->regs = devm_ioremap_resource(&pdev->dev, iomem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (IS_ERR(mbox->regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		ret = PTR_ERR(mbox->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		dev_err(&pdev->dev, "Failed to remap mailbox regs: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	mbox->controller.txdone_poll = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	mbox->controller.txpoll_period = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	mbox->controller.ops = &bcm2835_mbox_chan_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	mbox->controller.of_xlate = &bcm2835_mbox_index_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	mbox->controller.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	mbox->controller.num_chans = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	mbox->controller.chans = devm_kzalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		sizeof(*mbox->controller.chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (!mbox->controller.chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	ret = devm_mbox_controller_register(dev, &mbox->controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	platform_set_drvdata(pdev, mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	dev_info(dev, "mailbox enabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct of_device_id bcm2835_mbox_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	{ .compatible = "brcm,bcm2835-mbox", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MODULE_DEVICE_TABLE(of, bcm2835_mbox_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct platform_driver bcm2835_mbox_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		.name = "bcm2835-mbox",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		.of_match_table = bcm2835_mbox_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.probe		= bcm2835_mbox_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) module_platform_driver(bcm2835_mbox_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) MODULE_DESCRIPTION("BCM2835 mailbox IPC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) MODULE_LICENSE("GPL v2");