^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2015 Linaro Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Based on ARM MHU driver by Jassi Brar <jaswinder.singh@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2020 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mailbox_controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define INTR_STAT_OFS 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define INTR_SET_OFS 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define INTR_CLR_OFS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MHU_LP_OFFSET 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MHU_HP_OFFSET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MHU_SEC_OFFSET 0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TX_REG_OFFSET 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MHU_CHANS 3 /* Secure, Non-Secure High and Low Priority */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define MHU_CHAN_MAX 20 /* Max channels to save on unused RAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MHU_NUM_DOORBELLS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct mhu_db_link {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) void __iomem *tx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *rx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct arm_mhu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct mhu_db_link mlink[MHU_CHANS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct mbox_controller mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * ARM MHU Mailbox allocated channel information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * @mhu: Pointer to parent mailbox device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * @pchan: Physical channel within which this doorbell resides in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @doorbell: doorbell number pertaining to this channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct mhu_db_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct arm_mhu *mhu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned int pchan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned int doorbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static inline struct mbox_chan *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) mhu_db_mbox_to_channel(struct mbox_controller *mbox, unsigned int pchan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int doorbell)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct mhu_db_channel *chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) for (i = 0; i < mbox->num_chans; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) chan_info = mbox->chans[i].con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (chan_info && chan_info->pchan == pchan &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) chan_info->doorbell == doorbell)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return &mbox->chans[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void mhu_db_mbox_clear_irq(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct mhu_db_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) writel_relaxed(BIT(chan_info->doorbell), base + INTR_CLR_OFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static unsigned int mhu_db_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int pchan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) for (pchan = 0; pchan < MHU_CHANS; pchan++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (mhu->mlink[pchan].irq == irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return pchan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct mbox_chan *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mhu_db_mbox_irq_to_channel(struct arm_mhu *mhu, unsigned int pchan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned int doorbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct mbox_chan *chan = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct mbox_controller *mbox = &mhu->mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) void __iomem *base = mhu->mlink[pchan].rx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) bits = readl_relaxed(base + INTR_STAT_OFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (!bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* No IRQs fired in specified physical channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* An IRQ has fired, find the associated channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) for (doorbell = 0; bits; doorbell++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (!test_and_clear_bit(doorbell, &bits))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dev_err(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "Channel not registered: pchan: %d doorbell: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static irqreturn_t mhu_db_mbox_rx_handler(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct mbox_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct arm_mhu *mhu = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int pchan = mhu_db_mbox_irq_to_pchan_num(mhu, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) while (NULL != (chan = mhu_db_mbox_irq_to_channel(mhu, pchan))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) mbox_chan_received_data(chan, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) mhu_db_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static bool mhu_db_last_tx_done(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct mhu_db_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (readl_relaxed(base + INTR_STAT_OFS) & BIT(chan_info->doorbell))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int mhu_db_send_data(struct mbox_chan *chan, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct mhu_db_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* Send event to co-processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) writel_relaxed(BIT(chan_info->doorbell), base + INTR_SET_OFS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static int mhu_db_startup(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) mhu_db_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static void mhu_db_shutdown(struct mbox_chan *chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct mhu_db_channel *chan_info = chan->con_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct mbox_controller *mbox = &chan_info->mhu->mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) for (i = 0; i < mbox->num_chans; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (chan == &mbox->chans[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (mbox->num_chans == i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_warn(mbox->dev, "Request to free non-existent channel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* Reset channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mhu_db_mbox_clear_irq(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) devm_kfree(mbox->dev, chan->con_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) chan->con_priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static struct mbox_chan *mhu_db_mbox_xlate(struct mbox_controller *mbox,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) const struct of_phandle_args *spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct arm_mhu *mhu = dev_get_drvdata(mbox->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct mhu_db_channel *chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct mbox_chan *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int pchan = spec->args[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) unsigned int doorbell = spec->args[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* Bounds checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (pchan >= MHU_CHANS || doorbell >= MHU_NUM_DOORBELLS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) dev_err(mbox->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "Invalid channel requested pchan: %d doorbell: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* Is requested channel free? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (chan) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dev_err(mbox->dev, "Channel in use: pchan: %d doorbell: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* Find the first free slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) for (i = 0; i < mbox->num_chans; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (!mbox->chans[i].con_priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (mbox->num_chans == i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) dev_err(mbox->dev, "No free channels left\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return ERR_PTR(-EBUSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) chan = &mbox->chans[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (!chan_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) chan_info->mhu = mhu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) chan_info->pchan = pchan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) chan_info->doorbell = doorbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) chan->con_priv = chan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pchan, doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const struct mbox_chan_ops mhu_db_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .send_data = mhu_db_send_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .startup = mhu_db_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .shutdown = mhu_db_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .last_tx_done = mhu_db_last_tx_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int mhu_db_probe(struct amba_device *adev, const struct amba_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u32 cell_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int i, err, max_chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct arm_mhu *mhu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct mbox_chan *chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct device *dev = &adev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) int mhu_reg[MHU_CHANS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (!of_device_is_compatible(np, "arm,mhu-doorbell"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) err = of_property_read_u32(np, "#mbox-cells", &cell_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dev_err(dev, "failed to read #mbox-cells in '%pOF'\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (cell_count == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) max_chans = MHU_CHAN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) dev_err(dev, "incorrect value of #mbox-cells in '%pOF'\n", np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (!mhu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) mhu->base = devm_ioremap_resource(dev, &adev->res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (IS_ERR(mhu->base)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) dev_err(dev, "ioremap failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return PTR_ERR(mhu->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (!chans)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) mhu->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) mhu->mbox.dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) mhu->mbox.chans = chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) mhu->mbox.num_chans = max_chans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) mhu->mbox.txdone_irq = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) mhu->mbox.txdone_poll = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) mhu->mbox.txpoll_period = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) mhu->mbox.of_xlate = mhu_db_mbox_xlate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) amba_set_drvdata(adev, mhu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) mhu->mbox.ops = &mhu_db_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) err = devm_mbox_controller_register(dev, &mhu->mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_err(dev, "Failed to register mailboxes %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) for (i = 0; i < MHU_CHANS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int irq = mhu->mlink[i].irq = adev->irq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (irq <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_dbg(dev, "No IRQ found for Channel %d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) err = devm_request_threaded_irq(dev, irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) mhu_db_mbox_rx_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) IRQF_ONESHOT, "mhu_db_link", mhu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_err(dev, "Can't claim IRQ %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) mbox_controller_unregister(&mhu->mbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) dev_info(dev, "ARM MHU Doorbell mailbox registered\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static struct amba_id mhu_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .id = 0x1bb098,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .mask = 0xffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) { 0, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MODULE_DEVICE_TABLE(amba, mhu_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static struct amba_driver arm_mhu_db_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .name = "mhu-doorbell",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .id_table = mhu_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .probe = mhu_db_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) module_amba_driver(arm_mhu_db_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) MODULE_DESCRIPTION("ARM MHU Doorbell Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags