Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) menuconfig MAILBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	bool "Mailbox Hardware Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 	  Mailbox is a framework to control hardware communication between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 	  on-chip processors through queued messages and interrupt driven
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 	  signals. Say Y if your platform supports hardware mailboxes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) if MAILBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) config ARM_MHU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	tristate "ARM MHU Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	depends on ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	  Say Y here if you want to build the ARM MHU controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	  The controller has 3 mailbox channels, the last of which can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	  used in Secure mode only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) config IMX_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	tristate "i.MX Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	depends on ARCH_MXC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	  Mailbox implementation for i.MX Messaging Unit (MU).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) config PLATFORM_MHU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	tristate "Platform MHU Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	  Say Y here if you want to build a platform specific variant MHU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	  controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	  The controller has a maximum of 3 mailbox channels, the last of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	  which can be used in Secure mode only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) config PL320_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	bool "ARM PL320 Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	depends on ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	  An implementation of the ARM PL320 Interprocessor Communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	  Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	  send short messages between Highbank's A9 cores and the EnergyCore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	  Management Engine, primarily for cpufreq. Say Y here if you want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	  to use the PL320 IPCM support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) config ARMADA_37XX_RWTM_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	tristate "Armada 37xx rWTM BIU Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	depends on ARCH_MVEBU || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	  Mailbox implementation for communication with the the firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	  SOC. Say Y here if you are building for such a device (for example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	  the Turris Mox router).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) config OMAP2PLUS_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	tristate "OMAP2+ Mailbox framework support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	depends on ARCH_OMAP2PLUS || ARCH_K3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	  Mailbox implementation for OMAP family chips with hardware for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	  want to use OMAP2+ Mailbox framework support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) config OMAP_MBOX_KFIFO_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	int "Mailbox kfifo default buffer size (bytes)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	depends on OMAP2PLUS_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	default 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	  Specify the default size of mailbox's kfifo buffers (bytes).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	  This can also be changed at runtime (via the mbox_kfifo_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	  module parameter).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) config ROCKCHIP_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	tristate "Rockchip Soc Integrated Mailbox Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	depends on ARCH_ROCKCHIP || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	  This driver provides support for inter-processor communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	  between CPU cores and MCU processor on Some Rockchip SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	  Please check it that the Soc you use have Mailbox hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	  Say Y here if you want to use the Rockchip Mailbox support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) config PCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	bool "Platform Communication Channel Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	depends on ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	  ACPI 5.0+ spec defines a generic mode of communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	  between the OS and a platform such as the BMC. This medium
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	  (PCC) is typically used by CPPC (ACPI CPU Performance management),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	  states). Select this driver if your platform implements the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	  PCC clients mentioned above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) config ALTERA_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	tristate "Altera Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	  An implementation of the Altera Mailbox soft core. It is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	  to send message between processors. Say Y here if you want to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	  Altera mailbox support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) config BCM2835_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	tristate "BCM2835 Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	depends on ARCH_BCM2835
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	  An implementation of the BCM2385 Mailbox.  It is used to invoke
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	  the services of the Videocore. Say Y here if you want to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	  BCM2835 Mailbox.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) config STI_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	tristate "STI Mailbox framework support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	depends on ARCH_STI && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	  Mailbox implementation for STMicroelectonics family chips with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	  hardware for interprocessor communication.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) config TI_MESSAGE_MANAGER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	tristate "Texas Instruments Message Manager Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	depends on ARCH_KEYSTONE || ARCH_K3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	  An implementation of Message Manager slave driver for Keystone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	  and K3 architecture SoCs from Texas Instruments. Message Manager
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	  is a communication entity found on few of Texas Instrument's keystone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	  and K3 architecture SoCs. These may be used for communication between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	  multiple processors within the SoC. Select this driver if your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	  platform has support for the hardware block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) config HI3660_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	tristate "Hi3660 Mailbox" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	depends on (ARCH_HISI || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	default ARCH_HISI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	  An implementation of the hi3660 mailbox. It is used to send message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	  between application processors and other processors/MCU/DSP. Select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	  Y here if you want to use Hi3660 mailbox controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) config HI6220_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	tristate "Hi6220 Mailbox" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	depends on (ARCH_HISI || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	default ARCH_HISI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	  An implementation of the hi6220 mailbox. It is used to send message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	  between application processors and MCU. Say Y here if you want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	  build Hi6220 mailbox controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config MAILBOX_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	tristate "Mailbox Test Client"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	  Test client to help with testing new Controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	  implementations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) config QCOM_APCS_IPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	tristate "Qualcomm APCS IPC driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	depends on ARCH_QCOM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	  Say y here to enable support for the APCS IPC mailbox driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	  providing an interface for invoking the inter-process communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	  signals from the application processor to other masters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) config TEGRA_HSP_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	depends on ARCH_TEGRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	  The Tegra HSP driver is used for the interprocessor communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	  between different remote processors and host processors on Tegra186
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	  and later SoCs. Say Y here if you want to have this support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	  If unsure say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) config XGENE_SLIMPRO_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	depends on ARCH_XGENE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	  An implementation of the APM X-Gene Interprocessor Communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	  It is used to send short messages between ARM64-bit cores and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	  the SLIMpro Management Engine, primarily for PM. Say Y here if you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	  want to use the APM X-Gene SLIMpro IPCM support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) config BCM_PDC_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	tristate "Broadcom FlexSparx DMA Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	depends on ARCH_BCM_IPROC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	  which provides access to various offload engines on Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) config BCM_FLEXRM_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	tristate "Broadcom FlexRM Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	depends on ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	depends on ARCH_BCM_IPROC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	select GENERIC_MSI_IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	default m if ARCH_BCM_IPROC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	  Mailbox implementation of the Broadcom FlexRM ring manager,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	  which provides access to various offload engines on Broadcom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	  SoCs. Say Y here if you want to use the Broadcom FlexRM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) config STM32_IPCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	tristate "STM32 IPCC Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	depends on MACH_STM32MP157
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	  Mailbox implementation for STMicroelectonics STM32 family chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	  with hardware for Inter-Processor Communication Controller (IPCC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	  between processors. Say Y here if you want to have this support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) config MTK_CMDQ_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	tristate "MediaTek CMDQ Mailbox Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	depends on ARCH_MEDIATEK || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	select MTK_INFRACFG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	  Say yes here to add support for the MediaTek Command Queue (CMDQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	  mailbox driver. The CMDQ is used to help read/write registers with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	  critical time limitation, such as updating display configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	  during the vblank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) config ZYNQMP_IPI_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	bool "Xilinx ZynqMP IPI Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	depends on ARCH_ZYNQMP && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	  Say yes here to add support for Xilinx IPI mailbox driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	  This mailbox driver is used to send notification or short message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	  between processors with Xilinx ZynqMP IPI. It will place the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	  message to the IPI buffer and will access the IPI control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	  registers to kick the other processor or enquire status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) config SUN6I_MSGBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	depends on ARCH_SUNXI || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	default ARCH_SUNXI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	  Mailbox implementation for the hardware message box present in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	  various Allwinner SoCs. This mailbox is used for communication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	  between the application CPUs and the power management coprocessor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) config SPRD_MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	tristate "Spreadtrum Mailbox"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	depends on ARCH_SPRD || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	  Mailbox driver implementation for the Spreadtrum platform. It is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	  to send message between application processors and MCU. Say Y here if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	  you want to build the Spreatrum mailbox controller driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) config QCOM_IPCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	bool "Qualcomm Technologies, Inc. IPCC driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	depends on ARCH_QCOM || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	  (IPCC) driver for MSM devices. The driver provides mailbox support for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	  sending interrupts to the clients. On the other hand, the driver also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	  acts as an interrupt controller for receiving interrupts from clients.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	  Say Y here if you want to build this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) endif