^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * PowerMac G5 SMU driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2004 J. Mayer <l_indien@magic.fr>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * - maybe add timeout to commands ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * - blocking version of time functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * - polling version of i2c commands (including timer that works with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * interrupts off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * - maybe avoid some data copies with i2c by directly using the smu cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * buffer and a lower level internal interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * - understand SMU -> CPU events and implement reception of them via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * the userland interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/dmapool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/sched/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/pmac_feature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/smu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define VERSION "0.7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #undef DEBUG_SMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #ifdef DEBUG_SMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define DPRINTK(fmt, args...) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * This is the command buffer passed to the SMU hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define SMU_MAX_DATA 254
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct smu_cmd_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 data[SMU_MAX_DATA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct smu_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct device_node *of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct platform_device *of_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int doorbell; /* doorbell gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 __iomem *db_buf; /* doorbell buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct device_node *db_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int db_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct device_node *msg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int msg_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u32 cmd_buf_abs; /* command buffer absolute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct list_head cmd_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct smu_cmd *cmd_cur; /* pending command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int broken_nap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct list_head cmd_i2c_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct timer_list i2c_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * I don't think there will ever be more than one SMU, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * for now, just hard code that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static DEFINE_MUTEX(smu_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static struct smu_device *smu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static DEFINE_MUTEX(smu_part_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int smu_irq_inited;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static unsigned long smu_cmdbuf_abs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void smu_i2c_retry(struct timer_list *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * SMU driver low level stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static void smu_start_cmd(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned long faddr, fend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct smu_cmd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (list_empty(&smu->cmd_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* Fetch first command in queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) smu->cmd_cur = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) list_del(&cmd->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) cmd->data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Fill the SMU command buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) smu->cmd_buf->cmd = cmd->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) smu->cmd_buf->length = cmd->data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* Flush command and data to RAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) faddr = (unsigned long)smu->cmd_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) fend = faddr + smu->cmd_buf->length + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) flush_dcache_range(faddr, fend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* We also disable NAP mode for the duration of the command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * on U3 based machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * This is slightly racy as it can be written back to 1 by a sysctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * but that never happens in practice. There seem to be an issue with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * U3 based machines such as the iMac G5 where napping for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * whole duration of the command prevents the SMU from fetching it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * from memory. This might be related to the strange i2c based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * mechanism the SMU uses to access memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (smu->broken_nap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) powersave_nap = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* This isn't exactly a DMA mapping here, I suspect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * the SMU is actually communicating with us via i2c to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * northbridge or the CPU to access RAM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) writel(smu->cmd_buf_abs, smu->db_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* Ring the SMU doorbell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static irqreturn_t smu_db_intr(int irq, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct smu_cmd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) void *misc = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) u8 gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* SMU completed the command, well, we hope, let's make sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * of it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) spin_lock_irqsave(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if ((gpio & 7) != 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) spin_unlock_irqrestore(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) cmd = smu->cmd_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) smu->cmd_cur = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (cmd == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) goto bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (rc == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned long faddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int reply_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u8 ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* CPU might have brought back the cache line, so we need
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * to flush again before peeking at the SMU response. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * flush the entire buffer for now as we haven't read the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * reply length (it's only 2 cache lines anyway)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) faddr = (unsigned long)smu->cmd_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) flush_dcache_range(faddr, faddr + 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* Now check ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ack = (~cmd->cmd) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ack != smu->cmd_buf->cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DPRINTK("SMU: incorrect ack, want %x got %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ack, smu->cmd_buf->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) reply_len = rc == 0 ? smu->cmd_buf->length : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) DPRINTK("SMU: reply len: %d\n", reply_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (reply_len > cmd->reply_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) printk(KERN_WARNING "SMU: reply buffer too small,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) "got %d bytes for a %d bytes buffer\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) reply_len, cmd->reply_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) reply_len = cmd->reply_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cmd->reply_len = reply_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (cmd->reply_buf && reply_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* Now complete the command. Write status last in order as we lost
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * ownership of the command structure as soon as it's no longer -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) done = cmd->done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) misc = cmd->misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) cmd->status = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* Re-enable NAP mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (smu->broken_nap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) powersave_nap = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) bail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Start next command if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) smu_start_cmd();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) spin_unlock_irqrestore(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Call command completion handler if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) done(cmd, misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* It's an edge interrupt, nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static irqreturn_t smu_msg_intr(int irq, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* I don't quite know what to do with this one, we seem to never
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * receive it, so I suspect we have to arm it someway in the SMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * to start getting events that way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) printk(KERN_INFO "SMU: message interrupt !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* It's an edge interrupt, nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * Queued command management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int smu_queue_cmd(struct smu_cmd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (cmd->data_len > SMU_MAX_DATA ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) cmd->reply_len > SMU_MAX_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) cmd->status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) spin_lock_irqsave(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) list_add_tail(&cmd->link, &smu->cmd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if (smu->cmd_cur == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) smu_start_cmd();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) spin_unlock_irqrestore(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* Workaround for early calls when irq isn't available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (!smu_irq_inited || !smu->db_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) smu_spinwait_cmd(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) EXPORT_SYMBOL(smu_queue_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) unsigned int data_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) void (*done)(struct smu_cmd *cmd, void *misc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) void *misc, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct smu_cmd *cmd = &scmd->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) va_list list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (data_len > sizeof(scmd->buffer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) memset(scmd, 0, sizeof(*scmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) cmd->cmd = command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) cmd->data_len = data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) cmd->data_buf = scmd->buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) cmd->reply_len = sizeof(scmd->buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) cmd->reply_buf = scmd->buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) cmd->done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) cmd->misc = misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) va_start(list, misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) for (i = 0; i < data_len; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) scmd->buffer[i] = (u8)va_arg(list, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) va_end(list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return smu_queue_cmd(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) EXPORT_SYMBOL(smu_queue_simple);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) void smu_poll(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if ((gpio & 7) == 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) smu_db_intr(smu->db_irq, smu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) EXPORT_SYMBOL(smu_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) void smu_done_complete(struct smu_cmd *cmd, void *misc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct completion *comp = misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) complete(comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) EXPORT_SYMBOL(smu_done_complete);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) void smu_spinwait_cmd(struct smu_cmd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) while(cmd->status == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) smu_poll();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) EXPORT_SYMBOL(smu_spinwait_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* RTC low level commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static inline int bcd2hex (int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static inline int hex2bcd (int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return ((n / 10) << 4) + (n % 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct rtc_time *time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) cmd_buf->cmd = 0x8e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) cmd_buf->length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) cmd_buf->data[0] = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) cmd_buf->data[1] = hex2bcd(time->tm_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) cmd_buf->data[2] = hex2bcd(time->tm_min);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) cmd_buf->data[3] = hex2bcd(time->tm_hour);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) cmd_buf->data[4] = time->tm_wday;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) cmd_buf->data[5] = hex2bcd(time->tm_mday);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) int smu_get_rtc_time(struct rtc_time *time, int spinwait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct smu_simple_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) memset(time, 0, sizeof(struct rtc_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SMU_CMD_RTC_GET_DATETIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) smu_spinwait_simple(&cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) time->tm_sec = bcd2hex(cmd.buffer[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) time->tm_min = bcd2hex(cmd.buffer[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) time->tm_hour = bcd2hex(cmd.buffer[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) time->tm_wday = bcd2hex(cmd.buffer[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) time->tm_mday = bcd2hex(cmd.buffer[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) int smu_set_rtc_time(struct rtc_time *time, int spinwait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct smu_simple_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) SMU_CMD_RTC_SET_DATETIME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) hex2bcd(time->tm_sec),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) hex2bcd(time->tm_min),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) hex2bcd(time->tm_hour),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) time->tm_wday,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) hex2bcd(time->tm_mday),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) hex2bcd(time->tm_mon) + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) hex2bcd(time->tm_year - 100));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) smu_spinwait_simple(&cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) void smu_shutdown(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct smu_simple_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) smu_spinwait_simple(&cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) for (;;)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) void smu_restart(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct smu_simple_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) smu_spinwait_simple(&cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) for (;;)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) int smu_present(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return smu != NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) EXPORT_SYMBOL(smu_present);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) int __init smu_init (void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) const u32 *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) np = of_find_node_by_type(NULL, "smu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (np == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * SMU based G5s need some memory below 2Gb. Thankfully this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * called at a time where memblock is still available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (smu_cmdbuf_abs == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) goto fail_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) panic("%s: Failed to allocate %zu bytes\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) sizeof(struct smu_device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) spin_lock_init(&smu->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) INIT_LIST_HEAD(&smu->cmd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) INIT_LIST_HEAD(&smu->cmd_i2c_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) smu->of_node = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) smu->db_irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) smu->msg_irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * 32 bits value safely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) smu->cmd_buf = __va(smu_cmdbuf_abs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (smu->db_node == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) goto fail_bootmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) data = of_get_property(smu->db_node, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (data == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) goto fail_db_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /* Current setup has one doorbell GPIO that does both doorbell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * and ack. GPIOs are at 0x50, best would be to find that out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * in the device-tree though.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) smu->doorbell = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (smu->doorbell < 0x50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) smu->doorbell += 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /* Now look for the smu-interrupt GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (smu->msg_node == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) data = of_get_property(smu->msg_node, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (data == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) of_node_put(smu->msg_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) smu->msg_node = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) smu->msg = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (smu->msg < 0x50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) smu->msg += 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) } while(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /* Doorbell buffer is currently hard-coded, I didn't find a proper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * device-tree entry giving the address. Best would probably to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * an offset for K2 base though, but let's do it that way for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) smu->db_buf = ioremap(0x8000860c, 0x1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (smu->db_buf == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) ret = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) goto fail_msg_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* U3 has an issue with NAP mode when issuing SMU commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) smu->broken_nap = pmac_get_uninorth_variant() < 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (smu->broken_nap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) printk(KERN_INFO "SMU: using NAP mode workaround\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) sys_ctrler = SYS_CTRLER_SMU;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) fail_msg_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) of_node_put(smu->msg_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) fail_db_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) of_node_put(smu->db_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) fail_bootmem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) memblock_free(__pa(smu), sizeof(struct smu_device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) smu = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) fail_np:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int smu_late_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (smu->db_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (!smu->db_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) smu->db_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (smu->msg_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (!smu->msg_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) smu->msg_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * Try to request the interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (smu->db_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (request_irq(smu->db_irq, smu_db_intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) IRQF_SHARED, "SMU doorbell", smu) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) printk(KERN_WARNING "SMU: can't "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) "request interrupt %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) smu->db_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) smu->db_irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (smu->msg_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (request_irq(smu->msg_irq, smu_msg_intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) IRQF_SHARED, "SMU message", smu) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) printk(KERN_WARNING "SMU: can't "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) "request interrupt %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) smu->msg_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) smu->msg_irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) smu_irq_inited = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* This has to be before arch_initcall as the low i2c stuff relies on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * above having been done before we reach arch_initcalls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) core_initcall(smu_late_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * sysfs visibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static void smu_expose_childs(struct work_struct *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) for_each_child_of_node(smu->of_node, np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (of_device_is_compatible(np, "smu-sensors"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) of_platform_device_create(np, "smu-sensors",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) &smu->of_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static int smu_platform_probe(struct platform_device* dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) smu->of_dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * Ok, we are matched, now expose all i2c busses. We have to defer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * that unfortunately or it would deadlock inside the device model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) schedule_work(&smu_expose_childs_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const struct of_device_id smu_platform_match[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .type = "smu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static struct platform_driver smu_of_platform_driver =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .name = "smu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .of_match_table = smu_platform_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .probe = smu_platform_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static int __init smu_init_sysfs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * For now, we don't power manage machines with an SMU chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * I'm a bit too far from figuring out how that works with those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * new chipsets, but that will come back and bite us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) platform_driver_register(&smu_of_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) device_initcall(smu_init_sysfs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct platform_device *smu_get_ofdev(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) return smu->of_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) EXPORT_SYMBOL_GPL(smu_get_ofdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * i2c interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) void *misc = cmd->misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) /* Check for read case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (!fail && cmd->read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (cmd->pdata[0] < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) fail = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) memcpy(cmd->info.data, &cmd->pdata[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) cmd->info.datalen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) DPRINTK("SMU: completing, success: %d\n", !fail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) /* Update status and mark no pending i2c command with lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * held so nobody comes in while we dequeue an eventual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * pending next i2c command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) spin_lock_irqsave(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) smu->cmd_i2c_cur = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) cmd->status = fail ? -EIO : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /* Is there another i2c command waiting ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) if (!list_empty(&smu->cmd_i2c_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct smu_i2c_cmd *newcmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /* Fetch it, new current, remove from list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) newcmd = list_entry(smu->cmd_i2c_list.next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct smu_i2c_cmd, link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) smu->cmd_i2c_cur = newcmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) list_del(&cmd->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) /* Queue with low level smu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) list_add_tail(&cmd->scmd.link, &smu->cmd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if (smu->cmd_cur == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) smu_start_cmd();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) spin_unlock_irqrestore(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /* Call command completion handler if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) done(cmd, misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) static void smu_i2c_retry(struct timer_list *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) DPRINTK("SMU: i2c failure, requeuing...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /* requeue command simply by resetting reply_len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) cmd->pdata[0] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) cmd->scmd.reply_len = sizeof(cmd->pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) smu_queue_cmd(&cmd->scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct smu_i2c_cmd *cmd = misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int fail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) /* Check for possible status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (scmd->status < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) fail = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) else if (cmd->read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (cmd->stage == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) fail = cmd->pdata[0] != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) fail = cmd->pdata[0] >= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) fail = cmd->pdata[0] != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* Handle failures by requeuing command, after 5ms interval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (fail && --cmd->retries > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) DPRINTK("SMU: i2c failure, starting timer...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) BUG_ON(cmd != smu->cmd_i2c_cur);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (!smu_irq_inited) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) mdelay(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) smu_i2c_retry(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /* If failure or stage 1, command is complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (fail || cmd->stage != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) smu_i2c_complete_command(cmd, fail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) DPRINTK("SMU: going to stage 1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* Ok, initial command complete, now poll status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) scmd->reply_buf = cmd->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) scmd->reply_len = sizeof(cmd->pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) scmd->data_buf = cmd->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) scmd->data_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) cmd->pdata[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) cmd->stage = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) cmd->retries = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) smu_queue_cmd(scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) int smu_queue_i2c(struct smu_i2c_cmd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (smu == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /* Fill most fields of scmd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) cmd->scmd.done = smu_i2c_low_completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) cmd->scmd.misc = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) cmd->scmd.reply_buf = cmd->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) cmd->scmd.reply_len = sizeof(cmd->pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) cmd->scmd.status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) cmd->stage = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) cmd->pdata[0] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) cmd->retries = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) cmd->status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) /* Check transfer type, sanitize some "info" fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) * based on transfer type and do more checking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) cmd->info.caddr = cmd->info.devaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) cmd->read = cmd->info.devaddr & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) switch(cmd->info.type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) case SMU_I2C_TRANSFER_SIMPLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) memset(&cmd->info.sublen, 0, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) case SMU_I2C_TRANSFER_COMBINED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) cmd->info.devaddr &= 0xfe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) case SMU_I2C_TRANSFER_STDSUB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if (cmd->info.sublen > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) /* Finish setting up command based on transfer direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if (cmd->read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (cmd->info.datalen > SMU_I2C_READ_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) memset(cmd->info.data, 0xff, cmd->info.datalen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) cmd->scmd.data_len = 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) cmd->scmd.data_len = 9 + cmd->info.datalen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) DPRINTK("SMU: i2c enqueuing command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) cmd->read ? "read" : "write", cmd->info.datalen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) cmd->info.bus, cmd->info.caddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) cmd->info.subaddr[0], cmd->info.type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* Enqueue command in i2c list, and if empty, enqueue also in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) * main command list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) spin_lock_irqsave(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if (smu->cmd_i2c_cur == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) smu->cmd_i2c_cur = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) list_add_tail(&cmd->scmd.link, &smu->cmd_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (smu->cmd_cur == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) smu_start_cmd();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) list_add_tail(&cmd->link, &smu->cmd_i2c_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) spin_unlock_irqrestore(&smu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) * Handling of "partitions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) DECLARE_COMPLETION_ONSTACK(comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) unsigned int chunk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct smu_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) u8 params[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) /* We currently use a chunk size of 0xe. We could check the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) * SMU firmware version and use bigger sizes though
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) chunk = 0xe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) unsigned int clen = min(len, chunk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) cmd.data_len = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) cmd.data_buf = params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) cmd.reply_len = chunk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) cmd.reply_buf = dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) cmd.done = smu_done_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) cmd.misc = ∁
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) params[1] = 0x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) *((u32 *)¶ms[2]) = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) params[6] = clen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) rc = smu_queue_cmd(&cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) wait_for_completion(&comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if (cmd.status != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) if (cmd.reply_len != clen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) printk(KERN_DEBUG "SMU: short read in "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) "smu_read_datablock, got: %d, want: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) cmd.reply_len, clen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) len -= clen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) addr += clen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) dest += clen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) static struct smu_sdbp_header *smu_create_sdb_partition(int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) DECLARE_COMPLETION_ONSTACK(comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) struct smu_simple_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) unsigned int addr, len, tlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct smu_sdbp_header *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct property *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) /* First query the partition info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) smu_done_complete, &comp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) SMU_CMD_PARTITION_LATEST, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) wait_for_completion(&comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) DPRINTK("SMU: done, status: %d, reply_len: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) cmd.cmd.status, cmd.cmd.reply_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) /* Partition doesn't exist (or other error) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) /* Fetch address and length from reply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) addr = *((u16 *)cmd.buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) len = cmd.buffer[3] << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /* Calucluate total length to allocate, including the 17 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) * for "sdb-partition-XX" that we append at the end of the buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) tlen = sizeof(struct property) + len + 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) prop = kzalloc(tlen, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (prop == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) hdr = (struct smu_sdbp_header *)(prop + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) prop->name = ((char *)prop) + tlen - 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) sprintf(prop->name, "sdb-partition-%02x", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) prop->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) prop->value = hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) prop->next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) /* Read the datablock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (smu_read_datablock((u8 *)hdr, addr, len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) printk(KERN_DEBUG "SMU: datablock read failed while reading "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) "partition %02x !\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) goto failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /* Got it, check a few things and create the property */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) if (hdr->id != id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) printk(KERN_DEBUG "SMU: Reading partition %02x and got "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) "%02x !\n", id, hdr->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) goto failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) if (of_add_property(smu->of_node, prop)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) "property !\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) goto failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) return hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) kfree(prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) /* Note: Only allowed to return error code in pointers (using ERR_PTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * when interruptible is 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) static const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) unsigned int *size, int interruptible)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) char pname[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) const struct smu_sdbp_header *part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) sprintf(pname, "sdb-partition-%02x", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) DPRINTK("smu_get_sdb_partition(%02x)\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (interruptible) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) rc = mutex_lock_interruptible(&smu_part_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) return ERR_PTR(rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) mutex_lock(&smu_part_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) part = of_get_property(smu->of_node, pname, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) if (part == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) DPRINTK("trying to extract from SMU ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) part = smu_create_sdb_partition(id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) if (part != NULL && size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) *size = part->len << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) mutex_unlock(&smu_part_access);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) return part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) return __smu_get_sdb_partition(id, size, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) EXPORT_SYMBOL(smu_get_sdb_partition);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) * Userland driver interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) static LIST_HEAD(smu_clist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static DEFINE_SPINLOCK(smu_clist_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) enum smu_file_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) smu_file_commands,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) smu_file_events,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) smu_file_closing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) struct smu_private
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) enum smu_file_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) int busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) struct smu_cmd cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) wait_queue_head_t wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) u8 buffer[SMU_MAX_DATA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) static int smu_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) struct smu_private *pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) if (pp == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) spin_lock_init(&pp->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) pp->mode = smu_file_commands;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) init_waitqueue_head(&pp->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) mutex_lock(&smu_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) spin_lock_irqsave(&smu_clist_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) list_add(&pp->list, &smu_clist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) spin_unlock_irqrestore(&smu_clist_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) file->private_data = pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) mutex_unlock(&smu_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) struct smu_private *pp = misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) wake_up_all(&pp->wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) static ssize_t smu_write(struct file *file, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct smu_private *pp = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) struct smu_user_cmd_hdr hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) if (pp->busy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) else if (copy_from_user(&hdr, buf, sizeof(hdr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) pp->mode = smu_file_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) const struct smu_sdbp_header *part;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (part == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) else if (IS_ERR(part))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) return PTR_ERR(part);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) else if (pp->mode != smu_file_commands)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) return -EBADFD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) else if (hdr.data_len > SMU_MAX_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (pp->busy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) pp->busy = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) pp->cmd.status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) pp->busy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) pp->cmd.cmd = hdr.cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) pp->cmd.data_len = hdr.data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) pp->cmd.reply_len = SMU_MAX_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) pp->cmd.data_buf = pp->buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) pp->cmd.reply_buf = pp->buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) pp->cmd.done = smu_user_cmd_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) pp->cmd.misc = pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) rc = smu_queue_cmd(&pp->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) char __user *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) DECLARE_WAITQUEUE(wait, current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) struct smu_user_reply_hdr hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) int size, rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) if (!pp->busy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) if (count < sizeof(struct smu_user_reply_hdr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) return -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) if (pp->cmd.status == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (file->f_flags & O_NONBLOCK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) add_wait_queue(&pp->wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) set_current_state(TASK_INTERRUPTIBLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) if (pp->cmd.status != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) rc = -ERESTARTSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) if (signal_pending(current))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) schedule();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) set_current_state(TASK_RUNNING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) remove_wait_queue(&pp->wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) if (pp->cmd.status != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) pp->cmd.reply_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) size = sizeof(hdr) + pp->cmd.reply_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (count < size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) size = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) rc = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) hdr.status = pp->cmd.status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) hdr.reply_len = pp->cmd.reply_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (copy_to_user(buf, &hdr, sizeof(hdr)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) size -= sizeof(hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) pp->busy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) char __user *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) /* Not implemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) msleep_interruptible(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static ssize_t smu_read(struct file *file, char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) struct smu_private *pp = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) if (pp->mode == smu_file_commands)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return smu_read_command(file, pp, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) if (pp->mode == smu_file_events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) return smu_read_events(file, pp, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) return -EBADFD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) static __poll_t smu_fpoll(struct file *file, poll_table *wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) struct smu_private *pp = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) __poll_t mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (pp == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) if (pp->mode == smu_file_commands) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) poll_wait(file, &pp->wait, wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) if (pp->busy && pp->cmd.status != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) mask |= EPOLLIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) if (pp->mode == smu_file_events) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) /* Not yet implemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) return mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) static int smu_release(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) struct smu_private *pp = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) unsigned int busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) if (pp == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) file->private_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) /* Mark file as closing to avoid races with new request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) pp->mode = smu_file_closing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) busy = pp->busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) /* Wait for any pending request to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) if (busy && pp->cmd.status == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) DECLARE_WAITQUEUE(wait, current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) add_wait_queue(&pp->wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) set_current_state(TASK_UNINTERRUPTIBLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) if (pp->cmd.status != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) schedule();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) spin_lock_irqsave(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) set_current_state(TASK_RUNNING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) remove_wait_queue(&pp->wait, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) spin_unlock_irqrestore(&pp->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) spin_lock_irqsave(&smu_clist_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) list_del(&pp->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) spin_unlock_irqrestore(&smu_clist_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) kfree(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) static const struct file_operations smu_device_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) .llseek = no_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) .read = smu_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) .write = smu_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) .poll = smu_fpoll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) .open = smu_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) .release = smu_release,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) static struct miscdevice pmu_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) static int smu_device_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) if (!smu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) if (misc_register(&pmu_device) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) printk(KERN_ERR "via-pmu: cannot register misc device.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) device_initcall(smu_device_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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