^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * lp5523.c - LP5523, LP55231 LED Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Milo(Woogyom) Kim <milo.kim@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_data/leds-lp55xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "leds-lp55xx-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LP5523_PROGRAM_LENGTH 32 /* bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Memory is used like this:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * 0x00 engine 1 program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 0x10 engine 2 program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 0x20 engine 3 program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 0x30 engine 1 muxing info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * 0x40 engine 2 muxing info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 0x50 engine 3 muxing info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LP5523_MAX_LEDS 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LP5523_REG_ENABLE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LP5523_REG_OP_MODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LP5523_REG_ENABLE_LEDS_MSB 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LP5523_REG_ENABLE_LEDS_LSB 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LP5523_REG_LED_CTRL_BASE 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define LP5523_REG_LED_PWM_BASE 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LP5523_REG_LED_CURRENT_BASE 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LP5523_REG_CONFIG 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LP5523_REG_STATUS 0x3A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LP5523_REG_RESET 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LP5523_REG_LED_TEST_CTRL 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LP5523_REG_LED_TEST_ADC 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define LP5523_REG_MASTER_FADER_BASE 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LP5523_REG_CH1_PROG_START 0x4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LP5523_REG_CH2_PROG_START 0x4D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define LP5523_REG_CH3_PROG_START 0x4E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define LP5523_REG_PROG_PAGE_SEL 0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LP5523_REG_PROG_MEM 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Bit description in registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define LP5523_ENABLE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LP5523_AUTO_INC 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define LP5523_PWR_SAVE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define LP5523_PWM_PWR_SAVE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define LP5523_CP_AUTO 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LP5523_AUTO_CLK 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define LP5523_EN_LEDTEST 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define LP5523_LEDTEST_DONE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define LP5523_RESET 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define LP5523_ADC_SHORTCIRC_LIM 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define LP5523_EXT_CLK_USED 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define LP5523_ENG_STATUS_MASK 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define LP5523_FADER_MAPPING_MASK 0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define LP5523_FADER_MAPPING_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Memory Page Selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define LP5523_PAGE_ENG1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define LP5523_PAGE_ENG2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LP5523_PAGE_ENG3 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define LP5523_PAGE_MUX1 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define LP5523_PAGE_MUX2 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define LP5523_PAGE_MUX3 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Program Memory Operations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LP5523_MODE_ENG1_M 0x30 /* Operation Mode Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define LP5523_MODE_ENG2_M 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define LP5523_MODE_ENG3_M 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define LP5523_LOAD_ENG1 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define LP5523_LOAD_ENG2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define LP5523_LOAD_ENG3 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define LP5523_ENG1_IS_LOADING(mode) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ((mode & LP5523_MODE_ENG1_M) == LP5523_LOAD_ENG1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define LP5523_ENG2_IS_LOADING(mode) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ((mode & LP5523_MODE_ENG2_M) == LP5523_LOAD_ENG2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define LP5523_ENG3_IS_LOADING(mode) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ((mode & LP5523_MODE_ENG3_M) == LP5523_LOAD_ENG3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define LP5523_EXEC_ENG1_M 0x30 /* Enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define LP5523_EXEC_ENG2_M 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define LP5523_EXEC_ENG3_M 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define LP5523_EXEC_M 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LP5523_RUN_ENG1 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define LP5523_RUN_ENG2 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define LP5523_RUN_ENG3 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define LED_ACTIVE(mux, led) (!!(mux & (0x0001 << led)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) enum lp5523_chip_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) LP5523,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) LP55231,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int lp5523_init_program_engine(struct lp55xx_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline void lp5523_wait_opmode_done(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static void lp5523_set_led_current(struct lp55xx_led *led, u8 led_current)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) led->led_current = led_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) lp55xx_write(led->chip, LP5523_REG_LED_CURRENT_BASE + led->chan_nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) led_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int lp5523_post_init_device(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = lp55xx_write(chip, LP5523_REG_ENABLE, LP5523_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Chip startup time is 500 us, 1 - 2 ms gives some margin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ret = lp55xx_write(chip, LP5523_REG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) LP5523_AUTO_INC | LP5523_PWR_SAVE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) LP5523_CP_AUTO | LP5523_AUTO_CLK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) LP5523_PWM_PWR_SAVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* turn on all leds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_MSB, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ret = lp55xx_write(chip, LP5523_REG_ENABLE_LEDS_LSB, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return lp5523_init_program_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static void lp5523_load_engine(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) enum lp55xx_engine_index idx = chip->engine_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static const u8 mask[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) [LP55XX_ENGINE_1] = LP5523_MODE_ENG1_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) [LP55XX_ENGINE_2] = LP5523_MODE_ENG2_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [LP55XX_ENGINE_3] = LP5523_MODE_ENG3_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const u8 val[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) [LP55XX_ENGINE_1] = LP5523_LOAD_ENG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) [LP55XX_ENGINE_2] = LP5523_LOAD_ENG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) [LP55XX_ENGINE_3] = LP5523_LOAD_ENG3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) lp55xx_update_bits(chip, LP5523_REG_OP_MODE, mask[idx], val[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) lp5523_wait_opmode_done();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static void lp5523_load_engine_and_select_page(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) enum lp55xx_engine_index idx = chip->engine_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static const u8 page_sel[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) [LP55XX_ENGINE_1] = LP5523_PAGE_ENG1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) [LP55XX_ENGINE_2] = LP5523_PAGE_ENG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) [LP55XX_ENGINE_3] = LP5523_PAGE_ENG3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) lp5523_load_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) lp55xx_write(chip, LP5523_REG_PROG_PAGE_SEL, page_sel[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void lp5523_stop_all_engines(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) lp55xx_write(chip, LP5523_REG_OP_MODE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) lp5523_wait_opmode_done();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static void lp5523_stop_engine(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) enum lp55xx_engine_index idx = chip->engine_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static const u8 mask[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) [LP55XX_ENGINE_1] = LP5523_MODE_ENG1_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) [LP55XX_ENGINE_2] = LP5523_MODE_ENG2_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) [LP55XX_ENGINE_3] = LP5523_MODE_ENG3_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) lp55xx_update_bits(chip, LP5523_REG_OP_MODE, mask[idx], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) lp5523_wait_opmode_done();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static void lp5523_turn_off_channels(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) for (i = 0; i < LP5523_MAX_LEDS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void lp5523_run_engine(struct lp55xx_chip *chip, bool start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 exec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* stop engine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (!start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) lp5523_stop_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) lp5523_turn_off_channels(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * To run the engine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * operation mode and enable register should updated at the same time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ret = lp55xx_read(chip, LP5523_REG_OP_MODE, &mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ret = lp55xx_read(chip, LP5523_REG_ENABLE, &exec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* change operation mode to RUN only when each engine is loading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (LP5523_ENG1_IS_LOADING(mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) mode = (mode & ~LP5523_MODE_ENG1_M) | LP5523_RUN_ENG1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) exec = (exec & ~LP5523_EXEC_ENG1_M) | LP5523_RUN_ENG1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (LP5523_ENG2_IS_LOADING(mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) mode = (mode & ~LP5523_MODE_ENG2_M) | LP5523_RUN_ENG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) exec = (exec & ~LP5523_EXEC_ENG2_M) | LP5523_RUN_ENG2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (LP5523_ENG3_IS_LOADING(mode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mode = (mode & ~LP5523_MODE_ENG3_M) | LP5523_RUN_ENG3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) exec = (exec & ~LP5523_EXEC_ENG3_M) | LP5523_RUN_ENG3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) lp55xx_write(chip, LP5523_REG_OP_MODE, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) lp5523_wait_opmode_done();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) lp55xx_update_bits(chip, LP5523_REG_ENABLE, LP5523_EXEC_M, exec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int lp5523_init_program_engine(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* one pattern per engine setting LED MUX start and stop addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static const u8 pattern[][LP5523_PROGRAM_LENGTH] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) { 0x9c, 0x30, 0x9c, 0xb0, 0x9d, 0x80, 0xd8, 0x00, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) { 0x9c, 0x40, 0x9c, 0xc0, 0x9d, 0x80, 0xd8, 0x00, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) { 0x9c, 0x50, 0x9c, 0xd0, 0x9d, 0x80, 0xd8, 0x00, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* hardcode 32 bytes of memory for each engine from program memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = lp55xx_write(chip, LP5523_REG_CH1_PROG_START, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = lp55xx_write(chip, LP5523_REG_CH2_PROG_START, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ret = lp55xx_write(chip, LP5523_REG_CH3_PROG_START, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* write LED MUX address space for each engine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) for (i = LP55XX_ENGINE_1; i <= LP55XX_ENGINE_3; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) chip->engine_idx = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) lp5523_load_engine_and_select_page(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) for (j = 0; j < LP5523_PROGRAM_LENGTH; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + j,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) pattern[i - 1][j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) lp5523_run_engine(chip, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* Let the programs run for couple of ms and check the engine status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) usleep_range(3000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) status &= LP5523_ENG_STATUS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (status != LP5523_ENG_STATUS_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) dev_err(&chip->cl->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) "could not configure LED engine, status = 0x%.2x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) lp5523_stop_all_engines(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int lp5523_update_program_memory(struct lp55xx_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) const u8 *data, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u8 pattern[LP5523_PROGRAM_LENGTH] = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned int cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) char c[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int nrchars;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) int offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) while ((offset < size - 1) && (i < LP5523_PROGRAM_LENGTH)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* separate sscanfs because length is working only for %s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) ret = sscanf(data + offset, "%2s%n ", c, &nrchars);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ret = sscanf(c, "%2x", &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) pattern[i] = (u8)cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) offset += nrchars;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* Each instruction is 16bit long. Check that length is even */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (i % 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) for (i = 0; i < LP5523_PROGRAM_LENGTH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + i, pattern[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev_err(&chip->cl->dev, "wrong pattern format\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static void lp5523_firmware_loaded(struct lp55xx_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) const struct firmware *fw = chip->fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (fw->size > LP5523_PROGRAM_LENGTH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * Program memory sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * 1) set engine mode to "LOAD"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * 2) write firmware data into program memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) lp5523_load_engine_and_select_page(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) lp5523_update_program_memory(chip, fw->data, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static ssize_t show_engine_mode(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) char *buf, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case LP55XX_ENGINE_RUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return sprintf(buf, "run\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) case LP55XX_ENGINE_LOAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return sprintf(buf, "load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case LP55XX_ENGINE_DISABLED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return sprintf(buf, "disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) show_mode(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) show_mode(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) show_mode(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static ssize_t store_engine_mode(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) const char *buf, size_t len, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct lp55xx_engine *engine = &chip->engines[nr - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) chip->engine_idx = nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!strncmp(buf, "run", 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) lp5523_run_engine(chip, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) engine->mode = LP55XX_ENGINE_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) } else if (!strncmp(buf, "load", 4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) lp5523_stop_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) lp5523_load_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) engine->mode = LP55XX_ENGINE_LOAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) } else if (!strncmp(buf, "disabled", 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) lp5523_stop_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) engine->mode = LP55XX_ENGINE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) store_mode(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) store_mode(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) store_mode(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static int lp5523_mux_parse(const char *buf, u16 *mux, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u16 tmp_mux = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) len = min_t(int, len, LP5523_MAX_LEDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) for (i = 0; i < len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) switch (buf[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) case '1':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) tmp_mux |= (1 << i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) case '0':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) case '\n':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) i = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) *mux = tmp_mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static void lp5523_mux_to_array(u16 led_mux, char *array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) int i, pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) for (i = 0; i < LP5523_MAX_LEDS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) pos += sprintf(array + pos, "%x", LED_ACTIVE(led_mux, i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) array[pos] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static ssize_t show_engine_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) char *buf, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) char mux[LP5523_MAX_LEDS + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) lp5523_mux_to_array(chip->engines[nr - 1].led_mux, mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return sprintf(buf, "%s\n", mux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) show_leds(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) show_leds(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) show_leds(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static int lp5523_load_mux(struct lp55xx_chip *chip, u16 mux, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct lp55xx_engine *engine = &chip->engines[nr - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static const u8 mux_page[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) [LP55XX_ENGINE_1] = LP5523_PAGE_MUX1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) [LP55XX_ENGINE_2] = LP5523_PAGE_MUX2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) [LP55XX_ENGINE_3] = LP5523_PAGE_MUX3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) lp5523_load_engine(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ret = lp55xx_write(chip, LP5523_REG_PROG_PAGE_SEL, mux_page[nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ret = lp55xx_write(chip, LP5523_REG_PROG_MEM, (u8)(mux >> 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + 1, (u8)(mux));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) engine->led_mux = mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static ssize_t store_engine_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) const char *buf, size_t len, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct lp55xx_engine *engine = &chip->engines[nr - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) u16 mux = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (lp5523_mux_parse(buf, &mux, len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) chip->engine_idx = nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (engine->mode != LP55XX_ENGINE_LOAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (lp5523_load_mux(chip, mux, nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ret = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) leave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) store_leds(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) store_leds(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) store_leds(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static ssize_t store_engine_load(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) const char *buf, size_t len, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) chip->engine_idx = nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) lp5523_load_engine_and_select_page(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ret = lp5523_update_program_memory(chip, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) store_load(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) store_load(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) store_load(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static ssize_t lp5523_selftest(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct lp55xx_platform_data *pdata = chip->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int i, ret, pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u8 status, adc, vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Check that ext clock is really in use if requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (pdata->clock_mode == LP55XX_CLOCK_EXT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if ((status & LP5523_EXT_CLK_USED) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* Measure VDD (i.e. VBAT) first (channel 16 corresponds to VDD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL, LP5523_EN_LEDTEST | 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) usleep_range(3000, 6000); /* ADC conversion time is typically 2.7 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (!(status & LP5523_LEDTEST_DONE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) usleep_range(3000, 6000); /* Was not ready. Wait little bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) vdd--; /* There may be some fluctuation in measurement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) for (i = 0; i < LP5523_MAX_LEDS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /* Skip non-existing channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (pdata->led_config[i].led_current == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* Set default current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) pdata->led_config[i].led_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* let current stabilize 2 - 4ms before measurements start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) usleep_range(2000, 4000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) lp55xx_write(chip, LP5523_REG_LED_TEST_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) LP5523_EN_LEDTEST | i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* ADC conversion time is 2.7 ms typically */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) usleep_range(3000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ret = lp55xx_read(chip, LP5523_REG_STATUS, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (!(status & LP5523_LEDTEST_DONE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) usleep_range(3000, 6000);/* Was not ready. Wait. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ret = lp55xx_read(chip, LP5523_REG_LED_TEST_ADC, &adc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (adc >= vdd || adc < LP5523_ADC_SHORTCIRC_LIM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) pos += sprintf(buf + pos, "LED %d FAIL\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + i, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) /* Restore current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) lp55xx_write(chip, LP5523_REG_LED_CURRENT_BASE + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) led->led_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) led++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (pos == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) pos = sprintf(buf, "OK\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) goto release_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pos = sprintf(buf, "FAIL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) release_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) return pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) #define show_fader(nr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static ssize_t show_master_fader##nr(struct device *dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) struct device_attribute *attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) char *buf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return show_master_fader(dev, attr, buf, nr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) #define store_fader(nr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static ssize_t store_master_fader##nr(struct device *dev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) struct device_attribute *attr, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) const char *buf, size_t len) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return store_master_fader(dev, attr, buf, len, nr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static ssize_t show_master_fader(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) char *buf, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) ret = lp55xx_read(chip, LP5523_REG_MASTER_FADER_BASE + nr - 1, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ret = sprintf(buf, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) show_fader(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) show_fader(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) show_fader(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static ssize_t store_master_fader(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) const char *buf, size_t len, int nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (kstrtoul(buf, 0, &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (val > 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) ret = lp55xx_write(chip, LP5523_REG_MASTER_FADER_BASE + nr - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) (u8)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (ret == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ret = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) store_fader(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) store_fader(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) store_fader(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) static ssize_t show_master_fader_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) int i, ret, pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) for (i = 0; i < LP5523_MAX_LEDS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) ret = lp55xx_read(chip, LP5523_REG_LED_CTRL_BASE + i, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) val = (val & LP5523_FADER_MAPPING_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) >> LP5523_FADER_MAPPING_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (val > 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) buf[pos++] = val + '0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) buf[pos++] = '\n';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ret = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) leave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static ssize_t store_master_fader_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) int i, n, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) n = min_t(int, len, LP5523_MAX_LEDS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) for (i = 0; i < n; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (buf[i] >= '0' && buf[i] <= '3') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) val = (buf[i] - '0') << LP5523_FADER_MAPPING_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) ret = lp55xx_update_bits(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) LP5523_REG_LED_CTRL_BASE + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) LP5523_FADER_MAPPING_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) goto leave;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) ret = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) leave:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) static int lp5523_multicolor_brightness(struct lp55xx_led *led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) for (i = 0; i < led->mc_cdev.num_colors; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) ret = lp55xx_write(chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) LP5523_REG_LED_PWM_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) led->mc_cdev.subled_info[i].channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) led->mc_cdev.subled_info[i].brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) static int lp5523_led_brightness(struct lp55xx_led *led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) ret = lp55xx_write(chip, LP5523_REG_LED_PWM_BASE + led->chan_nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) led->brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static LP55XX_DEV_ATTR_RW(engine1_mode, show_engine1_mode, store_engine1_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static LP55XX_DEV_ATTR_RW(engine2_mode, show_engine2_mode, store_engine2_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) static LP55XX_DEV_ATTR_RW(engine3_mode, show_engine3_mode, store_engine3_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static LP55XX_DEV_ATTR_RW(engine1_leds, show_engine1_leds, store_engine1_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) static LP55XX_DEV_ATTR_RW(engine2_leds, show_engine2_leds, store_engine2_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static LP55XX_DEV_ATTR_RW(engine3_leds, show_engine3_leds, store_engine3_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static LP55XX_DEV_ATTR_WO(engine1_load, store_engine1_load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) static LP55XX_DEV_ATTR_WO(engine2_load, store_engine2_load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) static LP55XX_DEV_ATTR_WO(engine3_load, store_engine3_load);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) static LP55XX_DEV_ATTR_RO(selftest, lp5523_selftest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static LP55XX_DEV_ATTR_RW(master_fader1, show_master_fader1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) store_master_fader1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static LP55XX_DEV_ATTR_RW(master_fader2, show_master_fader2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) store_master_fader2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static LP55XX_DEV_ATTR_RW(master_fader3, show_master_fader3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) store_master_fader3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) static LP55XX_DEV_ATTR_RW(master_fader_leds, show_master_fader_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) store_master_fader_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) static struct attribute *lp5523_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) &dev_attr_engine1_mode.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) &dev_attr_engine2_mode.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) &dev_attr_engine3_mode.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) &dev_attr_engine1_load.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) &dev_attr_engine2_load.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) &dev_attr_engine3_load.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) &dev_attr_engine1_leds.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) &dev_attr_engine2_leds.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) &dev_attr_engine3_leds.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) &dev_attr_selftest.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) &dev_attr_master_fader1.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) &dev_attr_master_fader2.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) &dev_attr_master_fader3.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) &dev_attr_master_fader_leds.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static const struct attribute_group lp5523_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) .attrs = lp5523_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* Chip specific configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static struct lp55xx_device_config lp5523_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .reset = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .addr = LP5523_REG_RESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) .val = LP5523_RESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .enable = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .addr = LP5523_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .val = LP5523_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .max_channel = LP5523_MAX_LEDS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .post_init_device = lp5523_post_init_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .brightness_fn = lp5523_led_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .multicolor_brightness_fn = lp5523_multicolor_brightness,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .set_led_current = lp5523_set_led_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .firmware_cb = lp5523_firmware_loaded,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .run_engine = lp5523_run_engine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .dev_attr_group = &lp5523_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) static int lp5523_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) struct lp55xx_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) struct lp55xx_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct lp55xx_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) struct device_node *np = dev_of_node(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) chip->cfg = &lp5523_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) pdata = lp55xx_of_populate_pdata(&client->dev, np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (IS_ERR(pdata))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) return PTR_ERR(pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) dev_err(&client->dev, "no platform data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) led = devm_kcalloc(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) pdata->num_channels, sizeof(*led), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) if (!led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) chip->cl = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) chip->pdata = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) mutex_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) i2c_set_clientdata(client, led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) ret = lp55xx_init_device(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) goto err_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) dev_info(&client->dev, "%s Programmable led chip found\n", id->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) ret = lp55xx_register_leds(led, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) ret = lp55xx_register_sysfs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) dev_err(&client->dev, "registering sysfs failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) lp55xx_deinit_device(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) err_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) static int lp5523_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) struct lp55xx_led *led = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) struct lp55xx_chip *chip = led->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) lp5523_stop_all_engines(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) lp55xx_unregister_sysfs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) lp55xx_deinit_device(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) static const struct i2c_device_id lp5523_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) { "lp5523", LP5523 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) { "lp55231", LP55231 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) MODULE_DEVICE_TABLE(i2c, lp5523_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) static const struct of_device_id of_lp5523_leds_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) { .compatible = "national,lp5523", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) { .compatible = "ti,lp55231", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) MODULE_DEVICE_TABLE(of, of_lp5523_leds_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) static struct i2c_driver lp5523_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) .name = "lp5523x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) .of_match_table = of_match_ptr(of_lp5523_leds_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .probe = lp5523_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .remove = lp5523_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .id_table = lp5523_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) module_i2c_driver(lp5523_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) MODULE_AUTHOR("Mathias Nyman <mathias.nyman@nokia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) MODULE_DESCRIPTION("LP5523 LED engine");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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