Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) * Simple driver for Texas Instruments LM3642 LED Flash driver chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) * Copyright (C) 2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/platform_data/leds-lm3642.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define	REG_FILT_TIME			(0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define	REG_IVFM_MODE			(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define	REG_TORCH_TIME			(0x6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define	REG_FLASH			(0x8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define	REG_I_CTRL			(0x9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define	REG_ENABLE			(0xA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define	REG_FLAG			(0xB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define	REG_MAX				(0xB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define	UVLO_EN_SHIFT			(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define	IVM_D_TH_SHIFT			(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define	TORCH_RAMP_UP_TIME_SHIFT	(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define	TORCH_RAMP_DN_TIME_SHIFT	(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define	INDUCTOR_I_LIMIT_SHIFT		(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define	FLASH_RAMP_TIME_SHIFT		(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define	FLASH_TOUT_TIME_SHIFT		(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define	TORCH_I_SHIFT			(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define	FLASH_I_SHIFT			(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define	IVFM_SHIFT			(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define	TX_PIN_EN_SHIFT			(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define	STROBE_PIN_EN_SHIFT		(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define	TORCH_PIN_EN_SHIFT		(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define	MODE_BITS_SHIFT			(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define	UVLO_EN_MASK			(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define	IVM_D_TH_MASK			(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define	TORCH_RAMP_UP_TIME_MASK		(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define	TORCH_RAMP_DN_TIME_MASK		(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define	INDUCTOR_I_LIMIT_MASK		(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define	FLASH_RAMP_TIME_MASK		(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define	FLASH_TOUT_TIME_MASK		(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define	TORCH_I_MASK			(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define	FLASH_I_MASK			(0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define	IVFM_MASK			(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define	TX_PIN_EN_MASK			(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define	STROBE_PIN_EN_MASK		(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define	TORCH_PIN_EN_MASK		(0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define	MODE_BITS_MASK			(0x73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define EX_PIN_CONTROL_MASK		(0x71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define EX_PIN_ENABLE_MASK		(0x70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) enum lm3642_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	MODES_STASNDBY = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	MODES_INDIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	MODES_TORCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	MODES_FLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) struct lm3642_chip_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct led_classdev cdev_flash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	struct led_classdev cdev_torch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct led_classdev cdev_indicator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u8 br_flash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 br_torch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	u8 br_indicator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	enum lm3642_torch_pin_enable torch_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	enum lm3642_strobe_pin_enable strobe_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	enum lm3642_tx_pin_enable tx_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct lm3642_platform_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	unsigned int last_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) /* chip initialize */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static int lm3642_chip_init(struct lm3642_chip_data *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct lm3642_platform_data *pdata = chip->pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/* set enable register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	ret = regmap_update_bits(chip->regmap, REG_ENABLE, EX_PIN_ENABLE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				 pdata->tx_pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		dev_err(chip->dev, "Failed to update REG_ENABLE Register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* chip control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int lm3642_control(struct lm3642_chip_data *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 			  u8 brightness, enum lm3642_mode opmode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	ret = regmap_read(chip->regmap, REG_FLAG, &chip->last_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		dev_err(chip->dev, "Failed to read REG_FLAG Register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (chip->last_flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		dev_info(chip->dev, "Last FLAG is 0x%x\n", chip->last_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	/* brightness 0 means off-state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (!brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		opmode = MODES_STASNDBY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	switch (opmode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	case MODES_TORCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		ret = regmap_update_bits(chip->regmap, REG_I_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 					 TORCH_I_MASK << TORCH_I_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 					 (brightness - 1) << TORCH_I_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		if (chip->torch_pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			opmode |= (TORCH_PIN_EN_MASK << TORCH_PIN_EN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	case MODES_FLASH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		ret = regmap_update_bits(chip->regmap, REG_I_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 					 FLASH_I_MASK << FLASH_I_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 					 (brightness - 1) << FLASH_I_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		if (chip->strobe_pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			opmode |= (STROBE_PIN_EN_MASK << STROBE_PIN_EN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	case MODES_INDIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		ret = regmap_update_bits(chip->regmap, REG_I_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 					 TORCH_I_MASK << TORCH_I_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 					 (brightness - 1) << TORCH_I_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	case MODES_STASNDBY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		dev_err(chip->dev, "Failed to write REG_I_CTRL Register\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (chip->tx_pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		opmode |= (TX_PIN_EN_MASK << TX_PIN_EN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	ret = regmap_update_bits(chip->regmap, REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				 MODE_BITS_MASK << MODE_BITS_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 				 opmode << MODE_BITS_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* torch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* torch pin config for lm3642 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static ssize_t lm3642_torch_pin_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 				      struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				      const char *buf, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	struct led_classdev *led_cdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct lm3642_chip_data *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	    container_of(led_cdev, struct lm3642_chip_data, cdev_indicator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	unsigned int state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	ret = kstrtouint(buf, 10, &state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (state != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		state = 0x01 << TORCH_PIN_EN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	chip->torch_pin = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	ret = regmap_update_bits(chip->regmap, REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				 TORCH_PIN_EN_MASK << TORCH_PIN_EN_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				 state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		dev_err(chip->dev, "%s:i2c access fail to register\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static DEVICE_ATTR(torch_pin, S_IWUSR, NULL, lm3642_torch_pin_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static int lm3642_torch_brightness_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 					enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	struct lm3642_chip_data *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	    container_of(cdev, struct lm3642_chip_data, cdev_torch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	chip->br_torch = brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	ret = lm3642_control(chip, chip->br_torch, MODES_TORCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* strobe pin config for lm3642*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static ssize_t lm3642_strobe_pin_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				       struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				       const char *buf, size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct led_classdev *led_cdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	struct lm3642_chip_data *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	    container_of(led_cdev, struct lm3642_chip_data, cdev_indicator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	unsigned int state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = kstrtouint(buf, 10, &state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (state != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		state = 0x01 << STROBE_PIN_EN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	chip->strobe_pin = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	ret = regmap_update_bits(chip->regmap, REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 				 STROBE_PIN_EN_MASK << STROBE_PIN_EN_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 				 state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		dev_err(chip->dev, "%s:i2c access fail to register\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static DEVICE_ATTR(strobe_pin, S_IWUSR, NULL, lm3642_strobe_pin_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int lm3642_strobe_brightness_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 					 enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	struct lm3642_chip_data *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	    container_of(cdev, struct lm3642_chip_data, cdev_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	chip->br_flash = brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	ret = lm3642_control(chip, chip->br_flash, MODES_FLASH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static int lm3642_indicator_brightness_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 					    enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	struct lm3642_chip_data *chip =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	    container_of(cdev, struct lm3642_chip_data, cdev_indicator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	mutex_lock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	chip->br_indicator = brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	ret = lm3642_control(chip, chip->br_indicator, MODES_INDIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	mutex_unlock(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static const struct regmap_config lm3642_regmap = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	.max_register = REG_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static struct attribute *lm3642_flash_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	&dev_attr_strobe_pin.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ATTRIBUTE_GROUPS(lm3642_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static struct attribute *lm3642_torch_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	&dev_attr_torch_pin.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ATTRIBUTE_GROUPS(lm3642_torch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static int lm3642_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				  const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	struct lm3642_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	struct lm3642_chip_data *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		dev_err(&client->dev, "i2c functionality check fail.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (pdata == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		dev_err(&client->dev, "needs Platform Data.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	chip = devm_kzalloc(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			    sizeof(struct lm3642_chip_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	chip->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	chip->pdata = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	chip->tx_pin = pdata->tx_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	chip->torch_pin = pdata->torch_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	chip->strobe_pin = pdata->strobe_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	chip->regmap = devm_regmap_init_i2c(client, &lm3642_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	if (IS_ERR(chip->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		err = PTR_ERR(chip->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		dev_err(&client->dev, "Failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	mutex_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	i2c_set_clientdata(client, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	err = lm3642_chip_init(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	/* flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	chip->cdev_flash.name = "flash";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	chip->cdev_flash.max_brightness = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	chip->cdev_flash.brightness_set_blocking = lm3642_strobe_brightness_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	chip->cdev_flash.default_trigger = "flash";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	chip->cdev_flash.groups = lm3642_flash_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	err = led_classdev_register(&client->dev, &chip->cdev_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		dev_err(chip->dev, "failed to register flash\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	/* torch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	chip->cdev_torch.name = "torch";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	chip->cdev_torch.max_brightness = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	chip->cdev_torch.brightness_set_blocking = lm3642_torch_brightness_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	chip->cdev_torch.default_trigger = "torch";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	chip->cdev_torch.groups = lm3642_torch_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	err = led_classdev_register(&client->dev, &chip->cdev_torch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		dev_err(chip->dev, "failed to register torch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		goto err_create_torch_file;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	/* indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	chip->cdev_indicator.name = "indicator";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	chip->cdev_indicator.max_brightness = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	chip->cdev_indicator.brightness_set_blocking =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 						lm3642_indicator_brightness_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	err = led_classdev_register(&client->dev, &chip->cdev_indicator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		dev_err(chip->dev, "failed to register indicator\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		goto err_create_indicator_file;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	dev_info(&client->dev, "LM3642 is initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) err_create_indicator_file:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	led_classdev_unregister(&chip->cdev_torch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) err_create_torch_file:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	led_classdev_unregister(&chip->cdev_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static int lm3642_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	struct lm3642_chip_data *chip = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	led_classdev_unregister(&chip->cdev_indicator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	led_classdev_unregister(&chip->cdev_torch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	led_classdev_unregister(&chip->cdev_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	regmap_write(chip->regmap, REG_ENABLE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static const struct i2c_device_id lm3642_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	{LM3642_NAME, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) MODULE_DEVICE_TABLE(i2c, lm3642_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static struct i2c_driver lm3642_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		   .name = LM3642_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		   .pm = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		   },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	.probe = lm3642_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	.remove = lm3642_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	.id_table = lm3642_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) module_i2c_driver(lm3642_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) MODULE_DESCRIPTION("Texas Instruments Flash Lighting driver for LM3642");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MODULE_AUTHOR("Daniel Jeong <daniel.jeong@ti.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MODULE_AUTHOR("G.Shark Jeong <gshark.jeong@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) MODULE_LICENSE("GPL v2");