^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // TI LM3532 LED driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // https://www.ti.com/lit/ds/symlink/lm3532.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <uapi/linux/uleds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define LM3532_NAME "lm3532-led"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LM3532_BL_MODE_MANUAL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define LM3532_BL_MODE_ALS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define LM3532_REG_OUTPUT_CFG 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LM3532_REG_STARTSHUT_RAMP 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define LM3532_REG_RT_RAMP 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LM3532_REG_PWM_A_CFG 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define LM3532_REG_PWM_B_CFG 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define LM3532_REG_PWM_C_CFG 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LM3532_REG_ZONE_CFG_A 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LM3532_REG_CTRL_A_FS_CURR 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LM3532_REG_ZONE_CFG_B 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LM3532_REG_CTRL_B_FS_CURR 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LM3532_REG_ZONE_CFG_C 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LM3532_REG_CTRL_C_FS_CURR 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LM3532_REG_ENABLE 0x1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LM3532_ALS_CONFIG 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LM3532_REG_ZN_0_HI 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LM3532_REG_ZN_0_LO 0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LM3532_REG_ZN_1_HI 0x62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LM3532_REG_ZN_1_LO 0x63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LM3532_REG_ZN_2_HI 0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LM3532_REG_ZN_2_LO 0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LM3532_REG_ZN_3_HI 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define LM3532_REG_ZN_3_LO 0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LM3532_REG_ZONE_TRGT_A 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LM3532_REG_ZONE_TRGT_B 0x75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM3532_REG_ZONE_TRGT_C 0x7a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LM3532_REG_MAX 0x7e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Control Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define LM3532_CTRL_A_ENABLE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LM3532_CTRL_B_ENABLE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LM3532_CTRL_C_ENABLE BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* PWM Zone Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LM3532_PWM_ZONE_MASK 0x7c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define LM3532_PWM_ZONE_0_EN BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define LM3532_PWM_ZONE_1_EN BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define LM3532_PWM_ZONE_2_EN BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define LM3532_PWM_ZONE_3_EN BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define LM3532_PWM_ZONE_4_EN BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Brightness Configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define LM3532_I2C_CTRL BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define LM3532_ALS_CTRL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define LM3532_LINEAR_MAP BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define LM3532_ZONE_MASK (BIT(2) | BIT(3) | BIT(4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define LM3532_ZONE_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define LM3532_ZONE_1 BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define LM3532_ZONE_2 BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define LM3532_ZONE_3 (BIT(2) | BIT(3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define LM3532_ZONE_4 BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define LM3532_ENABLE_ALS BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define LM3532_ALS_SEL_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Zone Boundary Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define LM3532_ALS_WINDOW_mV 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LM3532_ALS_ZB_MAX 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define LM3532_ALS_OFFSET_mV 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define LM3532_CONTROL_A 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define LM3532_CONTROL_B 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LM3532_CONTROL_C 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LM3532_MAX_CONTROL_BANKS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define LM3532_MAX_LED_STRINGS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define LM3532_OUTPUT_CFG_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define LM3532_BRT_VAL_ADJUST 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define LM3532_RAMP_DOWN_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define LM3532_NUM_RAMP_VALS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define LM3532_NUM_AVG_VALS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define LM3532_NUM_IMP_VALS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define LM3532_FS_CURR_MIN 5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define LM3532_FS_CURR_MAX 29800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LM3532_FS_CURR_STEP 800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * struct lm3532_als_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @config: value of ALS configuration register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @als1_imp_sel: value of ALS1 resistor select register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @als2_imp_sel: value of ALS2 resistor select register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * @als_avrg_time: ALS averaging time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @als_input_mode: ALS input mode for brightness control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @als_vmin: Minimum ALS voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @als_vmax: Maximum ALS voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @zone_lo: values of ALS lo ZB(Zone Boundary) registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @zone_hi: values of ALS hi ZB(Zone Boundary) registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct lm3532_als_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 als1_imp_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 als2_imp_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 als_avrg_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 als_input_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 als_vmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 als_vmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 zones_lo[LM3532_ALS_ZB_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 zones_hi[LM3532_ALS_ZB_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * struct lm3532_led
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @led_dev: led class device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @priv: Pointer the device data structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * @control_bank: Control bank the LED is associated to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @mode: Mode of the LED string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * @ctrl_brt_pointer: Zone target register that controls the sink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @num_leds: Number of LED strings are supported in this array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @full_scale_current: The full-scale current setting for the current sink.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @led_strings: The LED strings supported in this array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @enabled: Enabled status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct lm3532_led {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct led_classdev led_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct lm3532_data *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int control_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int ctrl_brt_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int num_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int full_scale_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int enabled:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u32 led_strings[LM3532_MAX_CONTROL_BANKS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * struct lm3532_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * @enable_gpio: Hardware enable gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * @regulator: regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * @client: i2c client
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * @regmap: Devices register map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @dev: Pointer to the devices device struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * @lock: Lock for reading/writing the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @als_data: Pointer to the als data struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @runtime_ramp_up: Runtime ramp up setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * @runtime_ramp_down: Runtime ramp down setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * @leds: Array of LED strings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct lm3532_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct gpio_desc *enable_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct regulator *regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct lm3532_als_data *als_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) u32 runtime_ramp_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u32 runtime_ramp_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct lm3532_led leds[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static const struct reg_default lm3532_reg_defs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {LM3532_REG_OUTPUT_CFG, 0xe4},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {LM3532_REG_STARTSHUT_RAMP, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {LM3532_REG_RT_RAMP, 0xc0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {LM3532_REG_PWM_A_CFG, 0x82},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {LM3532_REG_PWM_B_CFG, 0x82},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {LM3532_REG_PWM_C_CFG, 0x82},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {LM3532_REG_ZONE_CFG_A, 0xf1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {LM3532_REG_CTRL_A_FS_CURR, 0xf3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {LM3532_REG_ZONE_CFG_B, 0xf1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {LM3532_REG_CTRL_B_FS_CURR, 0xf3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {LM3532_REG_ZONE_CFG_C, 0xf1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {LM3532_REG_CTRL_C_FS_CURR, 0xf3},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {LM3532_REG_ENABLE, 0xf8},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {LM3532_ALS_CONFIG, 0x44},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {LM3532_REG_ZN_0_HI, 0x35},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {LM3532_REG_ZN_0_LO, 0x33},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {LM3532_REG_ZN_1_HI, 0x6a},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {LM3532_REG_ZN_1_LO, 0x66},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {LM3532_REG_ZN_2_HI, 0xa1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {LM3532_REG_ZN_2_LO, 0x99},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {LM3532_REG_ZN_3_HI, 0xdc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {LM3532_REG_ZN_3_LO, 0xcc},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct regmap_config lm3532_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .max_register = LM3532_REG_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .reg_defaults = lm3532_reg_defs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .num_reg_defaults = ARRAY_SIZE(lm3532_reg_defs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .cache_type = REGCACHE_FLAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static const int als_imp_table[LM3532_NUM_IMP_VALS] = {37000, 18500, 12330,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 92500, 7400, 6170, 5290,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 4630, 4110, 3700, 3360,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 3080, 2850, 2640, 2440,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 2310, 2180, 2060, 1950,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 1850, 1760, 1680, 1610,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 1540, 1480, 1420, 1370,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 1320, 1280, 1230, 1190};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static int lm3532_get_als_imp_index(int als_imped)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (als_imped > als_imp_table[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (als_imped < als_imp_table[LM3532_NUM_IMP_VALS - 1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return LM3532_NUM_IMP_VALS - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) for (i = 1; i < LM3532_NUM_IMP_VALS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (als_imped == als_imp_table[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Find an approximate index by looking up the table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (als_imped < als_imp_table[i - 1] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) als_imped > als_imp_table[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (als_imped - als_imp_table[i - 1] <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) als_imp_table[i] - als_imped)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return i + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int lm3532_get_index(const int table[], int size, int value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) for (i = 1; i < size; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (value == table[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* Find an approximate index by looking up the table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (value > table[i - 1] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) value < table[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (value - table[i - 1] < table[i] - value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return i - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static const int als_avrg_table[LM3532_NUM_AVG_VALS] = {17920, 35840, 71680,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 1433360, 286720, 573440,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 1146880, 2293760};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int lm3532_get_als_avg_index(int avg_time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (avg_time <= als_avrg_table[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (avg_time > als_avrg_table[LM3532_NUM_AVG_VALS - 1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return LM3532_NUM_AVG_VALS - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return lm3532_get_index(&als_avrg_table[0], LM3532_NUM_AVG_VALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) avg_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const int ramp_table[LM3532_NUM_RAMP_VALS] = { 8, 1024, 2048, 4096, 8192,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 16384, 32768, 65536};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int lm3532_get_ramp_index(int ramp_time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (ramp_time <= ramp_table[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (ramp_time > ramp_table[LM3532_NUM_RAMP_VALS - 1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return LM3532_NUM_RAMP_VALS - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return lm3532_get_index(&ramp_table[0], LM3532_NUM_RAMP_VALS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ramp_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /* Caller must take care of locking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static int lm3532_led_enable(struct lm3532_led *led_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int ctrl_en_val = BIT(led_data->control_bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (led_data->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ret = regmap_update_bits(led_data->priv->regmap, LM3532_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ctrl_en_val, ctrl_en_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_err(led_data->priv->dev, "Failed to set ctrl:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ret = regulator_enable(led_data->priv->regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) led_data->enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* Caller must take care of locking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int lm3532_led_disable(struct lm3532_led *led_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int ctrl_en_val = BIT(led_data->control_bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (!led_data->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ret = regmap_update_bits(led_data->priv->regmap, LM3532_REG_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ctrl_en_val, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) dev_err(led_data->priv->dev, "Failed to set ctrl:%d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ret = regulator_disable(led_data->priv->regulator);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) led_data->enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int lm3532_brightness_set(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) enum led_brightness brt_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct lm3532_led *led =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) container_of(led_cdev, struct lm3532_led, led_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u8 brightness_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) mutex_lock(&led->priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (led->mode == LM3532_ALS_CTRL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (brt_val > LED_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ret = lm3532_led_enable(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ret = lm3532_led_disable(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (brt_val == LED_OFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = lm3532_led_disable(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = lm3532_led_enable(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) brightness_reg = LM3532_REG_ZONE_TRGT_A + led->control_bank * 5 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) (led->ctrl_brt_pointer >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ret = regmap_write(led->priv->regmap, brightness_reg, brt_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) mutex_unlock(&led->priv->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static int lm3532_init_registers(struct lm3532_led *led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct lm3532_data *drvdata = led->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) unsigned int runtime_ramp_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) unsigned int output_cfg_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) unsigned int output_cfg_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) unsigned int output_cfg_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) unsigned int brightness_config_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) unsigned int brightness_config_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) int fs_current_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) int fs_current_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (drvdata->enable_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) gpiod_direction_output(drvdata->enable_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) brightness_config_reg = LM3532_REG_ZONE_CFG_A + led->control_bank * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * This could be hard coded to the default value but the control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * brightness register may have changed during boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ret = regmap_read(drvdata->regmap, brightness_config_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) &led->ctrl_brt_pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) led->ctrl_brt_pointer &= LM3532_ZONE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) brightness_config_val = led->ctrl_brt_pointer | led->mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) ret = regmap_write(drvdata->regmap, brightness_config_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) brightness_config_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (led->full_scale_current) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) fs_current_reg = LM3532_REG_CTRL_A_FS_CURR + led->control_bank * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) fs_current_val = (led->full_scale_current - LM3532_FS_CURR_MIN) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) LM3532_FS_CURR_STEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) ret = regmap_write(drvdata->regmap, fs_current_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) fs_current_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) for (i = 0; i < led->num_leds; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) output_cfg_shift = led->led_strings[i] * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) output_cfg_val |= (led->control_bank << output_cfg_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) output_cfg_mask |= LM3532_OUTPUT_CFG_MASK << output_cfg_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) ret = regmap_update_bits(drvdata->regmap, LM3532_REG_OUTPUT_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) output_cfg_mask, output_cfg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) runtime_ramp_val = drvdata->runtime_ramp_up |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) (drvdata->runtime_ramp_down << LM3532_RAMP_DOWN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return regmap_write(drvdata->regmap, LM3532_REG_RT_RAMP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) runtime_ramp_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int lm3532_als_configure(struct lm3532_data *priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct lm3532_led *led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct lm3532_als_data *als = priv->als_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u32 als_vmin, als_vmax, als_vstep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int zone_reg = LM3532_REG_ZN_0_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) als_vmin = als->als_vmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) als_vmax = als->als_vmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) als_vstep = (als_vmax - als_vmin) / ((LM3532_ALS_ZB_MAX + 1) * 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) for (i = 0; i < LM3532_ALS_ZB_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) als->zones_lo[i] = ((als_vmin + als_vstep + (i * als_vstep)) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) LED_FULL) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) als->zones_hi[i] = ((als_vmin + LM3532_ALS_OFFSET_mV +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) als_vstep + (i * als_vstep)) * LED_FULL) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) zone_reg = LM3532_REG_ZN_0_HI + i * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ret = regmap_write(priv->regmap, zone_reg, als->zones_lo[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) zone_reg += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) ret = regmap_write(priv->regmap, zone_reg, als->zones_hi[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) als->config = (als->als_avrg_time | (LM3532_ENABLE_ALS) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) (als->als_input_mode << LM3532_ALS_SEL_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return regmap_write(priv->regmap, LM3532_ALS_CONFIG, als->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int lm3532_parse_als(struct lm3532_data *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct lm3532_als_data *als;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int als_avg_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int als_impedance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) als = devm_kzalloc(priv->dev, sizeof(*als), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (als == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ret = device_property_read_u32(&priv->client->dev, "ti,als-vmin",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) &als->als_vmin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) als->als_vmin = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ret = device_property_read_u32(&priv->client->dev, "ti,als-vmax",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) &als->als_vmax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) als->als_vmax = LM3532_ALS_WINDOW_mV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (als->als_vmax > LM3532_ALS_WINDOW_mV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ret = device_property_read_u32(&priv->client->dev, "ti,als1-imp-sel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) &als_impedance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) als->als1_imp_sel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) als->als1_imp_sel = lm3532_get_als_imp_index(als_impedance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ret = device_property_read_u32(&priv->client->dev, "ti,als2-imp-sel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) &als_impedance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) als->als2_imp_sel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) als->als2_imp_sel = lm3532_get_als_imp_index(als_impedance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ret = device_property_read_u32(&priv->client->dev, "ti,als-avrg-time-us",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) &als_avg_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) als->als_avrg_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) als->als_avrg_time = lm3532_get_als_avg_index(als_avg_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) ret = device_property_read_u8(&priv->client->dev, "ti,als-input-mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) &als->als_input_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) als->als_input_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (als->als_input_mode > LM3532_BL_MODE_ALS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) priv->als_data = als;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) static int lm3532_parse_node(struct lm3532_data *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct fwnode_handle *child = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) struct lm3532_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) int control_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) u32 ramp_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) size_t i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) priv->enable_gpio = devm_gpiod_get_optional(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) "enable", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (IS_ERR(priv->enable_gpio))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) priv->enable_gpio = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) priv->regulator = devm_regulator_get(&priv->client->dev, "vin");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (IS_ERR(priv->regulator))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) priv->regulator = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ret = device_property_read_u32(&priv->client->dev, "ramp-up-us",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) &ramp_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) dev_info(&priv->client->dev, "ramp-up-ms property missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) priv->runtime_ramp_up = lm3532_get_ramp_index(ramp_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = device_property_read_u32(&priv->client->dev, "ramp-down-us",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) &ramp_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) dev_info(&priv->client->dev, "ramp-down-ms property missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) priv->runtime_ramp_down = lm3532_get_ramp_index(ramp_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) device_for_each_child_node(priv->dev, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) struct led_init_data idata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) .fwnode = child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .default_label = ":",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .devicename = priv->client->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) led = &priv->leds[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) ret = fwnode_property_read_u32(child, "reg", &control_bank);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dev_err(&priv->client->dev, "reg property missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) goto child_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (control_bank > LM3532_CONTROL_C) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) dev_err(&priv->client->dev, "Control bank invalid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) led->control_bank = control_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) ret = fwnode_property_read_u32(child, "ti,led-mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) &led->mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) dev_err(&priv->client->dev, "ti,led-mode property missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) goto child_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (fwnode_property_present(child, "led-max-microamp") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) fwnode_property_read_u32(child, "led-max-microamp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) &led->full_scale_current))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dev_err(&priv->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) "Failed getting led-max-microamp\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) led->full_scale_current = min(led->full_scale_current,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) LM3532_FS_CURR_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (led->mode == LM3532_BL_MODE_ALS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) led->mode = LM3532_ALS_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) ret = lm3532_parse_als(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) dev_err(&priv->client->dev, "Failed to parse als\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) lm3532_als_configure(priv, led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) led->mode = LM3532_I2C_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) led->num_leds = fwnode_property_count_u32(child, "led-sources");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (led->num_leds > LM3532_MAX_LED_STRINGS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) dev_err(&priv->client->dev, "Too many LED string defined\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ret = fwnode_property_read_u32_array(child, "led-sources",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) led->led_strings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) led->num_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) dev_err(&priv->client->dev, "led-sources property missing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) goto child_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) led->priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) led->led_dev.brightness_set_blocking = lm3532_brightness_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) ret = devm_led_classdev_register_ext(priv->dev, &led->led_dev, &idata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dev_err(&priv->client->dev, "led register err: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) goto child_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ret = lm3532_init_registers(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) dev_err(&priv->client->dev, "register init err: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) goto child_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) child_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static int lm3532_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct lm3532_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) count = device_get_child_node_count(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) if (!count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) dev_err(&client->dev, "LEDs are not defined in device tree!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) drvdata = devm_kzalloc(&client->dev, struct_size(drvdata, leds, count),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (drvdata == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) drvdata->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) drvdata->dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) drvdata->regmap = devm_regmap_init_i2c(client, &lm3532_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (IS_ERR(drvdata->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) ret = PTR_ERR(drvdata->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) dev_err(&client->dev, "Failed to allocate register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) mutex_init(&drvdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) i2c_set_clientdata(client, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) ret = lm3532_parse_node(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) dev_err(&client->dev, "Failed to parse node\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static int lm3532_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) struct lm3532_data *drvdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) mutex_destroy(&drvdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (drvdata->enable_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) gpiod_direction_output(drvdata->enable_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) static const struct of_device_id of_lm3532_leds_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) { .compatible = "ti,lm3532", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) MODULE_DEVICE_TABLE(of, of_lm3532_leds_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static const struct i2c_device_id lm3532_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) {LM3532_NAME, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) MODULE_DEVICE_TABLE(i2c, lm3532_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static struct i2c_driver lm3532_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .probe = lm3532_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .remove = lm3532_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .id_table = lm3532_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .name = LM3532_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .of_match_table = of_lm3532_leds_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) module_i2c_driver(lm3532_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) MODULE_DESCRIPTION("Back Light driver for LM3532");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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