^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for BCM6328 memory-mapped LEDs, based on leds-syscon.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2015 Álvaro Fernández Rojas <noltari@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define BCM6328_REG_INIT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define BCM6328_REG_MODE_HI 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BCM6328_REG_MODE_LO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define BCM6328_REG_HWDIS 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define BCM6328_REG_STROBE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BCM6328_REG_LNKACTSEL_HI 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define BCM6328_REG_LNKACTSEL_LO 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define BCM6328_REG_RBACK 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BCM6328_REG_SERMUX 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BCM6328_LED_MAX_COUNT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BCM6328_LED_DEF_DELAY 500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define BCM6328_LED_BLINK_DELAYS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define BCM6328_LED_BLINK_MS 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define BCM6328_LED_BLINK_MASK 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define BCM6328_LED_BLINK1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define BCM6328_LED_BLINK1_MASK (BCM6328_LED_BLINK_MASK << \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) BCM6328_LED_BLINK1_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define BCM6328_LED_BLINK2_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define BCM6328_LED_BLINK2_MASK (BCM6328_LED_BLINK_MASK << \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) BCM6328_LED_BLINK2_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define BCM6328_SERIAL_LED_EN BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define BCM6328_SERIAL_LED_MUX BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define BCM6328_SERIAL_LED_CLK_NPOL BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define BCM6328_SERIAL_LED_DATA_PPOL BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define BCM6328_SERIAL_LED_SHIFT_DIR BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define BCM6328_LED_SHIFT_TEST BIT(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define BCM6328_LED_TEST BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define BCM6328_INIT_MASK (BCM6328_SERIAL_LED_EN | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) BCM6328_SERIAL_LED_MUX | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) BCM6328_SERIAL_LED_CLK_NPOL | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) BCM6328_SERIAL_LED_DATA_PPOL | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) BCM6328_SERIAL_LED_SHIFT_DIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define BCM6328_LED_MODE_MASK 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define BCM6328_LED_MODE_ON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define BCM6328_LED_MODE_BLINK1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define BCM6328_LED_MODE_BLINK2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define BCM6328_LED_MODE_OFF 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define BCM6328_LED_SHIFT(X) ((X) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * struct bcm6328_led - state container for bcm6328 based LEDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @cdev: LED class device for this LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @mem: memory resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @lock: memory lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @pin: LED pin number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @blink_leds: blinking LEDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @blink_delay: blinking delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @active_low: LED is active low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct bcm6328_led {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct led_classdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void __iomem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) spinlock_t *lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned long *blink_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned long *blink_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) bool active_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static void bcm6328_led_write(void __iomem *reg, unsigned long data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) iowrite32be(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) writel(data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static unsigned long bcm6328_led_read(void __iomem *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ioread32be(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * LEDMode 64 bits / 24 LEDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * bits [31:0] -> LEDs 8-23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * bits [47:32] -> LEDs 0-7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * bits [63:48] -> unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static unsigned long bcm6328_pin2shift(unsigned long pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (pin < 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return pin + 16; /* LEDs 0-7 (bits 47:32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return pin - 8; /* LEDs 8-23 (bits 31:0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static void bcm6328_led_mode(struct bcm6328_led *led, unsigned long value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void __iomem *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned long val, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) shift = bcm6328_pin2shift(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (shift / 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) mode = led->mem + BCM6328_REG_MODE_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) mode = led->mem + BCM6328_REG_MODE_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) val = bcm6328_led_read(mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) val &= ~(BCM6328_LED_MODE_MASK << BCM6328_LED_SHIFT(shift % 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) val |= (value << BCM6328_LED_SHIFT(shift % 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) bcm6328_led_write(mode, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void bcm6328_led_set(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) enum led_brightness value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct bcm6328_led *led =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) container_of(led_cdev, struct bcm6328_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) spin_lock_irqsave(led->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Remove LED from cached HW blinking intervals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) led->blink_leds[0] &= ~BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) led->blink_leds[1] &= ~BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* Set LED on/off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if ((led->active_low && value == LED_OFF) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) (!led->active_low && value != LED_OFF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) bcm6328_led_mode(led, BCM6328_LED_MODE_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) bcm6328_led_mode(led, BCM6328_LED_MODE_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) spin_unlock_irqrestore(led->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static unsigned long bcm6328_blink_delay(unsigned long delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned long bcm6328_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) bcm6328_delay = delay + BCM6328_LED_BLINK_MS / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) bcm6328_delay = bcm6328_delay / BCM6328_LED_BLINK_MS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (bcm6328_delay == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) bcm6328_delay = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return bcm6328_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int bcm6328_blink_set(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned long *delay_on, unsigned long *delay_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct bcm6328_led *led =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) container_of(led_cdev, struct bcm6328_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned long delay, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (!*delay_on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *delay_on = BCM6328_LED_DEF_DELAY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (!*delay_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *delay_off = BCM6328_LED_DEF_DELAY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) delay = bcm6328_blink_delay(*delay_on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (delay != bcm6328_blink_delay(*delay_off)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_dbg(led_cdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) "fallback to soft blinking (delay_on != delay_off)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (delay > BCM6328_LED_BLINK_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev_dbg(led_cdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "fallback to soft blinking (delay > %ums)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) BCM6328_LED_BLINK_MASK * BCM6328_LED_BLINK_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) spin_lock_irqsave(led->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Check if any of the two configurable HW blinking intervals is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * available:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * 1. No LEDs assigned to the HW blinking interval.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * 2. Only this LED is assigned to the HW blinking interval.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * 3. LEDs with the same delay assigned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (led->blink_leds[0] == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) led->blink_leds[0] == BIT(led->pin) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) led->blink_delay[0] == delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Add LED to the first HW blinking interval cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) led->blink_leds[0] |= BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* Remove LED from the second HW blinking interval cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) led->blink_leds[1] &= ~BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* Cache first HW blinking interval delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) led->blink_delay[0] = delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Update the delay for the first HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) val = bcm6328_led_read(led->mem + BCM6328_REG_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) val &= ~BCM6328_LED_BLINK1_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) val |= (delay << BCM6328_LED_BLINK1_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) bcm6328_led_write(led->mem + BCM6328_REG_INIT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /* Set the LED to first HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) bcm6328_led_mode(led, BCM6328_LED_MODE_BLINK1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) } else if (led->blink_leds[1] == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) led->blink_leds[1] == BIT(led->pin) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) led->blink_delay[1] == delay) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* Remove LED from the first HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) led->blink_leds[0] &= ~BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* Add LED to the second HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) led->blink_leds[1] |= BIT(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Cache second HW blinking interval delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) led->blink_delay[1] = delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Update the delay for the second HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) val = bcm6328_led_read(led->mem + BCM6328_REG_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) val &= ~BCM6328_LED_BLINK2_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) val |= (delay << BCM6328_LED_BLINK2_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) bcm6328_led_write(led->mem + BCM6328_REG_INIT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /* Set the LED to second HW blinking interval */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) bcm6328_led_mode(led, BCM6328_LED_MODE_BLINK2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev_dbg(led_cdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "fallback to soft blinking (delay already set)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) spin_unlock_irqrestore(led->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static int bcm6328_hwled(struct device *dev, struct device_node *nc, u32 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) void __iomem *mem, spinlock_t *lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) int i, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) unsigned long flags, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) spin_lock_irqsave(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) val = bcm6328_led_read(mem + BCM6328_REG_HWDIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) val &= ~BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) bcm6328_led_write(mem + BCM6328_REG_HWDIS, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) spin_unlock_irqrestore(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* Only LEDs 0-7 can be activity/link controlled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (reg >= 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) cnt = of_property_count_elems_of_size(nc, "brcm,link-signal-sources",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) for (i = 0; i < cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u32 sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (reg < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) addr = mem + BCM6328_REG_LNKACTSEL_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) addr = mem + BCM6328_REG_LNKACTSEL_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) of_property_read_u32_index(nc, "brcm,link-signal-sources", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) &sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (reg / 4 != sel / 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev_warn(dev, "invalid link signal source\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) spin_lock_irqsave(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) val = bcm6328_led_read(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) val |= (BIT(reg % 4) << (((sel % 4) * 4) + 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) bcm6328_led_write(addr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) spin_unlock_irqrestore(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) cnt = of_property_count_elems_of_size(nc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) "brcm,activity-signal-sources",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) for (i = 0; i < cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u32 sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (reg < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) addr = mem + BCM6328_REG_LNKACTSEL_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) addr = mem + BCM6328_REG_LNKACTSEL_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) of_property_read_u32_index(nc, "brcm,activity-signal-sources",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) i, &sel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (reg / 4 != sel / 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_warn(dev, "invalid activity signal source\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) spin_lock_irqsave(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) val = bcm6328_led_read(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) val |= (BIT(reg % 4) << ((sel % 4) * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) bcm6328_led_write(addr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) spin_unlock_irqrestore(lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static int bcm6328_led(struct device *dev, struct device_node *nc, u32 reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) void __iomem *mem, spinlock_t *lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) unsigned long *blink_leds, unsigned long *blink_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct led_init_data init_data = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) struct bcm6328_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) const char *state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (!led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) led->pin = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) led->mem = mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) led->lock = lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) led->blink_leds = blink_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) led->blink_delay = blink_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (of_property_read_bool(nc, "active-low"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) led->active_low = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (!of_property_read_string(nc, "default-state", &state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (!strcmp(state, "on")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) led->cdev.brightness = LED_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) } else if (!strcmp(state, "keep")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) void __iomem *mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) unsigned long val, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) shift = bcm6328_pin2shift(led->pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (shift / 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) mode = mem + BCM6328_REG_MODE_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) mode = mem + BCM6328_REG_MODE_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) val = bcm6328_led_read(mode) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) BCM6328_LED_SHIFT(shift % 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) val &= BCM6328_LED_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if ((led->active_low && val == BCM6328_LED_MODE_OFF) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) (!led->active_low && val == BCM6328_LED_MODE_ON))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) led->cdev.brightness = LED_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) led->cdev.brightness = LED_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) led->cdev.brightness = LED_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) led->cdev.brightness = LED_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) bcm6328_led_set(&led->cdev, led->cdev.brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) led->cdev.brightness_set = bcm6328_led_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) led->cdev.blink_set = bcm6328_blink_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) init_data.fwnode = of_fwnode_handle(nc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) rc = devm_led_classdev_register_ext(dev, &led->cdev, &init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev_dbg(dev, "registered LED %s\n", led->cdev.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static int bcm6328_leds_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct device_node *np = dev_of_node(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct device_node *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) void __iomem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) spinlock_t *lock; /* memory lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) unsigned long val, *blink_leds, *blink_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) mem = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (IS_ERR(mem))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return PTR_ERR(mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) lock = devm_kzalloc(dev, sizeof(*lock), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (!lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) blink_leds = devm_kcalloc(dev, BCM6328_LED_BLINK_DELAYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) sizeof(*blink_leds), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (!blink_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) blink_delay = devm_kcalloc(dev, BCM6328_LED_BLINK_DELAYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) sizeof(*blink_delay), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (!blink_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) spin_lock_init(lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) bcm6328_led_write(mem + BCM6328_REG_HWDIS, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) bcm6328_led_write(mem + BCM6328_REG_LNKACTSEL_HI, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) bcm6328_led_write(mem + BCM6328_REG_LNKACTSEL_LO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) val = bcm6328_led_read(mem + BCM6328_REG_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) val &= ~(BCM6328_INIT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (of_property_read_bool(np, "brcm,serial-leds"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) val |= BCM6328_SERIAL_LED_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (of_property_read_bool(np, "brcm,serial-mux"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) val |= BCM6328_SERIAL_LED_MUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (of_property_read_bool(np, "brcm,serial-clk-low"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) val |= BCM6328_SERIAL_LED_CLK_NPOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (!of_property_read_bool(np, "brcm,serial-dat-low"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) val |= BCM6328_SERIAL_LED_DATA_PPOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (!of_property_read_bool(np, "brcm,serial-shift-inv"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) val |= BCM6328_SERIAL_LED_SHIFT_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) bcm6328_led_write(mem + BCM6328_REG_INIT, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) for_each_available_child_of_node(np, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (of_property_read_u32(child, "reg", ®))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (reg >= BCM6328_LED_MAX_COUNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) dev_err(dev, "invalid LED (%u >= %d)\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) BCM6328_LED_MAX_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (of_property_read_bool(child, "brcm,hardware-controlled"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) rc = bcm6328_hwled(dev, child, reg, mem, lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) rc = bcm6328_led(dev, child, reg, mem, lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) blink_leds, blink_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static const struct of_device_id bcm6328_leds_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) { .compatible = "brcm,bcm6328-leds", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) MODULE_DEVICE_TABLE(of, bcm6328_leds_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static struct platform_driver bcm6328_leds_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .probe = bcm6328_leds_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .name = "leds-bcm6328",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .of_match_table = bcm6328_leds_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) module_platform_driver(bcm6328_leds_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) MODULE_AUTHOR("Álvaro Fernández Rojas <noltari@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) MODULE_DESCRIPTION("LED driver for BCM6328 controllers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MODULE_ALIAS("platform:leds-bcm6328");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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