Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

3 Commits   0 Branches   0 Tags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Multiplexed-IRQs driver for TS-4800's FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2015 - Savoir-faire Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/irqchip/chained_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define IRQ_MASK        0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define IRQ_STATUS      0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) struct ts4800_irq_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	void __iomem            *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	struct irq_domain       *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct irq_chip         irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static void ts4800_irq_mask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct ts4800_irq_data *data = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	u16 reg = readw(data->base + IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	u16 mask = 1 << d->hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	writew(reg | mask, data->base + IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static void ts4800_irq_unmask(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct ts4800_irq_data *data = irq_data_get_irq_chip_data(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	u16 reg = readw(data->base + IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u16 mask = 1 << d->hwirq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	writew(reg & ~mask, data->base + IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int ts4800_irqdomain_map(struct irq_domain *d, unsigned int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 				irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct ts4800_irq_data *data = d->host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	irq_set_chip_and_handler(irq, &data->irq_chip, handle_simple_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	irq_set_chip_data(irq, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	irq_set_noprobe(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static const struct irq_domain_ops ts4800_ic_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.map = ts4800_irqdomain_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.xlate = irq_domain_xlate_onecell,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static void ts4800_ic_chained_handle_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct ts4800_irq_data *data = irq_desc_get_handler_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u16 status = readw(data->base + IRQ_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	chained_irq_enter(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (unlikely(status == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		handle_bad_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		unsigned int bit = __ffs(status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		int irq = irq_find_mapping(data->domain, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		status &= ~(1 << bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	} while (status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	chained_irq_exit(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static int ts4800_ic_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct device_node *node = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct ts4800_irq_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct irq_chip *irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int parent_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	data->base = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (IS_ERR(data->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		return PTR_ERR(data->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	writew(0xFFFF, data->base + IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	parent_irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (!parent_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		dev_err(&pdev->dev, "failed to get parent IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	irq_chip = &data->irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	irq_chip->name = dev_name(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	irq_chip->irq_mask = ts4800_irq_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	irq_chip->irq_unmask = ts4800_irq_unmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	data->domain = irq_domain_add_linear(node, 8, &ts4800_ic_ops, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (!data->domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		dev_err(&pdev->dev, "cannot add IRQ domain\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	irq_set_chained_handler_and_data(parent_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 					 ts4800_ic_chained_handle_irq, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	platform_set_drvdata(pdev, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int ts4800_ic_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	struct ts4800_irq_data *data = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	irq_domain_remove(data->domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static const struct of_device_id ts4800_ic_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	{ .compatible = "technologic,ts4800-irqc", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MODULE_DEVICE_TABLE(of, ts4800_ic_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct platform_driver ts4800_ic_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	.probe  = ts4800_ic_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	.remove = ts4800_ic_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		.name = "ts4800-irqc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		.of_match_table = ts4800_ic_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) module_platform_driver(ts4800_ic_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) MODULE_AUTHOR("Damien Riegel <damien.riegel@savoirfairelinux.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) MODULE_ALIAS("platform:ts4800_irqc");