^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * sl28cpld interrupt controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2020 Kontron Europe GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define INTC_IE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define INTC_IP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static const struct regmap_irq sl28cpld_irqs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) REGMAP_IRQ_REG_LINE(0, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) REGMAP_IRQ_REG_LINE(1, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) REGMAP_IRQ_REG_LINE(2, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) REGMAP_IRQ_REG_LINE(3, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) REGMAP_IRQ_REG_LINE(4, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) REGMAP_IRQ_REG_LINE(5, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) REGMAP_IRQ_REG_LINE(6, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) REGMAP_IRQ_REG_LINE(7, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct sl28cpld_intc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct regmap_irq_chip chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct regmap_irq_chip_data *irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int sl28cpld_intc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct sl28cpld_intc *irqchip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (!dev->parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (!irqchip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) irqchip->regmap = dev_get_regmap(dev->parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (!irqchip->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ret = device_property_read_u32(&pdev->dev, "reg", &base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) irqchip->chip.name = "sl28cpld-intc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) irqchip->chip.irqs = sl28cpld_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) irqchip->chip.num_regs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) irqchip->chip.status_base = base + INTC_IP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) irqchip->chip.mask_base = base + INTC_IE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) irqchip->chip.mask_invert = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) irqchip->chip.ack_base = base + INTC_IP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) irqchip->regmap, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) IRQF_SHARED | IRQF_ONESHOT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) &irqchip->chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) &irqchip->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static const struct of_device_id sl28cpld_intc_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { .compatible = "kontron,sl28cpld-intc" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static struct platform_driver sl28cpld_intc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .probe = sl28cpld_intc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .name = "sl28cpld-intc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .of_match_table = sl28cpld_intc_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) module_platform_driver(sl28cpld_intc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MODULE_LICENSE("GPL");