Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@flygoat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *  Loongson HTPIC IRQ support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/irqchip/chained_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/i8259.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define HTPIC_MAX_PARENT_IRQ	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define HTINT_NUM_VECTORS	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define HTINT_EN_OFF		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct loongson_htpic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct irq_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static struct loongson_htpic *htpic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static void htpic_irq_dispatch(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct loongson_htpic *priv = irq_desc_get_handler_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	uint32_t pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	chained_irq_enter(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	pending = readl(priv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* Ack all IRQs at once, otherwise IRQ flood might happen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	writel(pending, priv->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	if (!pending)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		spurious_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	while (pending) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		int bit = __ffs(pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		if (unlikely(bit > 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			spurious_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		generic_handle_irq(irq_linear_revmap(priv->domain, bit));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		pending &= ~BIT(bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	chained_irq_exit(chip, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static void htpic_reg_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	for (i = 0; i < HTINT_NUM_VECTORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		uint32_t val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		/* Disable all HT Vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		writel(0x0, htpic->base + HTINT_EN_OFF + i * 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		val = readl(htpic->base + i * 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		/* Ack all possible pending IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		writel(GENMASK(31, 0), htpic->base + i * 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	/* Enable 16 vectors for PIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	writel(0xffff, htpic->base + HTINT_EN_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static void htpic_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	htpic_reg_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) struct syscore_ops htpic_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	.resume		= htpic_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) int __init htpic_of_init(struct device_node *node, struct device_node *parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	unsigned int parent_irq[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int num_parents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (htpic) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		pr_err("loongson-htpic: Only one HTPIC is allowed in the system\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	htpic = kzalloc(sizeof(*htpic), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (!htpic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	htpic->base = of_iomap(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (!htpic->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	htpic->domain = __init_i8259_irqs(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (!htpic->domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		pr_err("loongson-htpic: Failed to initialize i8259 IRQs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		goto out_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	/* Interrupt may come from any of the 4 interrupt line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	for (i = 0; i < HTPIC_MAX_PARENT_IRQ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		parent_irq[i] = irq_of_parse_and_map(node, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		if (parent_irq[i] <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		num_parents++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (!num_parents) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		pr_err("loongson-htpic: Failed to get parent irqs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		goto out_remove_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	htpic_reg_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	for (i = 0; i < num_parents; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		irq_set_chained_handler_and_data(parent_irq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 						htpic_irq_dispatch, htpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	register_syscore_ops(&htpic_syscore_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) out_remove_domain:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	irq_domain_remove(htpic->domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) out_iounmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	iounmap(htpic->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	kfree(htpic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) IRQCHIP_DECLARE(loongson_htpic, "loongson,htpic-1.0", htpic_of_init);