Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) menu "IRQ chip support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) config IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 	def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 	depends on OF_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) config ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) config ARM_GIC_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	depends on PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) config ARM_GIC_MAX_NR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	depends on ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	default 2 if ARCH_REALVIEW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	default 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) config ARM_GIC_V2M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	select PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) config GIC_NON_BANKED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) config ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	select PARTITION_PERCPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) config ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	select GENERIC_MSI_IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	default ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) config ARM_GIC_V3_ITS_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	depends on ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	depends on PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	default ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) config ARM_GIC_V3_ITS_FSL_MC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	depends on ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	depends on FSL_MC_BUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	default ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) config ARM_NVIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) config ARM_VIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) config ARM_VIC_NR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	default 4 if ARCH_S5PV210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	default 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	depends on ARM_VIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	  The maximum number of VICs available in the system, for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	  power management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) config ARMADA_370_XP_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	select PCI_MSI if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) config ALPINE_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	select PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) config AL_FIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	depends on OF || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	  Support Amazon's Annapurna Labs Fabric Interrupt Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) config ATMEL_AIC_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) config ATMEL_AIC5_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) config I8259
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) config BCM6345_L1_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) config BCM7038_L1_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) config BCM7120_L2_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) config BRCMSTB_L2_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) config DAVINCI_AINTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) config DAVINCI_CP_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config DW_APB_ICTL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) config FARADAY_FTINTC010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) config HISILICON_IRQ_MBIGEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	select ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	select ARM_GIC_V3_ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) config IMGPDC_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) config IXP4XX_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) config MADERA_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	tristate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) config IRQ_MIPS_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) config CLPS711X_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	depends on ARCH_CLPS711X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) config OMPIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) config OR1K_PIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) config OMAP_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) config ORION_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) config PIC32_EVIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) config JCORE_AIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	bool "J-Core integrated AIC" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	depends on OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	  Support for the J-Core integrated AIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) config RDA_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) config RENESAS_INTC_IRQPIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	  Enable support for the Renesas Interrupt Controller for external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	  interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) config RENESAS_IRQC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	  Enable support for the Renesas Interrupt Controller for external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	  devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) config RENESAS_RZA1_IRQC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	  Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	  to 8 external interrupts with configurable sense select.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) config SL28CPLD_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	bool "Kontron sl28cpld IRQ controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	depends on MFD_SL28CPLD=y || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	select REGMAP_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	  Interrupt controller driver for the board management controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	  found on the Kontron sl28 CPLD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) config ST_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	select REGMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	select MFD_SYSCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	  Enables SysCfg Controlled IRQs on STi based platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) config TANGO_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) config TB10X_IRQC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) config TS4800_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	tristate "TS-4800 IRQ controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	depends on SOC_IMX51 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	  Support for the TS-4800 FPGA IRQ controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) config VERSATILE_FPGA_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) config VERSATILE_FPGA_IRQ_NR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)        int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)        default 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)        depends on VERSATILE_FPGA_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) config XTENSA_MX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) config XILINX_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) config IRQ_CROSSBAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	  Support for a CROSSBAR ip that precedes the main interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	  The primary irqchip invokes the crossbar's callback which inturn allocates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	  a free irq and configures the IP. Thus the peripheral interrupts are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	  routed to one of the free irqchip interrupt lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) config KEYSTONE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	tristate "Keystone 2 IRQ controller IP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	depends on ARCH_KEYSTONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		Support for Texas Instruments Keystone 2 IRQ controller IP which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		is part of the Keystone 2 IPC mechanism
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) config MIPS_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	select GENERIC_IRQ_IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	select MIPS_CM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) config INGENIC_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	depends on MACH_INGENIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) config INGENIC_TCU_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	bool "Ingenic JZ47xx TCU interrupt controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	default MACH_INGENIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	depends on MIPS || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	select MFD_SYSCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	  Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	  JZ47xx SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	  If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) config RENESAS_H8300H_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)         bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) config RENESAS_H8S_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	  Enable support for the Renesas H8/300 Interrupt Controller, as found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	  on Renesas H8S SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) config IMX_GPCV2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) config IRQ_MXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	def_bool y if MACH_ASM9260 || ARCH_MXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	select STMP_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) config MSCC_OCELOT_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) config MVEBU_GICP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) config MVEBU_ICU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) config MVEBU_ODMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	select GENERIC_MSI_IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) config MVEBU_PIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) config MVEBU_SEI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)         bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) config LS_EXTIRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	select MFD_SYSCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) config LS_SCFG_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	depends on PCI && PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) config PARTITION_PERCPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) config EZNPS_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	bool "NPS400 Global Interrupt Manager (GIM)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	depends on ARC || (COMPILE_TEST && !64BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	  Support the EZchip NPS400 global interrupt controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) config STM32_EXTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) config QCOM_IRQ_COMBINER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	bool "QCOM IRQ combiner support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	depends on ARCH_QCOM && ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	  Say yes here to add support for the IRQ combiner devices embedded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	  in Qualcomm Technologies chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) config IRQ_UNIPHIER_AIDET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	bool "UniPhier AIDET support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	depends on ARCH_UNIPHIER || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	default ARCH_UNIPHIER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	  Support for the UniPhier AIDET (ARM Interrupt Detector).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) config MESON_IRQ_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)        tristate "Meson GPIO Interrupt Multiplexer"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)        depends on ARCH_MESON || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)        default ARCH_MESON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)        select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)        help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)          Support Meson SoC Family GPIO Interrupt Multiplexer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) config GOLDFISH_PIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)        bool "Goldfish programmable interrupt controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)        depends on MIPS && (GOLDFISH || COMPILE_TEST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)        select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)        select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)        help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)          Say yes here to enable Goldfish interrupt controller driver used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)          for Goldfish based virtual platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) config QCOM_PDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	tristate "QCOM PDC"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	depends on ARCH_QCOM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	depends on QCOM_SCM || !QCOM_SCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	  Power Domain Controller driver to manage and configure wakeup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	  IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) config CSKY_MPINTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	bool "C-SKY Multi Processor Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	depends on CSKY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	  Say yes here to enable C-SKY SMP interrupt controller driver used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	  for C-SKY SMP system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	  In fact it's not mmio map in hardware and it uses ld/st to visit the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	  controller's register inside CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) config CSKY_APB_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	bool "C-SKY APB Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	depends on CSKY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	  Say yes here to enable C-SKY APB interrupt controller driver used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	  by C-SKY single core SOC system. It uses mmio map apb-bus to visit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	  the controller's register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) config IMX_IRQSTEER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	bool "i.MX IRQSTEER support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	depends on ARCH_MXC || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	default ARCH_MXC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	  Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) config IMX_INTMUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	bool "i.MX INTMUX support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	default y if ARCH_MXC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	  Support for the i.MX INTMUX interrupt multiplexer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) config LS1X_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	bool "Loongson-1 Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	depends on MACH_LOONGSON32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	  Support for the Loongson-1 platform Interrupt Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) config TI_SCI_INTR_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	depends on TI_SCI_PROTOCOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	  This enables the irqchip driver support for K3 Interrupt router
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	  over TI System Control Interface available on some new TI's SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	  If you wish to use interrupt router irq resources managed by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	  TI System Controller, say Y here. Otherwise, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) config TI_SCI_INTA_IRQCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	depends on TI_SCI_PROTOCOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	select TI_SCI_INTA_MSI_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	  This enables the irqchip driver support for K3 Interrupt aggregator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	  over TI System Control Interface available on some new TI's SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	  If you wish to use interrupt aggregator irq resources managed by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	  TI System Controller, say Y here. Otherwise, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) config TI_PRUSS_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	tristate "TI PRU-ICSS Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	depends on ARCH_DAVINCI || SOC_AM33XX || SOC_AM43XX || SOC_DRA7XX || ARCH_KEYSTONE || ARCH_K3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	  This enables support for the PRU-ICSS Local Interrupt Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	  present within a PRU-ICSS subsystem present on various TI SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	  The PRUSS INTC enables various interrupts to be routed to multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	  different processors within the SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) config RISCV_INTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	bool "RISC-V Local Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 	depends on RISCV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	   This enables support for the per-HART local interrupt controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	   found in standard RISC-V systems.  The per-HART local interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	   controller handles timer interrupts, software interrupts, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	   hardware interrupts. Without a per-HART local interrupt controller,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	   a RISC-V system will be unable to handle any interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	   If you don't know what to do here, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) config SIFIVE_PLIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	bool "SiFive Platform-Level Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	depends on RISCV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	   This enables support for the PLIC chip found in SiFive (and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	   potentially other) RISC-V systems.  The PLIC controls devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	   interrupts and connects them to each core's local interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	   controller.  Aside from timer and software interrupts, all other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	   interrupt sources are subordinate to the PLIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	   If you don't know what to do here, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) config EXYNOS_IRQ_COMBINER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	  Say yes here to add support for the IRQ combiner devices embedded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	  in Samsung Exynos chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) config LOONGSON_LIOINTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	bool "Loongson Local I/O Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	depends on MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	  Support for the Loongson Local I/O Interrupt Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) config LOONGSON_HTPIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	bool "Loongson3 HyperTransport PIC Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	depends on MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	  Support for the Loongson-3 HyperTransport PIC Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) config LOONGSON_HTVEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	bool "Loongson3 HyperTransport Interrupt Vector Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	depends on MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	default MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	  Support for the Loongson3 HyperTransport Interrupt Vector Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) config LOONGSON_PCH_PIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	bool "Loongson PCH PIC Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 	depends on MACH_LOONGSON64 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	default MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 	select IRQ_FASTEOI_HIERARCHY_HANDLERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	  Support for the Loongson PCH PIC Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) config LOONGSON_PCH_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 	bool "Loongson PCH MSI Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	depends on MACH_LOONGSON64 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	default MACH_LOONGSON64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	select PCI_MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	  Support for the Loongson PCH MSI Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) config MST_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 	bool "MStar Interrupt Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	default ARCH_MEDIATEK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 	select IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 	  Support MStar Interrupt Controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) endmenu