Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * IOMMU API for s390 PCI devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright IBM Corp. 2015
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author(s): Gerald Schaefer <gerald.schaefer@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/iommu-helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/pci_dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * Physically contiguous memory regions can be mapped with 4 KiB alignment,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * we allow all page sizes that are an order of 4KiB (no special large page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * support so far).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define S390_IOMMU_PGSIZES	(~0xFFFUL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static const struct iommu_ops s390_iommu_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct s390_domain {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct iommu_domain	domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct list_head	devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	unsigned long		*dma_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	spinlock_t		dma_table_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	spinlock_t		list_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) struct s390_domain_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct list_head	list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct zpci_dev		*zdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static struct s390_domain *to_s390_domain(struct iommu_domain *dom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return container_of(dom, struct s390_domain, domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static bool s390_iommu_capable(enum iommu_cap cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	switch (cap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	case IOMMU_CAP_CACHE_COHERENCY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	case IOMMU_CAP_INTR_REMAP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static struct iommu_domain *s390_domain_alloc(unsigned domain_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct s390_domain *s390_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	if (domain_type != IOMMU_DOMAIN_UNMANAGED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	s390_domain = kzalloc(sizeof(*s390_domain), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	if (!s390_domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	s390_domain->dma_table = dma_alloc_cpu_table();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	if (!s390_domain->dma_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		kfree(s390_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	spin_lock_init(&s390_domain->dma_table_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	spin_lock_init(&s390_domain->list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	INIT_LIST_HEAD(&s390_domain->devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	return &s390_domain->domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static void s390_domain_free(struct iommu_domain *domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	dma_cleanup_tables(s390_domain->dma_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	kfree(s390_domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) static int s390_iommu_attach_device(struct iommu_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				    struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct zpci_dev *zdev = to_zpci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct s390_domain_device *domain_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (!zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	domain_device = kzalloc(sizeof(*domain_device), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (!domain_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (zdev->dma_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		zpci_dma_exit_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	zdev->dma_table = s390_domain->dma_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 				(u64) zdev->dma_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		goto out_restore;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	spin_lock_irqsave(&s390_domain->list_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	/* First device defines the DMA range limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	if (list_empty(&s390_domain->devices)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		domain->geometry.aperture_start = zdev->start_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		domain->geometry.aperture_end = zdev->end_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		domain->geometry.force_aperture = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/* Allow only devices with identical DMA range limits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	} else if (domain->geometry.aperture_start != zdev->start_dma ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		   domain->geometry.aperture_end != zdev->end_dma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		spin_unlock_irqrestore(&s390_domain->list_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		goto out_restore;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	domain_device->zdev = zdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	zdev->s390_domain = s390_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	list_add(&domain_device->list, &s390_domain->devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	spin_unlock_irqrestore(&s390_domain->list_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) out_restore:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	zpci_dma_init_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	kfree(domain_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static void s390_iommu_detach_device(struct iommu_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 				     struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct zpci_dev *zdev = to_zpci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	struct s390_domain_device *domain_device, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	int found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (!zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	spin_lock_irqsave(&s390_domain->list_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	list_for_each_entry_safe(domain_device, tmp, &s390_domain->devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				 list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		if (domain_device->zdev == zdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 			list_del(&domain_device->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			kfree(domain_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	spin_unlock_irqrestore(&s390_domain->list_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (found) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		zdev->s390_domain = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		zpci_unregister_ioat(zdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		zpci_dma_init_device(zdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) static struct iommu_device *s390_iommu_probe_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	struct zpci_dev *zdev = to_zpci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	return &zdev->iommu_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void s390_iommu_release_device(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct zpci_dev *zdev = to_zpci_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct iommu_domain *domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	 * This is a workaround for a scenario where the IOMMU API common code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	 * "forgets" to call the detach_dev callback: After binding a device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	 * to vfio-pci and completing the VFIO_SET_IOMMU ioctl (which triggers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	 * the attach_dev), removing the device via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	 * "echo 1 > /sys/bus/pci/devices/.../remove" won't trigger detach_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	 * only release_device will be called via the BUS_NOTIFY_REMOVED_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	 * notifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	 * So let's call detach_dev from here if it hasn't been called before.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	if (zdev && zdev->s390_domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		domain = iommu_get_domain_for_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		if (domain)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			s390_iommu_detach_device(domain, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int s390_iommu_update_trans(struct s390_domain *s390_domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				   unsigned long pa, dma_addr_t dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 				   size_t size, int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	struct s390_domain_device *domain_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	u8 *page_addr = (u8 *) (pa & PAGE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	dma_addr_t start_dma_addr = dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	unsigned long irq_flags, nr_pages, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	unsigned long *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	if (dma_addr < s390_domain->domain.geometry.aperture_start ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	    dma_addr + size > s390_domain->domain.geometry.aperture_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (!nr_pages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	spin_lock_irqsave(&s390_domain->dma_table_lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	for (i = 0; i < nr_pages; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		entry = dma_walk_cpu_trans(s390_domain->dma_table, dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		if (!entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			goto undo_cpu_trans;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		dma_update_cpu_trans(entry, page_addr, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		page_addr += PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		dma_addr += PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	spin_lock(&s390_domain->list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	list_for_each_entry(domain_device, &s390_domain->devices, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		rc = zpci_refresh_trans((u64) domain_device->zdev->fh << 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 					start_dma_addr, nr_pages * PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	spin_unlock(&s390_domain->list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) undo_cpu_trans:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if (rc && ((flags & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		flags = ZPCI_PTE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		while (i-- > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			page_addr -= PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			dma_addr -= PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			entry = dma_walk_cpu_trans(s390_domain->dma_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 						   dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			if (!entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			dma_update_cpu_trans(entry, page_addr, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	spin_unlock_irqrestore(&s390_domain->dma_table_lock, irq_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int s390_iommu_map(struct iommu_domain *domain, unsigned long iova,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			  phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	int flags = ZPCI_PTE_VALID, rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (!(prot & IOMMU_READ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (!(prot & IOMMU_WRITE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		flags |= ZPCI_TABLE_PROTECTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	rc = s390_iommu_update_trans(s390_domain, (unsigned long) paddr, iova,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 				     size, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static phys_addr_t s390_iommu_iova_to_phys(struct iommu_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 					   dma_addr_t iova)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	unsigned long *sto, *pto, *rto, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	unsigned int rtx, sx, px;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	phys_addr_t phys = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (iova < domain->geometry.aperture_start ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	    iova > domain->geometry.aperture_end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	rtx = calc_rtx(iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	sx = calc_sx(iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	px = calc_px(iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	rto = s390_domain->dma_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	spin_lock_irqsave(&s390_domain->dma_table_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	if (rto && reg_entry_isvalid(rto[rtx])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		sto = get_rt_sto(rto[rtx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		if (sto && reg_entry_isvalid(sto[sx])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			pto = get_st_pto(sto[sx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			if (pto && pt_entry_isvalid(pto[px]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				phys = pto[px] & ZPCI_PTE_ADDR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	spin_unlock_irqrestore(&s390_domain->dma_table_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	return phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static size_t s390_iommu_unmap(struct iommu_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			       unsigned long iova, size_t size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 			       struct iommu_iotlb_gather *gather)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	struct s390_domain *s390_domain = to_s390_domain(domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	int flags = ZPCI_PTE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	phys_addr_t paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	paddr = s390_iommu_iova_to_phys(domain, iova);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	if (!paddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	rc = s390_iommu_update_trans(s390_domain, (unsigned long) paddr, iova,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 				     size, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	return size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int zpci_init_iommu(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	rc = iommu_device_sysfs_add(&zdev->iommu_dev, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 				    "s390-iommu.%08x", zdev->fid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	iommu_device_set_ops(&zdev->iommu_dev, &s390_iommu_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	rc = iommu_device_register(&zdev->iommu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		goto out_sysfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) out_sysfs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	iommu_device_sysfs_remove(&zdev->iommu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) out_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) void zpci_destroy_iommu(struct zpci_dev *zdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	iommu_device_unregister(&zdev->iommu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	iommu_device_sysfs_remove(&zdev->iommu_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static const struct iommu_ops s390_iommu_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.capable = s390_iommu_capable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.domain_alloc = s390_domain_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.domain_free = s390_domain_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.attach_dev = s390_iommu_attach_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	.detach_dev = s390_iommu_detach_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.map = s390_iommu_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.unmap = s390_iommu_unmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	.iova_to_phys = s390_iommu_iova_to_phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	.probe_device = s390_iommu_probe_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	.release_device = s390_iommu_release_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	.device_group = generic_device_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	.pgsize_bitmap = S390_IOMMU_PGSIZES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static int __init s390_iommu_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	return bus_set_iommu(&pci_bus_type, &s390_iommu_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) subsys_initcall(s390_iommu_init);