Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * OF helpers for IOMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/limits.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of_pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/fsl/mc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define NO_IOMMU	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * of_get_dma_window - Parse *dma-window property and returns 0 if found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * @dn: device node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * @prefix: prefix for property name if any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * @index: index to start to parse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * @busno: Returns busno if supported. Otherwise pass NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * @addr: Returns address that DMA starts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * @size: Returns the range that DMA can handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * This supports different formats flexibly. "prefix" can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * configured if any. "busno" and "index" are optionally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * specified. Set 0(or NULL) if not used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) int of_get_dma_window(struct device_node *dn, const char *prefix, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		      unsigned long *busno, dma_addr_t *addr, size_t *size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	const __be32 *dma_window, *end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	int bytes, cur_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (!dn || !addr || !size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	if (!prefix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		prefix = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	snprintf(propname, sizeof(propname), "%sdma-window", prefix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	dma_window = of_get_property(dn, propname, &bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	if (!dma_window)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	end = dma_window + bytes / sizeof(*dma_window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	while (dma_window < end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		u32 cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		const void *prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		/* busno is one cell if supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		if (busno)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			*busno = be32_to_cpup(dma_window++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		prop = of_get_property(dn, addrname, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		if (!prop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			prop = of_get_property(dn, "#address-cells", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		if (!cells)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		*addr = of_read_number(dma_window, cells);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		dma_window += cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		prop = of_get_property(dn, sizename, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		if (!cells)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		*size = of_read_number(dma_window, cells);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		dma_window += cells;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		if (cur_index++ == index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) EXPORT_SYMBOL_GPL(of_get_dma_window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int of_iommu_xlate(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			  struct of_phandle_args *iommu_spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	const struct iommu_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct fwnode_handle *fwnode = &iommu_spec->np->fwnode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	ops = iommu_ops_from_fwnode(fwnode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if ((ops && !ops->of_xlate) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	    !of_device_is_available(iommu_spec->np))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		return NO_IOMMU;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	ret = iommu_fwspec_init(dev, &iommu_spec->np->fwnode, ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 * The otherwise-empty fwspec handily serves to indicate the specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 * IOMMU device we're waiting for, which will be useful if we ever get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 * a proper probe-ordering dependency mechanism in future.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (!ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		return driver_deferred_probe_check_state(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	if (!try_module_get(ops->owner))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	ret = ops->of_xlate(dev, iommu_spec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	module_put(ops->owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int of_iommu_configure_dev_id(struct device_node *master_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 				     struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 				     const u32 *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct of_phandle_args iommu_spec = { .args_count = 1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	err = of_map_id(master_np, *id, "iommu-map",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			 "iommu-map-mask", &iommu_spec.np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			 iommu_spec.args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return err == -ENODEV ? NO_IOMMU : err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	err = of_iommu_xlate(dev, &iommu_spec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	of_node_put(iommu_spec.np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static int of_iommu_configure_dev(struct device_node *master_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 				  struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct of_phandle_args iommu_spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int err = NO_IOMMU, idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	while (!of_parse_phandle_with_args(master_np, "iommus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 					   "#iommu-cells",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 					   idx, &iommu_spec)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		err = of_iommu_xlate(dev, &iommu_spec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		of_node_put(iommu_spec.np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct of_pci_iommu_alias_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	struct of_pci_iommu_alias_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	u32 input_id = alias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int of_iommu_configure_device(struct device_node *master_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 				     struct device *dev, const u32 *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		      of_iommu_configure_dev(master_np, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) const struct iommu_ops *of_iommu_configure(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 					   struct device_node *master_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 					   const u32 *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	const struct iommu_ops *ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int err = NO_IOMMU;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (!master_np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	if (fwspec) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		if (fwspec->ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			return fwspec->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		/* In the deferred case, start again from scratch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		iommu_fwspec_free(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	 * We don't currently walk up the tree looking for a parent IOMMU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	 * See the `Notes:' section of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * Documentation/devicetree/bindings/iommu/iommu.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (dev_is_pci(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		struct of_pci_iommu_alias_info info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			.dev = dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			.np = master_np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		pci_request_acs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		err = pci_for_each_dma_alias(to_pci_dev(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 					     of_pci_iommu_init, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		err = of_iommu_configure_device(master_np, dev, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		fwspec = dev_iommu_fwspec_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (!err && fwspec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			of_property_read_u32(master_np, "pasid-num-bits",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 					     &fwspec->num_pasid_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	 * Two success conditions can be represented by non-negative err here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 * >0 : there is no IOMMU, or one was unavailable for non-fatal reasons
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 *  0 : we found an IOMMU, and dev->fwspec is initialised appropriately
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 * <0 : any actual error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		/* The fwspec pointer changed, read it again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		fwspec = dev_iommu_fwspec_get(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		ops    = fwspec->ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 * If we have reason to believe the IOMMU driver missed the initial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 * probe for dev, replay it to get things in order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	if (!err && dev->bus && !device_iommu_mapped(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		err = iommu_probe_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	/* Ignore all other errors apart from EPROBE_DEFER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (err == -EPROBE_DEFER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		ops = ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	} else if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		ops = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	return ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }