Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Hyper-V stub IOMMU driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2019, Microsoft, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Author : Lan Tianyu <Tianyu.Lan@microsoft.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/hw_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/io_apic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/irq_remapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/hypervisor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "irq_remapping.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #ifdef CONFIG_IRQ_REMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * Redirection Table. Hyper-V exposes one single IO-APIC and so define
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * 24 IO APIC remmapping entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define IOAPIC_REMAPPING_ENTRY 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static struct irq_domain *ioapic_ir_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int hyperv_ir_set_affinity(struct irq_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		const struct cpumask *mask, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct irq_data *parent = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct irq_cfg *cfg = irqd_cfg(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct IO_APIC_route_entry *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	/* Return error If new irq affinity is out of ioapic_max_cpumask. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	if (!cpumask_subset(mask, &ioapic_max_cpumask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	ret = parent->chip->irq_set_affinity(parent, mask, force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	entry = data->chip_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	entry->dest = cfg->dest_apicid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	entry->vector = cfg->vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	send_cleanup_vector(cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static struct irq_chip hyperv_ir_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.name			= "HYPERV-IR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	.irq_ack		= apic_ack_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	.irq_set_affinity	= hyperv_ir_set_affinity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				     unsigned int virq, unsigned int nr_irqs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 				     void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct irq_alloc_info *info = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct irq_data *irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct irq_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	irq_data = irq_domain_get_irq_data(domain, virq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	if (!irq_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		irq_domain_free_irqs_common(domain, virq, nr_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	irq_data->chip = &hyperv_ir_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	 * If there is interrupt remapping function of IOMMU, setting irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	 * affinity only needs to change IRTE of IOMMU. But Hyper-V doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	 * support interrupt remapping function, setting irq affinity of IO-APIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	 * interrupts still needs to change IO-APIC registers. But ioapic_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	 * configure_entry() will ignore value of cfg->vector and cfg->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	 * dest_apicid when IO-APIC's parent irq domain is not the vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 * domain.(See ioapic_configure_entry()) In order to setting vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 * and dest_apicid to IO-APIC register, IO-APIC entry pointer is saved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 * in the chip_data and hyperv_irq_remapping_activate()/hyperv_ir_set_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	 * affinity() set vector and dest_apicid directly into IO-APIC entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	irq_data->chip_data = info->ioapic.entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 * Hypver-V IO APIC irq affinity should be in the scope of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	 * ioapic_max_cpumask because no irq remapping support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	desc = irq_data_to_desc(irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static void hyperv_irq_remapping_free(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 				 unsigned int virq, unsigned int nr_irqs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	irq_domain_free_irqs_common(domain, virq, nr_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int hyperv_irq_remapping_activate(struct irq_domain *domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			  struct irq_data *irq_data, bool reserve)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct irq_cfg *cfg = irqd_cfg(irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct IO_APIC_route_entry *entry = irq_data->chip_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	entry->dest = cfg->dest_apicid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	entry->vector = cfg->vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static const struct irq_domain_ops hyperv_ir_domain_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.alloc = hyperv_irq_remapping_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.free = hyperv_irq_remapping_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.activate = hyperv_irq_remapping_activate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int __init hyperv_prepare_irq_remapping(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct fwnode_handle *fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	    !x2apic_supported())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	fn = irq_domain_alloc_named_id_fwnode("HYPERV-IR", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (!fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	ioapic_ir_domain =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				0, IOAPIC_REMAPPING_ENTRY, fn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 				&hyperv_ir_domain_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	if (!ioapic_ir_domain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		irq_domain_free_fwnode(fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	 * Hyper-V doesn't provide irq remapping function for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	 * IO-APIC and so IO-APIC only accepts 8-bit APIC ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	 * Cpu's APIC ID is read from ACPI MADT table and APIC IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	 * in the MADT table on Hyper-v are sorted monotonic increasingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	 * APIC ID reflects cpu topology. There maybe some APIC ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 * gaps when cpu number in a socket is not power of two. Prepare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	 * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 * into ioapic_max_cpumask if its APIC ID is less than 256.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		if (cpu_physical_id(i) < 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			cpumask_set_cpu(i, &ioapic_max_cpumask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static int __init hyperv_enable_irq_remapping(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	return IRQ_REMAP_X2APIC_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static struct irq_domain *hyperv_get_irq_domain(struct irq_alloc_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (info->type == X86_IRQ_ALLOC_TYPE_IOAPIC_GET_PARENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		return ioapic_ir_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct irq_remap_ops hyperv_irq_remap_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.prepare		= hyperv_prepare_irq_remapping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.enable			= hyperv_enable_irq_remapping,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.get_irq_domain		= hyperv_get_irq_domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #endif