Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPMH_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #define __DRIVERS_INTERCONNECT_QCOM_ICC_RPMH_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <dt-bindings/interconnect/qcom,icc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define to_qcom_provider(_provider) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	container_of(_provider, struct qcom_icc_provider, provider)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * struct qcom_icc_provider - Qualcomm specific interconnect provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * @provider: generic interconnect provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * @dev: reference to the NoC device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * @bcms: list of bcms that maps to the provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * @num_bcms: number of @bcms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * @voter: bcm voter targeted by this provider
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct qcom_icc_provider {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct icc_provider provider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct qcom_icc_bcm **bcms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	size_t num_bcms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	struct bcm_voter *voter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @unit: divisor used to convert bytes/sec bw value to an RPMh msg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * @width: multiplier used to convert bytes/sec bw value to an RPMh msg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * @vcd: virtual clock domain that this bcm belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * @reserved: reserved field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) struct bcm_db {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	__le32 unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	__le16 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	u8 vcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define MAX_LINKS		128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MAX_BCMS		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MAX_BCM_PER_NODE	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define MAX_VCD			10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * struct qcom_icc_node - Qualcomm specific interconnect nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * @name: the node name used in debugfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * @links: an array of nodes where we can go next while traversing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * @id: a unique node identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * @num_links: the total number of @links
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * @channels: num of channels at this node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * @buswidth: width of the interconnect between a node and the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * @sum_avg: current sum aggregate value of all avg bw requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * @max_peak: current max aggregate value of all peak bw requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * @bcms: list of bcms associated with this logical node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * @num_bcms: num of @bcms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) struct qcom_icc_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	u16 links[MAX_LINKS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u16 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u16 num_links;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u16 channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u16 buswidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u64 sum_avg[QCOM_ICC_NUM_BUCKETS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u64 max_peak[QCOM_ICC_NUM_BUCKETS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct qcom_icc_bcm *bcms[MAX_BCM_PER_NODE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	size_t num_bcms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  * struct qcom_icc_bcm - Qualcomm specific hardware accelerator nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * known as Bus Clock Manager (BCM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * @name: the bcm node name used to fetch BCM data from command db
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * @type: latency or bandwidth bcm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * @addr: address offsets used when voting to RPMH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * @vote_x: aggregated threshold values, represents sum_bw when @type is bw bcm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * @vote_y: aggregated threshold values, represents peak_bw when @type is bw bcm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * @vote_scale: scaling factor for vote_x and vote_y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * @dirty: flag used to indicate whether the bcm needs to be committed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * @keepalive: flag used to indicate whether a keepalive is required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * @aux_data: auxiliary data used when calculating threshold values and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * communicating with RPMh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * @list: used to link to other bcms when compiling lists for commit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * @ws_list: used to keep track of bcms that may transition between wake/sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * @num_nodes: total number of @num_nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * @nodes: list of qcom_icc_nodes that this BCM encapsulates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) struct qcom_icc_bcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	u32 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	u64 vote_x[QCOM_ICC_NUM_BUCKETS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	u64 vote_y[QCOM_ICC_NUM_BUCKETS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	u64 vote_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	bool dirty;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	bool keepalive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct bcm_db aux_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct list_head ws_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	size_t num_nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct qcom_icc_node *nodes[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct qcom_icc_fabric {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct qcom_icc_node **nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	size_t num_nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct qcom_icc_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	struct qcom_icc_node **nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	size_t num_nodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct qcom_icc_bcm **bcms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	size_t num_bcms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define DEFINE_QNODE(_name, _id, _channels, _buswidth, ...)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		static struct qcom_icc_node _name = {			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		.id = _id,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		.name = #_name,						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		.channels = _channels,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 		.buswidth = _buswidth,					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		.num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })),	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		.links = { __VA_ARGS__ },				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		       u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int qcom_icc_set(struct icc_node *src, struct icc_node *dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int qcom_icc_bcm_init(struct qcom_icc_bcm *bcm, struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) void qcom_icc_pre_aggregate(struct icc_node *node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #endif