^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Nikolaus Schaller <hns@goldelico.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "tsc2007.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) struct tsc2007_iio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct tsc2007 *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .datasheet_name = _name, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .type = _type, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) BIT(_chan_info), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .indexed = 1, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .channel = _chan, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static const struct iio_chan_spec tsc2007_iio_channel[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int tsc2007_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int *val, int *val2, long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct tsc2007_iio *iio = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct tsc2007 *tsc = iio->ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int adc_chan = chan->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (mask != IIO_CHAN_INFO_RAW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mutex_lock(&tsc->mlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) switch (chan->channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *val = tsc2007_xfer(tsc, READ_X);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *val = tsc2007_xfer(tsc, READ_Y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *val = tsc2007_xfer(tsc, READ_Z1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *val = tsc2007_xfer(tsc, READ_Z2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) case 5: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct ts_event tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tc.x = tsc2007_xfer(tsc, READ_X);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) tc.z1 = tsc2007_xfer(tsc, READ_Z1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) tc.z2 = tsc2007_xfer(tsc, READ_Z2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) *val = tsc2007_calculate_resistance(tsc, &tc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) *val = tsc2007_is_pen_down(tsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *val = tsc2007_xfer(tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *val = tsc2007_xfer(tsc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Prepare for next touch reading - power down ADC, enable PENIRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) tsc2007_xfer(tsc, PWRDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mutex_unlock(&tsc->mlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ret = IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct iio_info tsc2007_iio_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .read_raw = tsc2007_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int tsc2007_iio_configure(struct tsc2007 *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct tsc2007_iio *iio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) indio_dev = devm_iio_device_alloc(&ts->client->dev, sizeof(*iio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!indio_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dev_err(&ts->client->dev, "iio_device_alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) iio = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) iio->ts = ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) indio_dev->name = "tsc2007";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) indio_dev->info = &tsc2007_iio_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) indio_dev->channels = tsc2007_iio_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) error = devm_iio_device_register(&ts->client->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) "iio_device_register() failed: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }