^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Allwinner sunxi resistive touchscreen controller driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 - 2014 Hans de Goede <hdegoede@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * The hwmon parts are based on work by Corentin LABBE which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2013 Corentin LABBE <clabbe.montjoie@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * The sun4i-ts controller is capable of detecting a second touch, but when a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * second touch is present then the accuracy becomes so bad the reported touch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * location is not useable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The original android driver contains some complicated heuristics using the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * aprox. distance between the 2 touches to see if the user is making a pinch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * open / close movement, and then reports emulated multi-touch events around
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * the last touch coordinate (as the dual-touch coordinates are worthless).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * These kinds of heuristics are just asking for trouble (and don't belong
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * in the kernel). So this driver offers straight forward, reliable single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * touch functionality only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * s.a. A20 User Manual "1.15 TP" (Documentation/arm/sunxi.rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * (looks like the description in the A20 User Manual v1.3 is better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * than the one in the A10 User Manual v.1.5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/hwmon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/thermal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define TP_CTRL0 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TP_CTRL1 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TP_CTRL2 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define TP_CTRL3 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TP_INT_FIFOC 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TP_INT_FIFOS 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TP_TPR 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define TP_CDAT 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define TEMP_DATA 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define TP_DATA 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* TP_CTRL0 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ADC_FIRST_DLY(x) ((x) << 24) /* 8 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ADC_FIRST_DLY_MODE(x) ((x) << 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ADC_CLK_SEL(x) ((x) << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define ADC_CLK_DIV(x) ((x) << 20) /* 3 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define FS_DIV(x) ((x) << 16) /* 4 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define T_ACQ(x) ((x) << 0) /* 16 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* TP_CTRL1 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define STYLUS_UP_DEBOUN(x) ((x) << 12) /* 8 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define STYLUS_UP_DEBOUN_EN(x) ((x) << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define TOUCH_PAN_CALI_EN(x) ((x) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define TP_DUAL_EN(x) ((x) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define TP_MODE_EN(x) ((x) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define TP_ADC_SELECT(x) ((x) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define ADC_CHAN_SELECT(x) ((x) << 0) /* 3 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* on sun6i, bits 3~6 are left shifted by 1 to 4~7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SUN6I_TP_MODE_EN(x) ((x) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* TP_CTRL2 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define TP_SENSITIVE_ADJUST(x) ((x) << 28) /* 4 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define TP_MODE_SELECT(x) ((x) << 26) /* 2 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PRE_MEA_EN(x) ((x) << 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PRE_MEA_THRE_CNT(x) ((x) << 0) /* 24 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* TP_CTRL3 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define FILTER_EN(x) ((x) << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define FILTER_TYPE(x) ((x) << 0) /* 2 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* TP_INT_FIFOC irq and fifo mask / control bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define TEMP_IRQ_EN(x) ((x) << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define OVERRUN_IRQ_EN(x) ((x) << 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define DATA_IRQ_EN(x) ((x) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define TP_DATA_XY_CHANGE(x) ((x) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define FIFO_TRIG(x) ((x) << 8) /* 5 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define DATA_DRQ_EN(x) ((x) << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define FIFO_FLUSH(x) ((x) << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define TP_UP_IRQ_EN(x) ((x) << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define TP_DOWN_IRQ_EN(x) ((x) << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* TP_INT_FIFOS irq and fifo status bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define TEMP_DATA_PENDING BIT(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define FIFO_OVERRUN_PENDING BIT(17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define FIFO_DATA_PENDING BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define TP_IDLE_FLG BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define TP_UP_PENDING BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define TP_DOWN_PENDING BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* TP_TPR bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define TEMP_ENABLE(x) ((x) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define TEMP_PERIOD(x) ((x) << 0) /* t = x * 256 * 16 / clkin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct sun4i_ts_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bool ignore_fifo_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int temp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int temp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int temp_step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void sun4i_ts_irq_handle_input(struct sun4i_ts_data *ts, u32 reg_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (reg_val & FIFO_DATA_PENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) x = readl(ts->base + TP_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) y = readl(ts->base + TP_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* The 1st location reported after an up event is unreliable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (!ts->ignore_fifo_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) input_report_abs(ts->input, ABS_X, x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) input_report_abs(ts->input, ABS_Y, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * The hardware has a separate down status bit, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * that gets set before we get the first location,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * resulting in reporting a click on the old location.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) input_report_key(ts->input, BTN_TOUCH, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) input_sync(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ts->ignore_fifo_data = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (reg_val & TP_UP_PENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ts->ignore_fifo_data = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) input_report_key(ts->input, BTN_TOUCH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) input_sync(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static irqreturn_t sun4i_ts_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct sun4i_ts_data *ts = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u32 reg_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) reg_val = readl(ts->base + TP_INT_FIFOS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (reg_val & TEMP_DATA_PENDING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ts->temp_data = readl(ts->base + TEMP_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (ts->input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) sun4i_ts_irq_handle_input(ts, reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) writel(reg_val, ts->base + TP_INT_FIFOS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static int sun4i_ts_open(struct input_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct sun4i_ts_data *ts = input_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Flush, set trig level to 1, enable temp, data and up irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) writel(TEMP_IRQ_EN(1) | DATA_IRQ_EN(1) | FIFO_TRIG(1) | FIFO_FLUSH(1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) TP_UP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void sun4i_ts_close(struct input_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct sun4i_ts_data *ts = input_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Deactivate all input IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int sun4i_get_temp(const struct sun4i_ts_data *ts, int *temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* No temp_data until the first irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (ts->temp_data == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) *temp = ts->temp_data * ts->temp_step - ts->temp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int sun4i_get_tz_temp(void *data, int *temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return sun4i_get_temp(data, temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .get_temp = sun4i_get_tz_temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct sun4i_ts_data *ts = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) error = sun4i_get_temp(ts, &temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return sprintf(buf, "%d\n", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static ssize_t show_temp_label(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct device_attribute *devattr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return sprintf(buf, "SoC temperature\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static DEVICE_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static struct attribute *sun4i_ts_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) &dev_attr_temp1_input.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) &dev_attr_temp1_label.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ATTRIBUTE_GROUPS(sun4i_ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int sun4i_ts_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct sun4i_ts_data *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct device *hwmon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct thermal_zone_device *thermal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) bool ts_attached;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u32 tp_sensitive_adjust = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u32 filter_type = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ts = devm_kzalloc(dev, sizeof(struct sun4i_ts_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (!ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ts->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ts->ignore_fifo_data = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ts->temp_data = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (of_device_is_compatible(np, "allwinner,sun6i-a31-ts")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* Allwinner SDK has temperature (C) = (value / 6) - 271 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ts->temp_offset = 271000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ts->temp_step = 167;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) } else if (of_device_is_compatible(np, "allwinner,sun4i-a10-ts")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * The A10 temperature sensor has quite a wide spread, these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * parameters are based on the averaging of the calibration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * results of 4 completely different boards, with a spread of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * temp_step from 0.096 - 0.170 and temp_offset from 176 - 331.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ts->temp_offset = 257000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ts->temp_step = 133;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * The user manuals do not contain the formula for calculating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * the temperature. The formula used here is from the AXP209,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * which is designed by X-Powers, an affiliate of Allwinner:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * temperature (C) = (value * 0.1) - 144.7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * Allwinner does not have any documentation whatsoever for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * this hardware. Moreover, it is claimed that the sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * is inaccurate and cannot work properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ts->temp_offset = 144700;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ts->temp_step = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ts_attached = of_property_read_bool(np, "allwinner,ts-attached");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ts_attached) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ts->input = devm_input_allocate_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!ts->input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ts->input->name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ts->input->phys = "sun4i_ts/input0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) ts->input->open = sun4i_ts_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ts->input->close = sun4i_ts_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ts->input->id.bustype = BUS_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ts->input->id.vendor = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ts->input->id.product = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ts->input->id.version = 0x0100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ts->input->evbit[0] = BIT(EV_SYN) | BIT(EV_KEY) | BIT(EV_ABS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) __set_bit(BTN_TOUCH, ts->input->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) input_set_abs_params(ts->input, ABS_X, 0, 4095, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) input_set_abs_params(ts->input, ABS_Y, 0, 4095, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) input_set_drvdata(ts->input, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ts->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (IS_ERR(ts->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return PTR_ERR(ts->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ts->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) error = devm_request_irq(dev, ts->irq, sun4i_ts_irq, 0, "sun4i-ts", ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * Select HOSC clk, clkin = clk / 6, adc samplefreq = clkin / 8192,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * t_acq = clkin / (16 * 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) writel(ADC_CLK_SEL(0) | ADC_CLK_DIV(2) | FS_DIV(7) | T_ACQ(63),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ts->base + TP_CTRL0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * tp_sensitive_adjust is an optional property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * tp_mode = 0 : only x and y coordinates, as we don't use dual touch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) of_property_read_u32(np, "allwinner,tp-sensitive-adjust",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) &tp_sensitive_adjust);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) writel(TP_SENSITIVE_ADJUST(tp_sensitive_adjust) | TP_MODE_SELECT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ts->base + TP_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * Enable median and averaging filter, optional property for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * filter type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) of_property_read_u32(np, "allwinner,filter-type", &filter_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) writel(FILTER_EN(1) | FILTER_TYPE(filter_type), ts->base + TP_CTRL3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* Enable temperature measurement, period 1953 (2 seconds) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) writel(TEMP_ENABLE(1) | TEMP_PERIOD(1953), ts->base + TP_TPR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * Set stylus up debounce to aprox 10 ms, enable debounce, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * finally enable tp mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) reg = STYLUS_UP_DEBOUN(5) | STYLUS_UP_DEBOUN_EN(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (of_device_is_compatible(np, "allwinner,sun6i-a31-ts"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) reg |= SUN6I_TP_MODE_EN(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) reg |= TP_MODE_EN(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) writel(reg, ts->base + TP_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * The thermal core does not register hwmon devices for DT-based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * thermal zone sensors, such as this one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) hwmon = devm_hwmon_device_register_with_groups(ts->dev, "sun4i_ts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ts, sun4i_ts_groups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (IS_ERR(hwmon))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return PTR_ERR(hwmon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) thermal = devm_thermal_zone_of_sensor_register(ts->dev, 0, ts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) &sun4i_ts_tz_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (IS_ERR(thermal))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return PTR_ERR(thermal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) writel(TEMP_IRQ_EN(1), ts->base + TP_INT_FIFOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (ts_attached) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) error = input_register_device(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) writel(0, ts->base + TP_INT_FIFOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) platform_set_drvdata(pdev, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static int sun4i_ts_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct sun4i_ts_data *ts = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) /* Explicit unregister to avoid open/close changing the imask later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (ts->input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) input_unregister_device(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Deactivate all IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) writel(0, ts->base + TP_INT_FIFOC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static const struct of_device_id sun4i_ts_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) { .compatible = "allwinner,sun4i-a10-ts", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) { .compatible = "allwinner,sun5i-a13-ts", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) { .compatible = "allwinner,sun6i-a31-ts", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) MODULE_DEVICE_TABLE(of, sun4i_ts_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static struct platform_driver sun4i_ts_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .name = "sun4i-ts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .of_match_table = of_match_ptr(sun4i_ts_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .probe = sun4i_ts_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .remove = sun4i_ts_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) module_platform_driver(sun4i_ts_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) MODULE_DESCRIPTION("Allwinner sun4i resistive touchscreen controller driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) MODULE_LICENSE("GPL");