^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MELFAS MIP4 Touchscreen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2016 MELFAS Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author : Sangwon Jee <jeesw@melfas.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/input/mt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MIP4_DEVICE_NAME "mip4_ts"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*****************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Version : MIP 4.0 Rev 5.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *****************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MIP4_R0_BOOT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MIP4_R1_BOOT_MODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MIP4_R1_BOOT_BUF_ADDR 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MIP4_R1_BOOT_STATUS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MIP4_R1_BOOT_CMD 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MIP4_R1_BOOT_TARGET_ADDR 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MIP4_R1_BOOT_SIZE 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MIP4_R0_INFO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MIP4_R1_INFO_PRODUCT_NAME 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MIP4_R1_INFO_RESOLUTION_X 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MIP4_R1_INFO_RESOLUTION_Y 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MIP4_R1_INFO_NODE_NUM_X 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MIP4_R1_INFO_NODE_NUM_Y 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MIP4_R1_INFO_KEY_NUM 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MIP4_R1_INFO_PRESSURE_NUM 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MIP4_R1_INFO_LENGTH_X 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MIP4_R1_INFO_LENGTH_Y 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MIP4_R1_INFO_PPM_X 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MIP4_R1_INFO_PPM_Y 0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MIP4_R1_INFO_VERSION_BOOT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MIP4_R1_INFO_VERSION_CORE 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MIP4_R1_INFO_VERSION_APP 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MIP4_R1_INFO_VERSION_PARAM 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MIP4_R1_INFO_SECT_BOOT_START 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define MIP4_R1_INFO_SECT_BOOT_END 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MIP4_R1_INFO_SECT_CORE_START 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MIP4_R1_INFO_SECT_CORE_END 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MIP4_R1_INFO_SECT_APP_START 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MIP4_R1_INFO_SECT_APP_END 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MIP4_R1_INFO_SECT_PARAM_START 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MIP4_R1_INFO_SECT_PARAM_END 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define MIP4_R1_INFO_BUILD_DATE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MIP4_R1_INFO_BUILD_TIME 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MIP4_R1_INFO_CHECKSUM_PRECALC 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MIP4_R1_INFO_CHECKSUM_REALTIME 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define MIP4_R1_INFO_PROTOCOL_NAME 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MIP4_R1_INFO_PROTOCOL_VERSION 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MIP4_R1_INFO_IC_ID 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define MIP4_R1_INFO_IC_NAME 0x71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define MIP4_R1_INFO_IC_VENDOR_ID 0x75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MIP4_R1_INFO_IC_HW_CATEGORY 0x77
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define MIP4_R1_INFO_CONTACT_THD_SCR 0x78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define MIP4_R1_INFO_CONTACT_THD_KEY 0x7A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define MIP4_R1_INFO_PID 0x7C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define MIP4_R1_INFO_VID 0x7E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define MIP4_R1_INFO_SLAVE_ADDR 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MIP4_R0_EVENT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define MIP4_R1_EVENT_SUPPORTED_FUNC 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MIP4_R1_EVENT_FORMAT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define MIP4_R1_EVENT_SIZE 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MIP4_R1_EVENT_PACKET_INFO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define MIP4_R1_EVENT_PACKET_DATA 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MIP4_R0_CTRL 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MIP4_R1_CTRL_READY_STATUS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MIP4_R1_CTRL_EVENT_READY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MIP4_R1_CTRL_MODE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MIP4_R1_CTRL_EVENT_TRIGGER_TYPE 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MIP4_R1_CTRL_RECALIBRATE 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define MIP4_R1_CTRL_POWER_STATE 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define MIP4_R1_CTRL_GESTURE_TYPE 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define MIP4_R1_CTRL_DISABLE_ESD_ALERT 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define MIP4_R1_CTRL_CHARGER_MODE 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define MIP4_R1_CTRL_HIGH_SENS_MODE 0x1A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define MIP4_R1_CTRL_WINDOW_MODE 0x1B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define MIP4_R1_CTRL_PALM_REJECTION 0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define MIP4_R1_CTRL_EDGE_CORRECTION 0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define MIP4_R1_CTRL_ENTER_GLOVE_MODE 0x1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define MIP4_R1_CTRL_I2C_ON_LPM 0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define MIP4_R1_CTRL_GESTURE_DEBUG 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define MIP4_R1_CTRL_PALM_EVENT 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define MIP4_R1_CTRL_PROXIMITY_SENSING 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define MIP4_BOOT_MODE_BOOT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define MIP4_BOOT_MODE_APP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define MIP4_BOOT_STATUS_BUSY 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define MIP4_BOOT_STATUS_ERROR 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define MIP4_BOOT_STATUS_DONE 0xA0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define MIP4_BOOT_CMD_MASS_ERASE 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define MIP4_BOOT_CMD_PROGRAM 0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define MIP4_BOOT_CMD_ERASE 0x8F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define MIP4_BOOT_CMD_WRITE 0xA5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define MIP4_BOOT_CMD_READ 0xC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define MIP4_EVENT_INPUT_TYPE_KEY 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define MIP4_EVENT_INPUT_TYPE_SCREEN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define MIP4_EVENT_INPUT_TYPE_PROXIMITY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define I2C_RETRY_COUNT 3 /* 2~ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define MIP4_BUF_SIZE 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define MIP4_MAX_FINGERS 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define MIP4_MAX_KEYS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define MIP4_TOUCH_MAJOR_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define MIP4_TOUCH_MAJOR_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define MIP4_TOUCH_MINOR_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define MIP4_TOUCH_MINOR_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define MIP4_PRESSURE_MIN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define MIP4_PRESSURE_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define MIP4_FW_NAME "melfas_mip4.fw"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define MIP4_FW_UPDATE_DEBUG 0 /* 0 (default) or 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct mip4_fw_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u16 boot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u16 core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u16 app;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u16 param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct mip4_ts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct gpio_desc *gpio_ce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) char phys[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) char product_name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u16 product_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) char ic_name[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) char fw_name[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned int max_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int max_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u8 node_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 node_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u8 node_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned int ppm_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) unsigned int ppm_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct mip4_fw_version fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) unsigned int event_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned int event_format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) unsigned int key_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned short key_code[MIP4_MAX_KEYS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) bool wake_irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u8 buf[MIP4_BUF_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int mip4_i2c_xfer(struct mip4_ts *ts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) char *write_buf, unsigned int write_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) char *read_buf, unsigned int read_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .buf = write_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .len = write_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .buf = read_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .len = read_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) int retry = I2C_RETRY_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) res = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (res == ARRAY_SIZE(msg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) error = res < 0 ? res : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) "%s - i2c_transfer failed: %d (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) __func__, error, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) } while (--retry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static void mip4_parse_fw_version(const u8 *buf, struct mip4_fw_version *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) v->boot = get_unaligned_le16(buf + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) v->core = get_unaligned_le16(buf + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) v->app = get_unaligned_le16(buf + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) v->param = get_unaligned_le16(buf + 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * Read chip firmware version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int mip4_get_fw_version(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 cmd[] = { MIP4_R0_INFO, MIP4_R1_INFO_VERSION_BOOT };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) u8 buf[sizeof(ts->fw_version)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) memset(&ts->fw_version, 0xff, sizeof(ts->fw_version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) mip4_parse_fw_version(buf, &ts->fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * Fetch device characteristics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static int mip4_query_device(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) union i2c_smbus_data dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) u8 cmd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u8 buf[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * Make sure there is something at this address as we do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * consider subsequent failures as fatal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (i2c_smbus_xfer(ts->client->adapter, ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 0, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &dummy) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) dev_err(&ts->client->dev, "nothing at this address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Product name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) cmd[0] = MIP4_R0_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) cmd[1] = MIP4_R1_INFO_PRODUCT_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ts->product_name, sizeof(ts->product_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) "Failed to retrieve product name: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) dev_dbg(&ts->client->dev, "product name: %.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) (int)sizeof(ts->product_name), ts->product_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Product ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) cmd[0] = MIP4_R0_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) cmd[1] = MIP4_R1_INFO_PID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) "Failed to retrieve product id: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ts->product_id = get_unaligned_le16(&buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) dev_dbg(&ts->client->dev, "product id: %04X\n", ts->product_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* Firmware name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) snprintf(ts->fw_name, sizeof(ts->fw_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) "melfas_mip4_%04X.fw", ts->product_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) dev_dbg(&ts->client->dev, "firmware name: %s\n", ts->fw_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* IC name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) cmd[0] = MIP4_R0_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) cmd[1] = MIP4_R1_INFO_IC_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ts->ic_name, sizeof(ts->ic_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) "Failed to retrieve IC name: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) dev_dbg(&ts->client->dev, "IC name: %.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) (int)sizeof(ts->ic_name), ts->ic_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /* Firmware version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) error = mip4_get_fw_version(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) "Failed to retrieve FW version: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev_dbg(&ts->client->dev, "F/W Version: %04X %04X %04X %04X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) ts->fw_version.boot, ts->fw_version.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) ts->fw_version.app, ts->fw_version.param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /* Resolution */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) cmd[0] = MIP4_R0_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) cmd[1] = MIP4_R1_INFO_RESOLUTION_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), buf, 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) "Failed to retrieve touchscreen parameters: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) ts->max_x = get_unaligned_le16(&buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) ts->max_y = get_unaligned_le16(&buf[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) dev_dbg(&ts->client->dev, "max_x: %d, max_y: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ts->max_x, ts->max_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ts->node_x = buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) ts->node_y = buf[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ts->node_key = buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) "node_x: %d, node_y: %d, node_key: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ts->node_x, ts->node_y, ts->node_key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ts->ppm_x = buf[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ts->ppm_y = buf[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) dev_dbg(&ts->client->dev, "ppm_x: %d, ppm_y: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ts->ppm_x, ts->ppm_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Key ts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (ts->node_key > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ts->key_num = ts->node_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* Protocol */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) cmd[0] = MIP4_R0_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) cmd[1] = MIP4_R1_EVENT_SUPPORTED_FUNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), buf, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) "Failed to retrieve device type: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) ts->event_format = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ts->event_format = get_unaligned_le16(&buf[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ts->event_size = buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) dev_dbg(&ts->client->dev, "event_format: %d, event_size: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ts->event_format, ts->event_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (ts->event_format == 2 || ts->event_format > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) dev_warn(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "Unknown event format %d\n", ts->event_format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static int mip4_power_on(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if (ts->gpio_ce) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) gpiod_set_value_cansleep(ts->gpio_ce, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* Booting delay : 200~300ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) usleep_range(200 * 1000, 300 * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static void mip4_power_off(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (ts->gpio_ce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) gpiod_set_value_cansleep(ts->gpio_ce, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * Clear touch input event status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static void mip4_clear_input(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* Screen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) for (i = 0; i < MIP4_MAX_FINGERS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) input_mt_slot(ts->input, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) input_mt_report_slot_inactive(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* Keys */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) for (i = 0; i < ts->key_num; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) input_report_key(ts->input, ts->key_code[i], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) input_sync(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static int mip4_enable(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) error = mip4_power_on(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) enable_irq(ts->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static void mip4_disable(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) disable_irq(ts->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mip4_power_off(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) mip4_clear_input(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /*****************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * Input handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) *****************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) static void mip4_report_keys(struct mip4_ts *ts, u8 *packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u8 key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) bool down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) switch (ts->event_format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) key = packet[0] & 0x0F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) down = packet[0] & 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) key = packet[0] & 0x0F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) down = packet[1] & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Report key event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (key >= 1 && key <= ts->key_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) unsigned short keycode = ts->key_code[key - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) "Key - ID: %d, keycode: %d, state: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) key, keycode, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) input_event(ts->input, EV_MSC, MSC_SCAN, keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) input_report_key(ts->input, keycode, down);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) dev_err(&ts->client->dev, "Unknown key: %d\n", key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static void mip4_report_touch(struct mip4_ts *ts, u8 *packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) bool hover;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) bool palm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) bool state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) u16 x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u8 pressure_stage = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) u8 pressure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u8 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u8 touch_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u8 touch_minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) switch (ts->event_format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* Touch only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) state = packet[0] & BIT(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) hover = packet[0] & BIT(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) palm = packet[0] & BIT(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) id = (packet[0] & 0x0F) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) x = ((packet[1] & 0x0F) << 8) | packet[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) y = (((packet[1] >> 4) & 0x0F) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) packet[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) pressure = packet[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) size = packet[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (ts->event_format == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) touch_major = packet[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) touch_minor = packet[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) touch_major = packet[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) touch_minor = packet[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* Touch + Force(Pressure) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) id = (packet[0] & 0x0F) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) hover = packet[1] & BIT(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) palm = packet[1] & BIT(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) state = packet[1] & BIT(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) x = ((packet[2] & 0x0F) << 8) | packet[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) y = (((packet[2] >> 4) & 0x0F) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) packet[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) size = packet[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) pressure_stage = (packet[7] & 0xF0) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) pressure = ((packet[7] & 0x0F) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) packet[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) touch_major = packet[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) touch_minor = packet[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) "Screen - Slot: %d State: %d X: %04d Y: %04d Z: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) id, state, x, y, pressure);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (unlikely(id < 0 || id >= MIP4_MAX_FINGERS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) dev_err(&ts->client->dev, "Screen - invalid slot ID: %d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) } else if (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /* Press or Move event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) input_mt_slot(ts->input, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) input_mt_report_slot_state(ts->input, MT_TOOL_FINGER, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) input_report_abs(ts->input, ABS_MT_POSITION_X, x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) input_report_abs(ts->input, ABS_MT_POSITION_Y, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) input_report_abs(ts->input, ABS_MT_PRESSURE, pressure);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) input_report_abs(ts->input, ABS_MT_TOUCH_MAJOR, touch_major);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) input_report_abs(ts->input, ABS_MT_TOUCH_MINOR, touch_minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* Release event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) input_mt_slot(ts->input, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) input_mt_report_slot_inactive(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) input_mt_sync_frame(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static int mip4_handle_packet(struct mip4_ts *ts, u8 *packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) switch (ts->event_format) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) type = (packet[0] & 0x40) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) type = (packet[0] & 0xF0) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* Should not happen unless we have corrupted firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) dev_dbg(&ts->client->dev, "Type: %d\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* Report input event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) case MIP4_EVENT_INPUT_TYPE_KEY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) mip4_report_keys(ts, packet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) case MIP4_EVENT_INPUT_TYPE_SCREEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) mip4_report_touch(ts, packet);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) dev_err(&ts->client->dev, "Unknown event type: %d\n", type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static irqreturn_t mip4_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct mip4_ts *ts = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) struct i2c_client *client = ts->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u8 cmd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) u8 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) bool alert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* Read packet info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) cmd[0] = MIP4_R0_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) cmd[1] = MIP4_R1_EVENT_PACKET_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), ts->buf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) "Failed to read packet info: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) size = ts->buf[0] & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) alert = ts->buf[0] & BIT(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) dev_dbg(&client->dev, "packet size: %d, alert: %d\n", size, alert);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /* Check size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (!size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) dev_err(&client->dev, "Empty packet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) /* Read packet data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) cmd[0] = MIP4_R0_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) cmd[1] = MIP4_R1_EVENT_PACKET_DATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) error = mip4_i2c_xfer(ts, cmd, sizeof(cmd), ts->buf, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) "Failed to read packet data: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (alert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) dev_dbg(&client->dev, "Alert: %d\n", ts->buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) for (i = 0; i < size; i += ts->event_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) error = mip4_handle_packet(ts, &ts->buf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) input_sync(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static int mip4_input_open(struct input_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct mip4_ts *ts = input_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return mip4_enable(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static void mip4_input_close(struct input_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) struct mip4_ts *ts = input_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) mip4_disable(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /*****************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * Firmware update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) *****************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* Firmware Info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) #define MIP4_BL_PAGE_SIZE 512 /* 512 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) #define MIP4_BL_PACKET_SIZE 512 /* 512, 256, 128, 64, ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * Firmware binary tail info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) struct mip4_bin_tail {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) u8 tail_mark[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) u8 chip_name[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) __le32 bin_start_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) __le32 bin_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) __le16 ver_boot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) __le16 ver_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) __le16 ver_app;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) __le16 ver_param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) u8 boot_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) u8 boot_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) u8 core_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) u8 core_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) u8 app_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) u8 app_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) u8 param_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) u8 param_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) u8 checksum_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) u8 hw_category;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) __le16 param_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) __le32 param_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) __le32 build_date;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) __le32 build_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) __le32 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) __le32 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) __le16 reserved3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) __le16 tail_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) __le32 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) #define MIP4_BIN_TAIL_MARK "MBT\001"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) #define MIP4_BIN_TAIL_SIZE (sizeof(struct mip4_bin_tail))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * Bootloader - Read status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static int mip4_bl_read_status(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) u8 cmd[] = { MIP4_R0_BOOT, MIP4_R1_BOOT_STATUS };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) u8 result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .buf = cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .len = sizeof(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .buf = &result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .len = sizeof(result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) int retry = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (ret != ARRAY_SIZE(msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) "Failed to read bootloader status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) switch (result) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) case MIP4_BOOT_STATUS_DONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) dev_dbg(&ts->client->dev, "%s - done\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) case MIP4_BOOT_STATUS_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) dev_err(&ts->client->dev, "Bootloader failure\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) case MIP4_BOOT_STATUS_BUSY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) dev_dbg(&ts->client->dev, "%s - Busy\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) error = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) "Unexpected bootloader status: %#02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) error = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) } while (--retry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) * Bootloader - Change mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) static int mip4_bl_change_mode(struct mip4_ts *ts, u8 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) u8 mode_chg_cmd[] = { MIP4_R0_BOOT, MIP4_R1_BOOT_MODE, mode };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) u8 mode_read_cmd[] = { MIP4_R0_BOOT, MIP4_R1_BOOT_MODE };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u8 result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .buf = mode_read_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .len = sizeof(mode_read_cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .buf = &result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .len = sizeof(result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) int retry = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) /* Send mode change command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) ret = i2c_master_send(ts->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) mode_chg_cmd, sizeof(mode_chg_cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (ret != sizeof(mode_chg_cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) "Failed to send %d mode change: %d (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) mode, error, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) "Sent mode change request (mode: %d)\n", mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /* Wait */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /* Verify target mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (ret != ARRAY_SIZE(msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) "Failed to read device mode: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) "Current device mode: %d, want: %d\n", result, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) if (result == mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) } while (--retry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * Bootloader - Start bootloader mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) static int mip4_bl_enter(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) return mip4_bl_change_mode(ts, MIP4_BOOT_MODE_BOOT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * Bootloader - Exit bootloader mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) static int mip4_bl_exit(struct mip4_ts *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return mip4_bl_change_mode(ts, MIP4_BOOT_MODE_APP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static int mip4_bl_get_address(struct mip4_ts *ts, u16 *buf_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) u8 cmd[] = { MIP4_R0_BOOT, MIP4_R1_BOOT_BUF_ADDR };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) u8 result[sizeof(u16)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .buf = cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .len = sizeof(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .buf = result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .len = sizeof(result),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (ret != ARRAY_SIZE(msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) "Failed to retrieve bootloader buffer address: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) *buf_addr = get_unaligned_le16(result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) "Bootloader buffer address %#04x\n", *buf_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static int mip4_bl_program_page(struct mip4_ts *ts, int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) const u8 *data, int length, u16 buf_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) u8 cmd[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) u8 *data_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) u16 buf_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) dev_dbg(&ts->client->dev, "Writing page @%#06x (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) offset, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (length > MIP4_BL_PAGE_SIZE || length % MIP4_BL_PACKET_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) "Invalid page length: %d\n", length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) data_buf = kmalloc(2 + MIP4_BL_PACKET_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (!data_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* Addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) cmd[1] = MIP4_R1_BOOT_TARGET_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) put_unaligned_le32(offset, &cmd[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) ret = i2c_master_send(ts->client, cmd, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) if (ret != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) "Failed to send write page address: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) /* Size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) cmd[1] = MIP4_R1_BOOT_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) put_unaligned_le32(length, &cmd[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) ret = i2c_master_send(ts->client, cmd, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (ret != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) "Failed to send write page size: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) /* Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) for (buf_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) buf_offset < length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) buf_offset += MIP4_BL_PACKET_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) "writing chunk at %#04x (size %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) buf_offset, MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) put_unaligned_be16(buf_addr + buf_offset, data_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) memcpy(&data_buf[2], &data[buf_offset], MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) ret = i2c_master_send(ts->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) data_buf, 2 + MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if (ret != 2 + MIP4_BL_PACKET_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) "Failed to read chunk at %#04x (size %d): %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) buf_offset, MIP4_BL_PACKET_SIZE, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) /* Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) cmd[1] = MIP4_R1_BOOT_CMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) cmd[2] = MIP4_BOOT_CMD_PROGRAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) ret = i2c_master_send(ts->client, cmd, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) if (ret != 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) "Failed to send 'write' command: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) /* Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) error = mip4_bl_read_status(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) kfree(data_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) return error ? error : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) static int mip4_bl_verify_page(struct mip4_ts *ts, int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) const u8 *data, int length, int buf_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) u8 cmd[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u8 *read_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) int buf_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) struct i2c_msg msg[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .buf = cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .addr = ts->client->addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .flags = I2C_M_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .len = MIP4_BL_PACKET_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) dev_dbg(&ts->client->dev, "Validating page @%#06x (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) offset, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) /* Addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) cmd[1] = MIP4_R1_BOOT_TARGET_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) put_unaligned_le32(offset, &cmd[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) ret = i2c_master_send(ts->client, cmd, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) if (ret != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) "Failed to send read page address: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) /* Size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) cmd[1] = MIP4_R1_BOOT_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) put_unaligned_le32(length, &cmd[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) ret = i2c_master_send(ts->client, cmd, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (ret != 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) "Failed to send read page size: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /* Command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) cmd[0] = MIP4_R0_BOOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) cmd[1] = MIP4_R1_BOOT_CMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) cmd[2] = MIP4_BOOT_CMD_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) ret = i2c_master_send(ts->client, cmd, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (ret != 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) "Failed to send 'read' command: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) /* Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) error = mip4_bl_read_status(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) /* Read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) msg[1].buf = read_buf = kmalloc(MIP4_BL_PACKET_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) if (!read_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) for (buf_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) buf_offset < length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) buf_offset += MIP4_BL_PACKET_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) "reading chunk at %#04x (size %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) buf_offset, MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) put_unaligned_be16(buf_addr + buf_offset, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) ret = i2c_transfer(ts->client->adapter, msg, ARRAY_SIZE(msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) if (ret != ARRAY_SIZE(msg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) error = ret < 0 ? ret : -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) "Failed to read chunk at %#04x (size %d): %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) buf_offset, MIP4_BL_PACKET_SIZE, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) if (memcmp(&data[buf_offset], read_buf, MIP4_BL_PACKET_SIZE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) "Failed to validate chunk at %#04x (size %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) buf_offset, MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) #if MIP4_FW_UPDATE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) print_hex_dump(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) MIP4_DEVICE_NAME " F/W File: ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) DUMP_PREFIX_OFFSET, 16, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) data + offset, MIP4_BL_PACKET_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) print_hex_dump(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) MIP4_DEVICE_NAME " F/W Chip: ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) DUMP_PREFIX_OFFSET, 16, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) read_buf, MIP4_BL_PAGE_SIZE, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) error = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) kfree(read_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) return error ? error : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * Flash chip firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) static int mip4_flash_fw(struct mip4_ts *ts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) const u8 *fw_data, u32 fw_size, u32 fw_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) struct i2c_client *client = ts->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) u16 buf_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) int error, error2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) /* Enter bootloader mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) dev_dbg(&client->dev, "Entering bootloader mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) error = mip4_bl_enter(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) "Failed to enter bootloader mode: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) /* Read info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) error = mip4_bl_get_address(ts, &buf_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) goto exit_bl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) /* Program & Verify */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) "Program & Verify, page size: %d, packet size: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) MIP4_BL_PAGE_SIZE, MIP4_BL_PACKET_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) for (offset = fw_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) offset < fw_offset + fw_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) offset += MIP4_BL_PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) /* Program */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) error = mip4_bl_program_page(ts, offset, fw_data + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) MIP4_BL_PAGE_SIZE, buf_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) /* Verify */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) error = mip4_bl_verify_page(ts, offset, fw_data + offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) MIP4_BL_PAGE_SIZE, buf_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) exit_bl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) /* Exit bootloader mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) dev_dbg(&client->dev, "Exiting bootloader mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) error2 = mip4_bl_exit(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (error2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) "Failed to exit bootloader mode: %d\n", error2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (!error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) error = error2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) /* Reset chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) mip4_power_off(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) mip4_power_on(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) mip4_query_device(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) /* Refresh device parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) input_set_abs_params(ts->input, ABS_MT_POSITION_X, 0, ts->max_x, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) input_set_abs_params(ts->input, ABS_MT_POSITION_Y, 0, ts->max_y, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) input_set_abs_params(ts->input, ABS_X, 0, ts->max_x, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) input_set_abs_params(ts->input, ABS_Y, 0, ts->max_y, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->ppm_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->ppm_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) input_abs_set_res(ts->input, ABS_X, ts->ppm_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) input_abs_set_res(ts->input, ABS_Y, ts->ppm_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) return error ? error : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) static int mip4_parse_firmware(struct mip4_ts *ts, const struct firmware *fw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) u32 *fw_offset_start, u32 *fw_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) const struct mip4_bin_tail **pfw_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) const struct mip4_bin_tail *fw_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct mip4_fw_version fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) u16 tail_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) if (fw->size < MIP4_BIN_TAIL_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) "Invalid firmware, size mismatch (tail %zd vs %zd)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) MIP4_BIN_TAIL_SIZE, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) fw_info = (const void *)&fw->data[fw->size - MIP4_BIN_TAIL_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) #if MIP4_FW_UPDATE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) print_hex_dump(KERN_ERR, MIP4_DEVICE_NAME " Bin Info: ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) DUMP_PREFIX_OFFSET, 16, 1, *fw_info, tail_size, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) tail_size = get_unaligned_le16(&fw_info->tail_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if (tail_size != MIP4_BIN_TAIL_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) "wrong tail size: %d (expected %zd)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) tail_size, MIP4_BIN_TAIL_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /* Check bin format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (memcmp(fw_info->tail_mark, MIP4_BIN_TAIL_MARK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) sizeof(fw_info->tail_mark))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) "unable to locate tail marker (%*ph vs %*ph)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) (int)sizeof(fw_info->tail_mark), fw_info->tail_mark,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) (int)sizeof(fw_info->tail_mark), MIP4_BIN_TAIL_MARK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) *fw_offset_start = get_unaligned_le32(&fw_info->bin_start_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) *fw_size = get_unaligned_le32(&fw_info->bin_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) "F/W Data offset: %#08x, size: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) *fw_offset_start, *fw_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) if (*fw_size % MIP4_BL_PAGE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) "encoded fw length %d is not multiple of pages (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) *fw_size, MIP4_BL_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) if (fw->size != *fw_offset_start + *fw_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) "Wrong firmware size, expected %d bytes, got %zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) *fw_offset_start + *fw_size, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) mip4_parse_fw_version((const u8 *)&fw_info->ver_boot, &fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) dev_dbg(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) "F/W file version %04X %04X %04X %04X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) fw_version.boot, fw_version.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) fw_version.app, fw_version.param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) dev_dbg(&ts->client->dev, "F/W chip version: %04X %04X %04X %04X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) ts->fw_version.boot, ts->fw_version.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) ts->fw_version.app, ts->fw_version.param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) /* Check F/W type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) if (fw_version.boot != 0xEEEE && fw_version.boot != 0xFFFF &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) fw_version.core == 0xEEEE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) fw_version.app == 0xEEEE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) fw_version.param == 0xEEEE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) dev_dbg(&ts->client->dev, "F/W type: Bootloader\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) } else if (fw_version.boot == 0xEEEE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) fw_version.core != 0xEEEE && fw_version.core != 0xFFFF &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) fw_version.app != 0xEEEE && fw_version.app != 0xFFFF &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) fw_version.param != 0xEEEE && fw_version.param != 0xFFFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dev_dbg(&ts->client->dev, "F/W type: Main\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) dev_err(&ts->client->dev, "Wrong firmware type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) static int mip4_execute_fw_update(struct mip4_ts *ts, const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) const struct mip4_bin_tail *fw_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) u32 fw_start_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) u32 fw_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) int retires = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) error = mip4_parse_firmware(ts, fw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) &fw_start_offset, &fw_size, &fw_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) if (ts->input->users) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) disable_irq(ts->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) error = mip4_power_on(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) /* Update firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) error = mip4_flash_fw(ts, fw->data, fw_size, fw_start_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) if (!error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) } while (--retires);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) "Failed to flash firmware: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) /* Enable IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) if (ts->input->users)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) enable_irq(ts->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) mip4_power_off(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) return error ? error : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) static ssize_t mip4_sysfs_fw_update(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) error = request_firmware(&fw, ts->fw_name, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) "Failed to retrieve firmware %s: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) ts->fw_name, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) * Take input mutex to prevent racing with itself and also with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) * userspace opening and closing the device and also suspend/resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) * transitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) mutex_lock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) error = mip4_execute_fw_update(ts, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) mutex_unlock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) "Firmware update failed: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) static DEVICE_ATTR(update_fw, S_IWUSR, NULL, mip4_sysfs_fw_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) static ssize_t mip4_sysfs_read_fw_version(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) size_t count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) /* Take lock to prevent racing with firmware update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) mutex_lock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) count = snprintf(buf, PAGE_SIZE, "%04X %04X %04X %04X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) ts->fw_version.boot, ts->fw_version.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) ts->fw_version.app, ts->fw_version.param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) mutex_unlock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) static DEVICE_ATTR(fw_version, S_IRUGO, mip4_sysfs_read_fw_version, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) static ssize_t mip4_sysfs_read_hw_version(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) size_t count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) /* Take lock to prevent racing with firmware update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) mutex_lock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) * product_name shows the name or version of the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) * paired with current firmware in the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) count = snprintf(buf, PAGE_SIZE, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) (int)sizeof(ts->product_name), ts->product_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) mutex_unlock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) static DEVICE_ATTR(hw_version, S_IRUGO, mip4_sysfs_read_hw_version, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) static ssize_t mip4_sysfs_read_product_id(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) size_t count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) mutex_lock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) count = snprintf(buf, PAGE_SIZE, "%04X\n", ts->product_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) mutex_unlock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) static DEVICE_ATTR(product_id, S_IRUGO, mip4_sysfs_read_product_id, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) static ssize_t mip4_sysfs_read_ic_name(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) size_t count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) mutex_lock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) count = snprintf(buf, PAGE_SIZE, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) (int)sizeof(ts->ic_name), ts->ic_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) mutex_unlock(&ts->input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) static DEVICE_ATTR(ic_name, S_IRUGO, mip4_sysfs_read_ic_name, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) static struct attribute *mip4_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) &dev_attr_fw_version.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) &dev_attr_hw_version.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) &dev_attr_product_id.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) &dev_attr_ic_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) &dev_attr_update_fw.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) static const struct attribute_group mip4_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) .attrs = mip4_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) static int mip4_probe(struct i2c_client *client, const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) struct mip4_ts *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) dev_err(&client->dev, "Not supported I2C adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) ts = devm_kzalloc(&client->dev, sizeof(*ts), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if (!ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) input = devm_input_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) if (!input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) ts->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) ts->input = input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) snprintf(ts->phys, sizeof(ts->phys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) "%s/input0", dev_name(&client->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) ts->gpio_ce = devm_gpiod_get_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) "ce", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) if (IS_ERR(ts->gpio_ce)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) error = PTR_ERR(ts->gpio_ce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) if (error != EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) "Failed to get gpio: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) error = mip4_power_on(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) error = mip4_query_device(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) mip4_power_off(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) input->name = "MELFAS MIP4 Touchscreen";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) input->phys = ts->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) input->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) input->id.vendor = 0x13c5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) input->id.product = ts->product_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) input->open = mip4_input_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) input->close = mip4_input_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) input_set_drvdata(input, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) input->keycode = ts->key_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) input->keycodesize = sizeof(*ts->key_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) input->keycodemax = ts->key_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) input_set_abs_params(input, ABS_MT_POSITION_X, 0, ts->max_x, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) input_set_abs_params(input, ABS_MT_POSITION_Y, 0, ts->max_y, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) input_set_abs_params(input, ABS_MT_PRESSURE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) MIP4_PRESSURE_MIN, MIP4_PRESSURE_MAX, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) input_set_abs_params(input, ABS_MT_TOUCH_MAJOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) MIP4_TOUCH_MAJOR_MIN, MIP4_TOUCH_MAJOR_MAX, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) input_set_abs_params(input, ABS_MT_TOUCH_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) MIP4_TOUCH_MINOR_MIN, MIP4_TOUCH_MINOR_MAX, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->ppm_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->ppm_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) error = input_mt_init_slots(input, MIP4_MAX_FINGERS, INPUT_MT_DIRECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) i2c_set_clientdata(client, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) error = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) NULL, mip4_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) IRQF_ONESHOT, MIP4_DEVICE_NAME, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) "Failed to request interrupt %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) client->irq, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) error = input_register_device(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) "Failed to register input device: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) error = devm_device_add_group(&client->dev, &mip4_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) "Failed to create sysfs attribute group: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) static int __maybe_unused mip4_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) struct input_dev *input = ts->input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) mutex_lock(&input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) ts->wake_irq_enabled = enable_irq_wake(client->irq) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) else if (input->users)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) mip4_disable(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) mutex_unlock(&input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) static int __maybe_unused mip4_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) struct mip4_ts *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) struct input_dev *input = ts->input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) mutex_lock(&input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) if (ts->wake_irq_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) disable_irq_wake(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) else if (input->users)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) mip4_enable(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) mutex_unlock(&input->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) static SIMPLE_DEV_PM_OPS(mip4_pm_ops, mip4_suspend, mip4_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) static const struct of_device_id mip4_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) { .compatible = "melfas,"MIP4_DEVICE_NAME, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) MODULE_DEVICE_TABLE(of, mip4_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) #ifdef CONFIG_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) static const struct acpi_device_id mip4_acpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) { "MLFS0000", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) MODULE_DEVICE_TABLE(acpi, mip4_acpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) static const struct i2c_device_id mip4_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) { MIP4_DEVICE_NAME, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) MODULE_DEVICE_TABLE(i2c, mip4_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) static struct i2c_driver mip4_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) .id_table = mip4_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) .probe = mip4_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) .name = MIP4_DEVICE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) .of_match_table = of_match_ptr(mip4_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) .acpi_match_table = ACPI_PTR(mip4_acpi_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) .pm = &mip4_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) module_i2c_driver(mip4_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) MODULE_DESCRIPTION("MELFAS MIP4 Touchscreen");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) MODULE_AUTHOR("Sangwon Jee <jeesw@melfas.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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