^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* drivers/input/touchscreen/gt9xx.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * 2010 - 2013 Goodix Technology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the Free Software Foundation; either version 2 of the License, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is distributed in the hope that it will be a reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * to you, when you are integrating the GOODiX's CTP IC into your system,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef _GOODIX_GT9XX_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _GOODIX_GT9XX_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/hrtimer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/of_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "../tp_suspend.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) //#include <mach/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) //#include <linux/earlysuspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define CONFIG_8_9 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define DEBUG_SWITCH 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) //***************************PART1:ON/OFF define*******************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define GTP_CUSTOM_CFG 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #if CONFIG_8_9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define GTP_CHANGE_X2Y 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define GTP_X_REVERSE_ENABLE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define GTP_Y_REVERSE_ENABLE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define GTP_CHANGE_X2Y 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define GTP_X_REVERSE_ENABLE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define GTP_Y_REVERSE_ENABLE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define GTP_DRIVER_SEND_CFG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define GTP_HAVE_TOUCH_KEY 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define GTP_POWER_CTRL_SLEEP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #if defined(CONFIG_CHROME_PLATFORMS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define GTP_ICS_SLOT_REPORT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define GTP_ICS_SLOT_REPORT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define GTP_AUTO_UPDATE 0 // auto update fw by .bin file as default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define GTP_HEADER_FW_UPDATE 0 // auto update fw by gtp_default_FW in gt9xx_firmware.h, function together with GTP_AUTO_UPDATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define GTP_AUTO_UPDATE_CFG 0 // auto update config by .cfg file, function together with GTP_AUTO_UPDATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define GTP_COMPATIBLE_MODE 1 /* compatible with GT9XXF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define GTP_CREATE_WR_NODE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define GTP_ESD_PROTECT 0 // esd protection with a cycle of 2 seconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define GTP_WITH_PEN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define GTP_PEN_HAVE_BUTTON 0 // active pen has buttons, function together with GTP_WITH_PEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define GTP_GESTURE_WAKEUP 0 // gesture wakeup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define GTP_DEBUG_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define GTP_DEBUG_ARRAY_ON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define GTP_DEBUG_FUNC_ON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* init use fixed clk num */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* if open, u8 p_main_clk[6] = {69,69,69,69,69,167}; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define GTP_USE_FIXED_CLK 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define PEN_DOWN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PEN_RELEASE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define PEN_DOWN_UP 2 //fjp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #if GTP_COMPATIBLE_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) typedef enum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) CHIP_TYPE_GT9 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) CHIP_TYPE_GT9F = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) CHIP_TYPE_GT9110 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) } CHIP_TYPE_T;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct goodix_ts_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) spinlock_t irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct input_dev *input_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct hrtimer timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) //struct early_suspend early_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) s32 irq_is_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) s32 use_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u16 abs_x_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u16 abs_y_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) u8 max_touch_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 int_trigger_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 green_wake_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u8 enter_update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u8 gtp_is_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 gtp_rawdiff_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 gtp_cfg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 fixed_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 fw_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u8 pnl_init_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u8 cfg_file_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) //add struct tp_device by Sam
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct tp_device tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) //add by Daniel(yc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int irq_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int pwr_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int rst_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int tp_select_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int rst_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 pendown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned long irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #if GTP_WITH_PEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct input_dev *pen_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #if GTP_ESD_PROTECT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) spinlock_t esd_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) u8 esd_running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) s32 clk_tick_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #if GTP_COMPATIBLE_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u16 bak_ref_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) s32 ref_chk_fs_times;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) s32 clk_chk_fs_times;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) CHIP_TYPE_T chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u8 rqst_processing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) u8 is_950;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct regulator *tp_regulator;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) extern u16 show_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) extern u16 total_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) //*************************** PART2:TODO define **********************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) // STEP_1(REQUIRED): Define Configuration Information Group(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) // Sensor_ID Map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* sensor_opt1 sensor_opt2 Sensor_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) GND GND 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) VDDIO GND 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) NC GND 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) GND NC/300K 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) VDDIO NC/300K 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) NC NC/300K 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) // TODO: define your own default or for Sensor_ID == 0 config here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) // The predefined one is just a sample config, which is not suitable for your tp in most cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define CTP_CFG_GROUP1 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 0x46,0xE0,0x01,0x56,0x03,0x02,0xF1,0x01,0x02,0x44,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 0x00,0x04,0x46,0x32,0x03,0x00,0x00,0x00,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 0x00,0x11,0x04,0x26,0x01,0x74,0x77,0x05,0x00,0x88,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 0x64,0x0F,0xD0,0x07,0x05,0x07,0x00,0xDA,0x01,0x1D,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 0x00,0x01,0x08,0x08,0x33,0x33,0x5D,0xAA,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0x00,0x32,0x96,0x54,0xC5,0x03,0x02,0x00,0x00,0x01,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 0xC8,0x38,0x00,0xA0,0x45,0x00,0x91,0x57,0x00,0x80,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 0x6C,0x00,0x61,0x87,0x00,0x61,0x10,0x0B,0x08,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 0x51,0x40,0x30,0xFF,0xFF,0x00,0x04,0x00,0x00,0x1E,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 0x0A,0x00,0x06,0x0B,0x09,0x0F,0x08,0x07,0x01,0x03,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 0x00,0x00,0x00,0x03,0x02,0x05,0x04,0x07,0x06,0x09,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x12,0x13,0xFF,0xFF,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 0x00,0x00,0x08,0x09,0x0A,0x0D,0x0E,0xFF,0xFF,0xFF,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 0x00,0x00,0x00,0xFF,0x0B,0x0C,0xFF,0xFF,0xFF,0xFF,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 0xFF,0xFF,0xFF,0xFF,0x6C,0xB2,0xB2,0x6C,0xFF,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 0x8C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x08,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 0x00,0x00,0x00,0x00,0x00,0x00,0xF6,0x01\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) //WGJ10187_GT9271_Config_20140623_104014_0X41.cfg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define CTP_CFG_GROUP1 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 0x41,0xB0,0x04,0x80,0x07,0x05,0xF5,0x00,0x01,0x08,0x28,0x0F,0x64,0x32,0x03, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x16,0x19,0x1E,0x14,0x8F,0x2F,0x99, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 0x41,0x43,0x15,0x0E,0x00,0x00,0x00,0x22,0x03,0x1D,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0x00,0x00,0x00,0x00,0x06,0x00,0x2D,0x62,0x94,0xC5,0x02,0x07,0x17,0x00,0x04, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 0x92,0x30,0x00,0x86,0x39,0x00,0x7F,0x42,0x00,0x79,0x4D,0x00,0x74,0x5A,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x74,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x17,0x16,0x15,0x14,0x11,0x10,0x0F,0x0E, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 0x0D,0x0C,0x09,0x08,0x07,0x06,0x05,0x04,0x01,0x00,0xFF,0xFF,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x04,0x06,0x07,0x08,0x0A,0x0C, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 0x0D,0x0F,0x10,0x11,0x12,0x13,0x14,0x29,0x28,0x27,0x26,0x25,0x24,0x23,0x22, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 0x21,0x20,0x1F,0x1E,0x1C,0x1B,0x19,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 0x00,0x00,0x00,0x00,0x3D,0x01 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) //WGJ10187_GT9271_Config_20140623_104014_0X41.cfg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define CTP_CFG_GROUP1 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x41,0x80,0x07,0xB0,0x04,0x0A,0x05,0x00,0x01,0x08,0x28,0x0F,0x50,0x32,0x03, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x8F,0x2F,0x99, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 0x2B,0x2D,0x31,0x0D,0x00,0x00,0x00,0x01,0x03,0x1D,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 0x00,0x00,0x00,0x00,0x00,0x00,0x23,0x55,0x94,0xC5,0x02,0x07,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 0x8C,0x26,0x00,0x7B,0x2D,0x00,0x6C,0x36,0x00,0x61,0x41,0x00,0x58,0x4E,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x05,0x06,0x07,0x08,0x09, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x14,0x15,0x16,0x17,0xFF,0xFF,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x13,0x12,0x11,0x10,0x0F,0x0D,0x0C, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 0x0A,0x08,0x07,0x06,0x04,0x02,0x00,0x19,0x1B,0x1C,0x1E,0x1F,0x20,0x21,0x22, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 0x23,0x24,0x25,0x26,0x27,0x28,0x29,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 0x00,0x00,0x00,0x00,0xB5,0x01 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) // TODO: define your config for Sensor_ID == 1 here, if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define CTP_CFG_GROUP2 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) // TODO: define your config for Sensor_ID == 2 here, if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define CTP_CFG_GROUP3 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) // TODO: define your config for Sensor_ID == 3 here, if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define CTP_CFG_GROUP4 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) // TODO: define your config for Sensor_ID == 4 here, if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define CTP_CFG_GROUP5 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) // TODO: define your config for Sensor_ID == 5 here, if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define CTP_CFG_GROUP6 {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) // STEP_2(REQUIRED): Customize your I/O ports & I/O operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define GTP_RST_PORT S5PV210_GPJ3(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define GTP_INT_PORT S5PV210_GPH1(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define GTP_INT_IRQ gpio_to_irq(GTP_INT_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define GTP_INT_CFG S3C_GPIO_SFN(0xF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define GTP_GPIO_AS_INPUT(pin) do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) gpio_direction_input(pin);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define GTP_GPIO_AS_INT(pin) do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) GTP_GPIO_AS_INPUT(pin);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) s3c_gpio_cfgpin(pin, GTP_INT_CFG);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define GTP_GPIO_GET_VALUE(pin) gpio_get_value(pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define GTP_GPIO_OUTPUT(pin,level) gpio_direction_output(pin,level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define GTP_GPIO_REQUEST(pin, label) gpio_request(pin, label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define GTP_GPIO_FREE(pin) gpio_free(pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define GTP_IRQ_TAB {IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) // STEP_3(optional): Specify your special config info if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #if GTP_CUSTOM_CFG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define GTP_MAX_HEIGHT 800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define GTP_MAX_WIDTH 480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define GTP_INT_TRIGGER 0 // 0: Rising 1: Falling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define GTP_MAX_HEIGHT 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define GTP_MAX_WIDTH 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define GTP_INT_TRIGGER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define GTP_MAX_TOUCH 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) // STEP_4(optional): If keys are available and reported as keys, config your key info here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #if GTP_HAVE_TOUCH_KEY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define GTP_KEY_TAB {KEY_MENU, KEY_HOME, KEY_BACK}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) //***************************PART3:OTHER define*********************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define GTP_DRIVER_VERSION "V2.2<2014/01/14>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define GTP_I2C_NAME "Goodix-TS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define GT91XX_CONFIG_PROC_FILE "gt9xx_config"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define GTP_POLL_TIME 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define GTP_ADDR_LENGTH 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define GTP_CONFIG_MIN_LENGTH 186
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define GTP_CONFIG_MAX_LENGTH 240
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define FAIL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define SUCCESS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define SWITCH_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define SWITCH_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) //******************** For GT9XXF Start **********************//
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define GTP_REG_BAK_REF 0x99D0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define GTP_REG_MAIN_CLK 0x8020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define GTP_REG_CHIP_TYPE 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define GTP_REG_HAVE_KEY 0x804E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define GTP_REG_MATRIX_DRVNUM 0x8069
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define GTP_REG_MATRIX_SENNUM 0x806A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define GTP_FL_FW_BURN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define GTP_FL_ESD_RECOVERY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define GTP_FL_READ_REPAIR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define GTP_BAK_REF_SEND 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define GTP_BAK_REF_STORE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define CFG_LOC_DRVA_NUM 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define CFG_LOC_DRVB_NUM 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define CFG_LOC_SENS_NUM 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define GTP_CHK_FW_MAX 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define GTP_CHK_FS_MNT_MAX 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define GTP_BAK_REF_PATH "/data/gtp_ref.bin"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define GTP_MAIN_CLK_PATH "/data/gtp_clk.bin"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define GTP_RQST_CONFIG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define GTP_RQST_BAK_REF 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define GTP_RQST_RESET 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define GTP_RQST_MAIN_CLOCK 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define GTP_RQST_RESPONDED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define GTP_RQST_IDLE 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) //******************** For GT9XXF End **********************//
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) // Registers define
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define GTP_READ_COOR_ADDR 0x814E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define GTP_REG_SLEEP 0x8040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define GTP_REG_SENSOR_ID 0x814A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define GTP_REG_CONFIG_DATA 0x8047
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define GTP_REG_VERSION 0x8140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define RESOLUTION_LOC 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define TRIGGER_LOC 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) // Log define
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define GTP_ERROR(fmt,arg...) printk("<<-GTP-ERROR->> "fmt"\n",##arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #if DEBUG_SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define GTP_INFO(fmt,arg...) printk("<<-GTP-INFO->> "fmt"\n",##arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define GTP_DEBUG(fmt,arg...) do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if(GTP_DEBUG_ON)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) printk("<<-GTP-DEBUG->> [%d]"fmt"\n",__LINE__, ##arg);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define GTP_DEBUG_ARRAY(array, num) do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) s32 i;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u8* a = array;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if(GTP_DEBUG_ARRAY_ON)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) printk("<<-GTP-DEBUG-ARRAY->>\n");\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) for (i = 0; i < (num); i++)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) printk("%02x ", (a)[i]);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) if ((i + 1 ) %10 == 0)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) printk("\n");\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) printk("\n");\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define GTP_DEBUG_FUNC() do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if(GTP_DEBUG_FUNC_ON)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) printk(" <<-GTP-FUNC->> Func:%s@Line:%d\n",__func__,__LINE__);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define GTP_INFO(fmt,arg...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define GTP_DEBUG(fmt,arg...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define GTP_DEBUG_ARRAY(array, num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define GTP_DEBUG_FUNC()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define GTP_SWAP(x, y) do{\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) typeof(x) z = x;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) x = y;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) y = z;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) //*****************************End of Part III********************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define TRUE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define FALSE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #endif /* _GOODIX_GT9XX_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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