^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012 Simon Budig, <simon.budig@kernelconcepts.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Daniel Wagener <daniel.wagener@kernelconcepts.de> (M09 firmware support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Lothar Waßmann <LW@KARO-electronics.de> (DT support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This is a driver for the EDT "Polytouch" family of touch controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * based on the FocalTech FT5x06 line of chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Development of this driver has been sponsored by Glyn:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * http://www.glyn.com/Products/Displays
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/input/mt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/input/touchscreen.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/ratelimit.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/regulator/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define WORK_REGISTER_THRESHOLD 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define WORK_REGISTER_REPORT_RATE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define WORK_REGISTER_GAIN 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define WORK_REGISTER_OFFSET 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define WORK_REGISTER_NUM_X 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define WORK_REGISTER_NUM_Y 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define PMOD_REGISTER_ACTIVE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PMOD_REGISTER_HIBERNATE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define M09_REGISTER_THRESHOLD 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define M09_REGISTER_GAIN 0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define M09_REGISTER_OFFSET 0x93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define M09_REGISTER_NUM_X 0x94
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define M09_REGISTER_NUM_Y 0x95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define EV_REGISTER_THRESHOLD 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define EV_REGISTER_GAIN 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define EV_REGISTER_OFFSET_Y 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define EV_REGISTER_OFFSET_X 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define NO_REGISTER 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define WORK_REGISTER_OPMODE 0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define FACTORY_REGISTER_OPMODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PMOD_REGISTER_OPMODE 0xa5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define TOUCH_EVENT_DOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define TOUCH_EVENT_UP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define TOUCH_EVENT_ON 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define TOUCH_EVENT_RESERVED 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define EDT_NAME_LEN 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define EDT_SWITCH_MODE_RETRIES 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define EDT_SWITCH_MODE_DELAY 5 /* msec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define EDT_RAW_DATA_RETRIES 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define EDT_RAW_DATA_DELAY 1000 /* usec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) enum edt_pmode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) EDT_PMODE_NOT_SUPPORTED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) EDT_PMODE_HIBERNATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) EDT_PMODE_POWEROFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) enum edt_ver {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) EDT_M06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) EDT_M09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) EDT_M12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) EV_FT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) GENERIC_FT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct edt_reg_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int reg_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int reg_report_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int reg_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) int reg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int reg_offset_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int reg_offset_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int reg_num_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int reg_num_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct edt_ft5x06_ts_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct touchscreen_properties prop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u16 num_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u16 num_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct regulator *vcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct gpio_desc *reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct gpio_desc *wake_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #if defined(CONFIG_DEBUG_FS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct dentry *debug_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 *raw_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) size_t raw_bufsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) bool factory_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) enum edt_pmode suspend_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int offset_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int offset_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int report_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int max_support_points;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) char name[EDT_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct edt_reg_addr reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) enum edt_ver version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct edt_i2c_chip_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int max_support_points;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int edt_ft5x06_ts_readwrite(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) u16 wr_len, u8 *wr_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u16 rd_len, u8 *rd_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct i2c_msg wrmsg[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (wr_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) wrmsg[i].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) wrmsg[i].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) wrmsg[i].len = wr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) wrmsg[i].buf = wr_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (rd_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) wrmsg[i].addr = client->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) wrmsg[i].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) wrmsg[i].len = rd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) wrmsg[i].buf = rd_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ret = i2c_transfer(client->adapter, wrmsg, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (ret != i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static bool edt_ft5x06_ts_check_crc(struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) u8 *buf, int buflen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) u8 crc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) for (i = 0; i < buflen - 1; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) crc ^= buf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (crc != buf[buflen-1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) dev_err_ratelimited(&tsdata->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) "crc error: 0x%02x expected, got 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) crc, buf[buflen-1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static irqreturn_t edt_ft5x06_ts_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct edt_ft5x06_ts_data *tsdata = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct device *dev = &tsdata->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u8 rdbuf[63];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int i, type, x, y, id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int offset, tplen, datalen, crclen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) cmd = 0xf9; /* tell the controller to send touch data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) offset = 5; /* where the actual touch data starts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) tplen = 4; /* data comes in so called frames */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) crclen = 1; /* length of the crc data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) cmd = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) offset = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) tplen = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) crclen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) memset(rdbuf, 0, sizeof(rdbuf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) datalen = tplen * tsdata->max_support_points + offset + crclen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) error = edt_ft5x06_ts_readwrite(tsdata->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) sizeof(cmd), &cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) datalen, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) dev_err_ratelimited(dev, "Unable to fetch data, error: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* M09/M12 does not send header or CRC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (tsdata->version == EDT_M06) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (rdbuf[0] != 0xaa || rdbuf[1] != 0xaa ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) rdbuf[2] != datalen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) dev_err_ratelimited(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) "Unexpected header: %02x%02x%02x!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) rdbuf[0], rdbuf[1], rdbuf[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (!edt_ft5x06_ts_check_crc(tsdata, rdbuf, datalen))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) for (i = 0; i < tsdata->max_support_points; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u8 *buf = &rdbuf[i * tplen + offset];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) type = buf[0] >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* ignore Reserved events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (type == TOUCH_EVENT_RESERVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* M06 sometimes sends bogus coordinates in TOUCH_DOWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (tsdata->version == EDT_M06 && type == TOUCH_EVENT_DOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) x = get_unaligned_be16(buf) & 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) y = get_unaligned_be16(buf + 2) & 0x0fff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* The FT5x26 send the y coordinate first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (tsdata->version == EV_FT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) swap(x, y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) id = (buf[2] >> 4) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) input_mt_slot(tsdata->input, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (input_mt_report_slot_state(tsdata->input, MT_TOOL_FINGER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) type != TOUCH_EVENT_UP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) touchscreen_report_pos(tsdata->input, &tsdata->prop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) x, y, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) input_mt_report_pointer_emulation(tsdata->input, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) input_sync(tsdata->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static int edt_ft5x06_register_write(struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 addr, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u8 wrbuf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) wrbuf[0] = tsdata->factory_mode ? 0xf3 : 0xfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) wrbuf[1] = tsdata->factory_mode ? addr & 0x7f : addr & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) wrbuf[2] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) wrbuf[3] = wrbuf[0] ^ wrbuf[1] ^ wrbuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return edt_ft5x06_ts_readwrite(tsdata->client, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) wrbuf, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) wrbuf[0] = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) wrbuf[1] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return edt_ft5x06_ts_readwrite(tsdata->client, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) wrbuf, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int edt_ft5x06_register_read(struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u8 wrbuf[2], rdbuf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) wrbuf[0] = tsdata->factory_mode ? 0xf3 : 0xfc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) wrbuf[1] = tsdata->factory_mode ? addr & 0x7f : addr & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) wrbuf[1] |= tsdata->factory_mode ? 0x80 : 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) error = edt_ft5x06_ts_readwrite(tsdata->client, 2, wrbuf, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if ((wrbuf[0] ^ wrbuf[1] ^ rdbuf[0]) != rdbuf[1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) dev_err(&tsdata->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "crc error: 0x%02x expected, got 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) wrbuf[0] ^ wrbuf[1] ^ rdbuf[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) rdbuf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) wrbuf[0] = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) error = edt_ft5x06_ts_readwrite(tsdata->client, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) wrbuf, 1, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return rdbuf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct edt_ft5x06_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct device_attribute dattr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) size_t field_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u8 limit_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u8 limit_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u8 addr_m06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u8 addr_m09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u8 addr_ev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define EDT_ATTR(_field, _mode, _addr_m06, _addr_m09, _addr_ev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) _limit_low, _limit_high) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct edt_ft5x06_attribute edt_ft5x06_attr_##_field = { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .dattr = __ATTR(_field, _mode, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) edt_ft5x06_setting_show, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) edt_ft5x06_setting_store), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .field_offset = offsetof(struct edt_ft5x06_ts_data, _field), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .addr_m06 = _addr_m06, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .addr_m09 = _addr_m09, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .addr_ev = _addr_ev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .limit_low = _limit_low, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .limit_high = _limit_high, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static ssize_t edt_ft5x06_setting_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) struct edt_ft5x06_attribute *attr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) container_of(dattr, struct edt_ft5x06_attribute, dattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u8 *field = (u8 *)tsdata + attr->field_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) size_t count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) mutex_lock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (tsdata->factory_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) error = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) addr = attr->addr_m06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) addr = attr->addr_m09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) addr = attr->addr_ev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (addr != NO_REGISTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) val = edt_ft5x06_register_read(tsdata, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) error = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) dev_err(&tsdata->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) "Failed to fetch attribute %s, error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) dattr->attr.name, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) val = *field;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) if (val != *field) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) dev_warn(&tsdata->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) "%s: read (%d) and stored value (%d) differ\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) dattr->attr.name, val, *field);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) *field = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) count = scnprintf(buf, PAGE_SIZE, "%d\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) mutex_unlock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return error ?: count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static ssize_t edt_ft5x06_setting_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct edt_ft5x06_attribute *attr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) container_of(dattr, struct edt_ft5x06_attribute, dattr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u8 *field = (u8 *)tsdata + attr->field_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) mutex_lock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (tsdata->factory_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) error = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) error = kstrtouint(buf, 0, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (val < attr->limit_low || val > attr->limit_high) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) error = -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) addr = attr->addr_m06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) addr = attr->addr_m09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) addr = attr->addr_ev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (addr != NO_REGISTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) error = edt_ft5x06_register_write(tsdata, addr, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) dev_err(&tsdata->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "Failed to update attribute %s, error: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) dattr->attr.name, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) *field = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) mutex_unlock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return error ?: count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /* m06, m09: range 0-31, m12: range 0-5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) static EDT_ATTR(gain, S_IWUSR | S_IRUGO, WORK_REGISTER_GAIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) M09_REGISTER_GAIN, EV_REGISTER_GAIN, 0, 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* m06, m09: range 0-31, m12: range 0-16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static EDT_ATTR(offset, S_IWUSR | S_IRUGO, WORK_REGISTER_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) M09_REGISTER_OFFSET, NO_REGISTER, 0, 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* m06, m09, m12: no supported, ev_ft: range 0-80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static EDT_ATTR(offset_x, S_IWUSR | S_IRUGO, NO_REGISTER, NO_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) EV_REGISTER_OFFSET_X, 0, 80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* m06, m09, m12: no supported, ev_ft: range 0-80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static EDT_ATTR(offset_y, S_IWUSR | S_IRUGO, NO_REGISTER, NO_REGISTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) EV_REGISTER_OFFSET_Y, 0, 80);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* m06: range 20 to 80, m09: range 0 to 30, m12: range 1 to 255... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static EDT_ATTR(threshold, S_IWUSR | S_IRUGO, WORK_REGISTER_THRESHOLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) M09_REGISTER_THRESHOLD, EV_REGISTER_THRESHOLD, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) /* m06: range 3 to 14, m12: (0x64: 100Hz) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) static EDT_ATTR(report_rate, S_IWUSR | S_IRUGO, WORK_REGISTER_REPORT_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) NO_REGISTER, NO_REGISTER, 0, 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static struct attribute *edt_ft5x06_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) &edt_ft5x06_attr_gain.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &edt_ft5x06_attr_offset.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) &edt_ft5x06_attr_offset_x.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &edt_ft5x06_attr_offset_y.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) &edt_ft5x06_attr_threshold.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &edt_ft5x06_attr_report_rate.dattr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static const struct attribute_group edt_ft5x06_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .attrs = edt_ft5x06_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static void edt_ft5x06_restore_reg_parameters(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) tsdata->threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) edt_ft5x06_register_write(tsdata, reg_addr->reg_gain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) tsdata->gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (reg_addr->reg_offset != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) edt_ft5x06_register_write(tsdata, reg_addr->reg_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) tsdata->offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (reg_addr->reg_offset_x != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) tsdata->offset_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (reg_addr->reg_offset_y != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) edt_ft5x06_register_write(tsdata, reg_addr->reg_offset_y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) tsdata->offset_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (reg_addr->reg_report_rate != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) edt_ft5x06_register_write(tsdata, reg_addr->reg_report_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) tsdata->report_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) static int edt_ft5x06_factory_mode(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct i2c_client *client = tsdata->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) int retries = EDT_SWITCH_MODE_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (tsdata->version != EDT_M06) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) "No factory mode support for non-M06 devices\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (!tsdata->raw_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) tsdata->raw_bufsize = tsdata->num_x * tsdata->num_y *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) sizeof(u16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) tsdata->raw_buffer = kzalloc(tsdata->raw_bufsize, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (!tsdata->raw_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /* mode register is 0x3c when in the work mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) error = edt_ft5x06_register_write(tsdata, WORK_REGISTER_OPMODE, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) "failed to switch to factory mode, error %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) tsdata->factory_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) mdelay(EDT_SWITCH_MODE_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) /* mode register is 0x01 when in factory mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ret = edt_ft5x06_register_read(tsdata, FACTORY_REGISTER_OPMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (ret == 0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) } while (--retries > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (retries == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) dev_err(&client->dev, "not in factory mode after %dms.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) EDT_SWITCH_MODE_RETRIES * EDT_SWITCH_MODE_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) error = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) kfree(tsdata->raw_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) tsdata->raw_buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) tsdata->factory_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static int edt_ft5x06_work_mode(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) struct i2c_client *client = tsdata->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) int retries = EDT_SWITCH_MODE_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* mode register is 0x01 when in the factory mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) error = edt_ft5x06_register_write(tsdata, FACTORY_REGISTER_OPMODE, 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) "failed to switch to work mode, error: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) tsdata->factory_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) mdelay(EDT_SWITCH_MODE_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) /* mode register is 0x01 when in factory mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) ret = edt_ft5x06_register_read(tsdata, WORK_REGISTER_OPMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (ret == 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) } while (--retries > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (retries == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) dev_err(&client->dev, "not in work mode after %dms.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) EDT_SWITCH_MODE_RETRIES * EDT_SWITCH_MODE_DELAY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) tsdata->factory_mode = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) kfree(tsdata->raw_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) tsdata->raw_buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) edt_ft5x06_restore_reg_parameters(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static int edt_ft5x06_debugfs_mode_get(void *data, u64 *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) struct edt_ft5x06_ts_data *tsdata = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) *mode = tsdata->factory_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static int edt_ft5x06_debugfs_mode_set(void *data, u64 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) struct edt_ft5x06_ts_data *tsdata = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (mode > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) mutex_lock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) if (mode != tsdata->factory_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) retval = mode ? edt_ft5x06_factory_mode(tsdata) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) edt_ft5x06_work_mode(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) mutex_unlock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) DEFINE_SIMPLE_ATTRIBUTE(debugfs_mode_fops, edt_ft5x06_debugfs_mode_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) edt_ft5x06_debugfs_mode_set, "%llu\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) static ssize_t edt_ft5x06_debugfs_raw_data_read(struct file *file,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) char __user *buf, size_t count, loff_t *off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) struct edt_ft5x06_ts_data *tsdata = file->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) struct i2c_client *client = tsdata->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) int retries = EDT_RAW_DATA_RETRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) int val, i, error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) size_t read = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) int colbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) char wrbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) u8 *rdbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (*off < 0 || *off >= tsdata->raw_bufsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) mutex_lock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (!tsdata->factory_mode || !tsdata->raw_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) error = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) error = edt_ft5x06_register_write(tsdata, 0x08, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) "failed to write 0x08 register, error %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) usleep_range(EDT_RAW_DATA_DELAY, EDT_RAW_DATA_DELAY + 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) val = edt_ft5x06_register_read(tsdata, 0x08);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (val < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) } while (--retries > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (val < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) error = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) "failed to read 0x08 register, error %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (retries == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) "timed out waiting for register to settle\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) error = -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) rdbuf = tsdata->raw_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) colbytes = tsdata->num_y * sizeof(u16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) wrbuf[0] = 0xf5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) wrbuf[1] = 0x0e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) for (i = 0; i < tsdata->num_x; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) wrbuf[2] = i; /* column index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) error = edt_ft5x06_ts_readwrite(tsdata->client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) sizeof(wrbuf), wrbuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) colbytes, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) rdbuf += colbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) read = min_t(size_t, count, tsdata->raw_bufsize - *off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (copy_to_user(buf, tsdata->raw_buffer + *off, read)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) error = -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) *off += read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) mutex_unlock(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) return error ?: read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static const struct file_operations debugfs_raw_data_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) .open = simple_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .read = edt_ft5x06_debugfs_raw_data_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static void edt_ft5x06_ts_prepare_debugfs(struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) const char *debugfs_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) tsdata->debug_dir = debugfs_create_dir(debugfs_name, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) debugfs_create_u16("num_x", S_IRUSR, tsdata->debug_dir, &tsdata->num_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) debugfs_create_u16("num_y", S_IRUSR, tsdata->debug_dir, &tsdata->num_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) debugfs_create_file("mode", S_IRUSR | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) tsdata->debug_dir, tsdata, &debugfs_mode_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) debugfs_create_file("raw_data", S_IRUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) tsdata->debug_dir, tsdata, &debugfs_raw_data_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void edt_ft5x06_ts_teardown_debugfs(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) debugfs_remove_recursive(tsdata->debug_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) kfree(tsdata->raw_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) static int edt_ft5x06_factory_mode(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) static void edt_ft5x06_ts_prepare_debugfs(struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) const char *debugfs_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static void edt_ft5x06_ts_teardown_debugfs(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) #endif /* CONFIG_DEBUGFS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static int edt_ft5x06_ts_identify(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct edt_ft5x06_ts_data *tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) char *fw_version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) u8 rdbuf[EDT_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) char *model_name = tsdata->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) /* see what we find if we assume it is a M06 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) * if we get less than EDT_NAME_LEN, we don't want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * to have garbage in there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) memset(rdbuf, 0, sizeof(rdbuf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) error = edt_ft5x06_ts_readwrite(client, 1, "\xBB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) EDT_NAME_LEN - 1, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) /* Probe content for something consistent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * M06 starts with a response byte, M12 gives the data directly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) * M09/Generic does not provide model number information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (!strncasecmp(rdbuf + 1, "EP0", 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) tsdata->version = EDT_M06;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) /* remove last '$' end marker */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) rdbuf[EDT_NAME_LEN - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (rdbuf[EDT_NAME_LEN - 2] == '$')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) rdbuf[EDT_NAME_LEN - 2] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) /* look for Model/Version separator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) p = strchr(rdbuf, '*');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) *p++ = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) strlcpy(model_name, rdbuf + 1, EDT_NAME_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) strlcpy(fw_version, p ? p : "", EDT_NAME_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) } else if (!strncasecmp(rdbuf, "EP0", 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) tsdata->version = EDT_M12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) /* remove last '$' end marker */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) rdbuf[EDT_NAME_LEN - 2] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if (rdbuf[EDT_NAME_LEN - 3] == '$')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) rdbuf[EDT_NAME_LEN - 3] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* look for Model/Version separator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) p = strchr(rdbuf, '*');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) *p++ = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) strlcpy(model_name, rdbuf, EDT_NAME_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) strlcpy(fw_version, p ? p : "", EDT_NAME_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /* If it is not an EDT M06/M12 touchscreen, then the model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * detection is a bit hairy. The different ft5x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * firmares around don't reliably implement the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * identification registers. Well, we'll take a shot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) * The main difference between generic focaltec based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) * touches and EDT M09 is that we know how to retrieve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) * the max coordinates for the latter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) tsdata->version = GENERIC_FT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) error = edt_ft5x06_ts_readwrite(client, 1, "\xA6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) 2, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) strlcpy(fw_version, rdbuf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) error = edt_ft5x06_ts_readwrite(client, 1, "\xA8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 1, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) /* This "model identification" is not exact. Unfortunately
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * not all firmwares for the ft5x06 put useful values in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) * the identification registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) switch (rdbuf[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) case 0x35: /* EDT EP0350M09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) case 0x43: /* EDT EP0430M09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) case 0x50: /* EDT EP0500M09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) case 0x57: /* EDT EP0570M09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) case 0x70: /* EDT EP0700M09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) tsdata->version = EDT_M09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) snprintf(model_name, EDT_NAME_LEN, "EP0%i%i0M09",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) rdbuf[0] >> 4, rdbuf[0] & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) case 0xa1: /* EDT EP1010ML00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) tsdata->version = EDT_M09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) snprintf(model_name, EDT_NAME_LEN, "EP%i%i0ML00",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) rdbuf[0] >> 4, rdbuf[0] & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) case 0x5a: /* Solomon Goldentek Display */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) snprintf(model_name, EDT_NAME_LEN, "GKTW50SCED1R0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) case 0x59: /* Evervision Display with FT5xx6 TS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) tsdata->version = EV_FT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) error = edt_ft5x06_ts_readwrite(client, 1, "\x53",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) 1, rdbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) strlcpy(fw_version, rdbuf, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) snprintf(model_name, EDT_NAME_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) "EVERVISION-FT5726NEi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) snprintf(model_name, EDT_NAME_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) "generic ft5x06 (%02x)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) rdbuf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) static void edt_ft5x06_ts_get_defaults(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) error = device_property_read_u32(dev, "threshold", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (!error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) edt_ft5x06_register_write(tsdata, reg_addr->reg_threshold, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) tsdata->threshold = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) error = device_property_read_u32(dev, "gain", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) if (!error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) edt_ft5x06_register_write(tsdata, reg_addr->reg_gain, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) tsdata->gain = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) error = device_property_read_u32(dev, "offset", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) if (!error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (reg_addr->reg_offset != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) edt_ft5x06_register_write(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) reg_addr->reg_offset, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) tsdata->offset = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) error = device_property_read_u32(dev, "offset-x", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) if (!error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (reg_addr->reg_offset_x != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) edt_ft5x06_register_write(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) reg_addr->reg_offset_x, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) tsdata->offset_x = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) error = device_property_read_u32(dev, "offset-y", &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) if (!error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) if (reg_addr->reg_offset_y != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) edt_ft5x06_register_write(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) reg_addr->reg_offset_y, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) tsdata->offset_y = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) edt_ft5x06_ts_get_parameters(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) tsdata->threshold = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) reg_addr->reg_threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) tsdata->gain = edt_ft5x06_register_read(tsdata, reg_addr->reg_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) if (reg_addr->reg_offset != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) tsdata->offset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) edt_ft5x06_register_read(tsdata, reg_addr->reg_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (reg_addr->reg_offset_x != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) tsdata->offset_x = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) reg_addr->reg_offset_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) if (reg_addr->reg_offset_y != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) tsdata->offset_y = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) reg_addr->reg_offset_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) if (reg_addr->reg_report_rate != NO_REGISTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) tsdata->report_rate = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) reg_addr->reg_report_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (tsdata->version == EDT_M06 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) tsdata->version == EDT_M09 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) tsdata->version == EDT_M12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) tsdata->num_x = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) reg_addr->reg_num_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) tsdata->num_y = edt_ft5x06_register_read(tsdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) reg_addr->reg_num_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) tsdata->num_x = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) tsdata->num_y = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) edt_ft5x06_ts_set_regs(struct edt_ft5x06_ts_data *tsdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct edt_reg_addr *reg_addr = &tsdata->reg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) switch (tsdata->version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) case EDT_M06:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) reg_addr->reg_threshold = WORK_REGISTER_THRESHOLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) reg_addr->reg_report_rate = WORK_REGISTER_REPORT_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) reg_addr->reg_gain = WORK_REGISTER_GAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) reg_addr->reg_offset = WORK_REGISTER_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) reg_addr->reg_offset_x = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) reg_addr->reg_offset_y = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) reg_addr->reg_num_x = WORK_REGISTER_NUM_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) reg_addr->reg_num_y = WORK_REGISTER_NUM_Y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) case EDT_M09:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) case EDT_M12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) reg_addr->reg_threshold = M09_REGISTER_THRESHOLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) reg_addr->reg_report_rate = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) reg_addr->reg_gain = M09_REGISTER_GAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) reg_addr->reg_offset = M09_REGISTER_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) reg_addr->reg_offset_x = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) reg_addr->reg_offset_y = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) reg_addr->reg_num_x = M09_REGISTER_NUM_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) reg_addr->reg_num_y = M09_REGISTER_NUM_Y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) case EV_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) reg_addr->reg_threshold = EV_REGISTER_THRESHOLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) reg_addr->reg_gain = EV_REGISTER_GAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) reg_addr->reg_offset = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) reg_addr->reg_offset_x = EV_REGISTER_OFFSET_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) reg_addr->reg_offset_y = EV_REGISTER_OFFSET_Y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) reg_addr->reg_num_x = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) reg_addr->reg_num_y = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) reg_addr->reg_report_rate = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) case GENERIC_FT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) /* this is a guesswork */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) reg_addr->reg_threshold = M09_REGISTER_THRESHOLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) reg_addr->reg_gain = M09_REGISTER_GAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) reg_addr->reg_offset = M09_REGISTER_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) reg_addr->reg_offset_x = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) reg_addr->reg_offset_y = NO_REGISTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) static void edt_ft5x06_disable_regulator(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) struct edt_ft5x06_ts_data *data = arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) regulator_disable(data->vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static int edt_ft5x06_ts_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) const struct edt_i2c_chip_data *chip_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) struct edt_ft5x06_ts_data *tsdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) u8 buf[2] = { 0xfc, 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) unsigned long irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) char fw_version[EDT_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) dev_dbg(&client->dev, "probing for EDT FT5x06 I2C\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) tsdata = devm_kzalloc(&client->dev, sizeof(*tsdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (!tsdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) dev_err(&client->dev, "failed to allocate driver data.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) chip_data = device_get_match_data(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (!chip_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) chip_data = (const struct edt_i2c_chip_data *)id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) if (!chip_data || !chip_data->max_support_points) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) dev_err(&client->dev, "invalid or missing chip data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) tsdata->max_support_points = chip_data->max_support_points;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) tsdata->vcc = devm_regulator_get(&client->dev, "vcc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) if (IS_ERR(tsdata->vcc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) error = PTR_ERR(tsdata->vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (error != -EPROBE_DEFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) "failed to request regulator: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) error = regulator_enable(tsdata->vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) if (error < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) dev_err(&client->dev, "failed to enable vcc: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) error = devm_add_action_or_reset(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) edt_ft5x06_disable_regulator,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) tsdata->reset_gpio = devm_gpiod_get_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) "reset", GPIOD_OUT_HIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) if (IS_ERR(tsdata->reset_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) error = PTR_ERR(tsdata->reset_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) "Failed to request GPIO reset pin, error %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) tsdata->wake_gpio = devm_gpiod_get_optional(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) "wake", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) if (IS_ERR(tsdata->wake_gpio)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) error = PTR_ERR(tsdata->wake_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) "Failed to request GPIO wake pin, error %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) * Check which sleep modes we can support. Power-off requieres the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) * reset-pin to ensure correct power-down/power-up behaviour. Start with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * the EDT_PMODE_POWEROFF test since this is the deepest possible sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) * mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (tsdata->reset_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) tsdata->suspend_mode = EDT_PMODE_POWEROFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) else if (tsdata->wake_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) tsdata->suspend_mode = EDT_PMODE_HIBERNATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) tsdata->suspend_mode = EDT_PMODE_NOT_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) if (tsdata->wake_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) usleep_range(5000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) gpiod_set_value_cansleep(tsdata->wake_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) if (tsdata->reset_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) usleep_range(5000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) gpiod_set_value_cansleep(tsdata->reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) msleep(300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) input = devm_input_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) if (!input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) dev_err(&client->dev, "failed to allocate input device.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) mutex_init(&tsdata->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) tsdata->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) tsdata->input = input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) tsdata->factory_mode = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) error = edt_ft5x06_ts_identify(client, tsdata, fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) dev_err(&client->dev, "touchscreen probe failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) * Dummy read access. EP0700MLP1 returns bogus data on the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) * register read access and ignores writes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) edt_ft5x06_ts_readwrite(tsdata->client, 2, buf, 2, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) edt_ft5x06_ts_set_regs(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) edt_ft5x06_ts_get_defaults(&client->dev, tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) edt_ft5x06_ts_get_parameters(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) "Model \"%s\", Rev. \"%s\", %dx%d sensors\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) tsdata->name, fw_version, tsdata->num_x, tsdata->num_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) input->name = tsdata->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) input->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) input->dev.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (tsdata->version == EDT_M06 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) tsdata->version == EDT_M09 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) tsdata->version == EDT_M12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) input_set_abs_params(input, ABS_MT_POSITION_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) 0, tsdata->num_x * 64 - 1, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) input_set_abs_params(input, ABS_MT_POSITION_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) 0, tsdata->num_y * 64 - 1, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) /* Unknown maximum values. Specify via devicetree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) input_set_abs_params(input, ABS_MT_POSITION_X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) 0, 65535, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) input_set_abs_params(input, ABS_MT_POSITION_Y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) 0, 65535, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) touchscreen_parse_properties(input, true, &tsdata->prop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) error = input_mt_init_slots(input, tsdata->max_support_points,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) INPUT_MT_DIRECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) dev_err(&client->dev, "Unable to init MT slots.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) i2c_set_clientdata(client, tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) irq_flags = irq_get_trigger_type(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) if (irq_flags == IRQF_TRIGGER_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) irq_flags = IRQF_TRIGGER_FALLING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) irq_flags |= IRQF_ONESHOT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) error = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) NULL, edt_ft5x06_ts_isr, irq_flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) client->name, tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) dev_err(&client->dev, "Unable to request touchscreen IRQ.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) error = devm_device_add_group(&client->dev, &edt_ft5x06_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) error = input_register_device(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) edt_ft5x06_ts_prepare_debugfs(tsdata, dev_driver_string(&client->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) dev_dbg(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) "EDT FT5x06 initialized: IRQ %d, WAKE pin %d, Reset pin %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) tsdata->wake_gpio ? desc_to_gpio(tsdata->wake_gpio) : -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) tsdata->reset_gpio ? desc_to_gpio(tsdata->reset_gpio) : -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) static int edt_ft5x06_ts_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) edt_ft5x06_ts_teardown_debugfs(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) static int __maybe_unused edt_ft5x06_ts_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) struct gpio_desc *reset_gpio = tsdata->reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) if (tsdata->suspend_mode == EDT_PMODE_NOT_SUPPORTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) /* Enter hibernate mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) ret = edt_ft5x06_register_write(tsdata, PMOD_REGISTER_OPMODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) PMOD_REGISTER_HIBERNATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) dev_warn(dev, "Failed to set hibernate mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) if (tsdata->suspend_mode == EDT_PMODE_HIBERNATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) * Power-off according the datasheet. Cut the power may leaf the irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) * line in an undefined state depending on the host pull resistor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) * settings. Disable the irq to avoid adjusting each host till the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) * device is back in a full functional state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) disable_irq(tsdata->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) gpiod_set_value_cansleep(reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) ret = regulator_disable(tsdata->vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) dev_warn(dev, "Failed to disable vcc\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) static int __maybe_unused edt_ft5x06_ts_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) struct edt_ft5x06_ts_data *tsdata = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) if (tsdata->suspend_mode == EDT_PMODE_NOT_SUPPORTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (tsdata->suspend_mode == EDT_PMODE_POWEROFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) struct gpio_desc *reset_gpio = tsdata->reset_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) * We can't check if the regulator is a dummy or a real
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) * regulator. So we need to specify the 5ms reset time (T_rst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) * here instead of the 100us T_rtp time. We also need to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) * 300ms in case it was a real supply and the power was cutted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) * of. Toggle the reset pin is also a way to exit the hibernate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) * mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) gpiod_set_value_cansleep(reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) usleep_range(5000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) ret = regulator_enable(tsdata->vcc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) dev_err(dev, "Failed to enable vcc\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) usleep_range(1000, 2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) gpiod_set_value_cansleep(reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) msleep(300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) edt_ft5x06_restore_reg_parameters(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) enable_irq(tsdata->client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (tsdata->factory_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) ret = edt_ft5x06_factory_mode(tsdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) struct gpio_desc *wake_gpio = tsdata->wake_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) gpiod_set_value_cansleep(wake_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) usleep_range(5000, 6000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) gpiod_set_value_cansleep(wake_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) static SIMPLE_DEV_PM_OPS(edt_ft5x06_ts_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) edt_ft5x06_ts_suspend, edt_ft5x06_ts_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) static const struct edt_i2c_chip_data edt_ft5x06_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) .max_support_points = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) static const struct edt_i2c_chip_data edt_ft5506_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) .max_support_points = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static const struct edt_i2c_chip_data edt_ft6236_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) .max_support_points = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) static const struct i2c_device_id edt_ft5x06_ts_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) { .name = "edt-ft5x06", .driver_data = (long)&edt_ft5x06_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) { .name = "edt-ft5506", .driver_data = (long)&edt_ft5506_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) { .name = "ev-ft5726", .driver_data = (long)&edt_ft5506_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) /* Note no edt- prefix for compatibility with the ft6236.c driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) { .name = "ft6236", .driver_data = (long)&edt_ft6236_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) MODULE_DEVICE_TABLE(i2c, edt_ft5x06_ts_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) static const struct of_device_id edt_ft5x06_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) { .compatible = "edt,edt-ft5206", .data = &edt_ft5x06_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) { .compatible = "edt,edt-ft5306", .data = &edt_ft5x06_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) { .compatible = "edt,edt-ft5406", .data = &edt_ft5x06_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) { .compatible = "edt,edt-ft5506", .data = &edt_ft5506_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) { .compatible = "evervision,ev-ft5726", .data = &edt_ft5506_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) /* Note focaltech vendor prefix for compatibility with ft6236.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) { .compatible = "focaltech,ft6236", .data = &edt_ft6236_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) MODULE_DEVICE_TABLE(of, edt_ft5x06_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) static struct i2c_driver edt_ft5x06_ts_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) .name = "edt_ft5x06",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) .of_match_table = edt_ft5x06_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) .pm = &edt_ft5x06_ts_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) .probe_type = PROBE_PREFER_ASYNCHRONOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) .id_table = edt_ft5x06_ts_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) .probe = edt_ft5x06_ts_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) .remove = edt_ft5x06_ts_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) module_i2c_driver(edt_ft5x06_ts_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) MODULE_AUTHOR("Simon Budig <simon.budig@kernelconcepts.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) MODULE_DESCRIPTION("EDT FT5x06 I2C Touchscreen Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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