Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * GPIO based serio bus driver for bit banging the PS/2 protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Author: Danilo Krummrich <danilokrummrich@dk-develop.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/serio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/preempt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define DRIVER_NAME		"ps2-gpio"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define PS2_MODE_RX		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define PS2_MODE_TX		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define PS2_START_BIT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define PS2_DATA_BIT0		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define PS2_DATA_BIT1		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define PS2_DATA_BIT2		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define PS2_DATA_BIT3		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define PS2_DATA_BIT4		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define PS2_DATA_BIT5		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define PS2_DATA_BIT6		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define PS2_DATA_BIT7		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define PS2_PARITY_BIT		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define PS2_STOP_BIT		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define PS2_TX_TIMEOUT		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define PS2_ACK_BIT		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define PS2_DEV_RET_ACK		0xfa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define PS2_DEV_RET_NACK	0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define PS2_CMD_RESEND		0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) struct ps2_gpio_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct serio *serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	unsigned char mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	struct gpio_desc *gpio_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct gpio_desc *gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	bool write_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	unsigned char rx_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned char rx_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned char tx_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	unsigned char tx_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct completion tx_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct mutex tx_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct delayed_work tx_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static int ps2_gpio_open(struct serio *serio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	struct ps2_gpio_data *drvdata = serio->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	enable_irq(drvdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static void ps2_gpio_close(struct serio *serio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct ps2_gpio_data *drvdata = serio->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	flush_delayed_work(&drvdata->tx_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	disable_irq(drvdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) static int __ps2_gpio_write(struct serio *serio, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	struct ps2_gpio_data *drvdata = serio->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	disable_irq_nosync(drvdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	gpiod_direction_output(drvdata->gpio_clk, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	drvdata->mode = PS2_MODE_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	drvdata->tx_byte = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	schedule_delayed_work(&drvdata->tx_work, usecs_to_jiffies(200));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static int ps2_gpio_write(struct serio *serio, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	struct ps2_gpio_data *drvdata = serio->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (in_task()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		mutex_lock(&drvdata->tx_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		__ps2_gpio_write(serio, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		if (!wait_for_completion_timeout(&drvdata->tx_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 						 msecs_to_jiffies(10000)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			ret = SERIO_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		mutex_unlock(&drvdata->tx_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		__ps2_gpio_write(serio, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void ps2_gpio_tx_work_fn(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	struct delayed_work *dwork = to_delayed_work(work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct ps2_gpio_data *drvdata = container_of(dwork,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 						    struct ps2_gpio_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 						    tx_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	enable_irq(drvdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	gpiod_direction_output(drvdata->gpio_data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	gpiod_direction_input(drvdata->gpio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static irqreturn_t ps2_gpio_irq_rx(struct ps2_gpio_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	unsigned char byte, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	int rxflags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	static unsigned long old_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	byte = drvdata->rx_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	cnt = drvdata->rx_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (old_jiffies == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		old_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if ((jiffies - old_jiffies) > usecs_to_jiffies(100)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		dev_err(drvdata->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			"RX: timeout, probably we missed an interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	old_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	data = gpiod_get_value(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (unlikely(data < 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		dev_err(drvdata->dev, "RX: failed to get data gpio val: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 			data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	switch (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	case PS2_START_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		/* start bit should be low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		if (unlikely(data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			dev_err(drvdata->dev, "RX: start bit should be low\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	case PS2_DATA_BIT0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	case PS2_DATA_BIT1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	case PS2_DATA_BIT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	case PS2_DATA_BIT3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	case PS2_DATA_BIT4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	case PS2_DATA_BIT5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	case PS2_DATA_BIT6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	case PS2_DATA_BIT7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		/* processing data bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		if (data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 			byte |= (data << (cnt - 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	case PS2_PARITY_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		/* check odd parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		if (!((hweight8(byte) & 1) ^ data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			rxflags |= SERIO_PARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 			dev_warn(drvdata->dev, "RX: parity error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 			if (!drvdata->write_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		/* Do not send spurious ACK's and NACK's when write fn is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		 * not provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		if (!drvdata->write_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			if (byte == PS2_DEV_RET_NACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			else if (byte == PS2_DEV_RET_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		/* Let's send the data without waiting for the stop bit to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		 * sent. It may happen that we miss the stop bit. When this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		 * happens we have no way to recover from this, certainly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		 * missing the parity bit would be recognized when processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		 * the stop bit. When missing both, data is lost.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		serio_interrupt(drvdata->serio, byte, rxflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		dev_dbg(drvdata->dev, "RX: sending byte 0x%x\n", byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	case PS2_STOP_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		/* stop bit should be high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		if (unlikely(!data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			dev_err(drvdata->dev, "RX: stop bit should be high\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		cnt = byte = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		old_jiffies = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		goto end; /* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		dev_err(drvdata->dev, "RX: got out of sync with the device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	goto end; /* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	cnt = byte = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	old_jiffies = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	__ps2_gpio_write(drvdata->serio, PS2_CMD_RESEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	drvdata->rx_cnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	drvdata->rx_byte = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static irqreturn_t ps2_gpio_irq_tx(struct ps2_gpio_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	unsigned char byte, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	static unsigned long old_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	cnt = drvdata->tx_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	byte = drvdata->tx_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	if (old_jiffies == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		old_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	if ((jiffies - old_jiffies) > usecs_to_jiffies(100)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		dev_err(drvdata->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			"TX: timeout, probably we missed an interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	old_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	switch (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	case PS2_START_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		/* should never happen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		dev_err(drvdata->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			"TX: start bit should have been sent already\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	case PS2_DATA_BIT0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	case PS2_DATA_BIT1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	case PS2_DATA_BIT2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	case PS2_DATA_BIT3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	case PS2_DATA_BIT4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	case PS2_DATA_BIT5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	case PS2_DATA_BIT6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	case PS2_DATA_BIT7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		data = byte & BIT(cnt - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		gpiod_set_value(drvdata->gpio_data, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case PS2_PARITY_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		/* do odd parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		data = !(hweight8(byte) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		gpiod_set_value(drvdata->gpio_data, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	case PS2_STOP_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		/* release data line to generate stop bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		gpiod_direction_input(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	case PS2_TX_TIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		/* Devices generate one extra clock pulse before sending the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		 * acknowledgment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	case PS2_ACK_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		gpiod_direction_input(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		data = gpiod_get_value(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		if (data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 			dev_warn(drvdata->dev, "TX: received NACK, retry\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		drvdata->mode = PS2_MODE_RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		complete(&drvdata->tx_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		old_jiffies = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 		goto end; /* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		/* Probably we missed the stop bit. Therefore we release data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		 * line and try again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		gpiod_direction_input(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		dev_err(drvdata->dev, "TX: got out of sync with the device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	goto end; /* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	old_jiffies = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	gpiod_direction_input(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	__ps2_gpio_write(drvdata->serio, drvdata->tx_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	drvdata->tx_cnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static irqreturn_t ps2_gpio_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	struct ps2_gpio_data *drvdata = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	return drvdata->mode ? ps2_gpio_irq_tx(drvdata) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		ps2_gpio_irq_rx(drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int ps2_gpio_get_props(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 				 struct ps2_gpio_data *drvdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	drvdata->gpio_data = devm_gpiod_get(dev, "data", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	if (IS_ERR(drvdata->gpio_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		dev_err(dev, "failed to request data gpio: %ld",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			PTR_ERR(drvdata->gpio_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		return PTR_ERR(drvdata->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	drvdata->gpio_clk = devm_gpiod_get(dev, "clk", GPIOD_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (IS_ERR(drvdata->gpio_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		dev_err(dev, "failed to request clock gpio: %ld",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 			PTR_ERR(drvdata->gpio_clk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		return PTR_ERR(drvdata->gpio_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	drvdata->write_enable = device_property_read_bool(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 				"write-enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int ps2_gpio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	struct ps2_gpio_data *drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	struct serio *serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	drvdata = devm_kzalloc(dev, sizeof(struct ps2_gpio_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (!drvdata || !serio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		goto err_free_serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	error = ps2_gpio_get_props(dev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		goto err_free_serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	if (gpiod_cansleep(drvdata->gpio_data) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	    gpiod_cansleep(drvdata->gpio_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		dev_err(dev, "GPIO data or clk are connected via slow bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 		error = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		goto err_free_serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	drvdata->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	if (drvdata->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 		error = drvdata->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		goto err_free_serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	error = devm_request_irq(dev, drvdata->irq, ps2_gpio_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 				 IRQF_NO_THREAD, DRIVER_NAME, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		dev_err(dev, "failed to request irq %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			drvdata->irq, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		goto err_free_serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	/* Keep irq disabled until serio->open is called. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	disable_irq(drvdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	serio->id.type = SERIO_8042;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	serio->open = ps2_gpio_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	serio->close = ps2_gpio_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	/* Write can be enabled in platform/dt data, but possibly it will not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	 * work because of the tough timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	serio->write = drvdata->write_enable ? ps2_gpio_write : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	serio->port_data = drvdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	serio->dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	strlcpy(serio->name, dev_name(dev), sizeof(serio->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	strlcpy(serio->phys, dev_name(dev), sizeof(serio->phys));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	drvdata->serio = serio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	drvdata->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	drvdata->mode = PS2_MODE_RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	/* Tx count always starts at 1, as the start bit is sent implicitly by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	 * host-to-device communication initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	drvdata->tx_cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	INIT_DELAYED_WORK(&drvdata->tx_work, ps2_gpio_tx_work_fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	init_completion(&drvdata->tx_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	mutex_init(&drvdata->tx_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	serio_register_port(serio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	platform_set_drvdata(pdev, drvdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	return 0;	/* success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) err_free_serio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	kfree(serio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int ps2_gpio_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	struct ps2_gpio_data *drvdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	serio_unregister_port(drvdata->serio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #if defined(CONFIG_OF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static const struct of_device_id ps2_gpio_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	{ .compatible = "ps2-gpio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) MODULE_DEVICE_TABLE(of, ps2_gpio_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static struct platform_driver ps2_gpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	.probe		= ps2_gpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	.remove		= ps2_gpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		.name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		.of_match_table = of_match_ptr(ps2_gpio_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) module_platform_driver(ps2_gpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MODULE_AUTHOR("Danilo Krummrich <danilokrummrich@dk-develop.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) MODULE_DESCRIPTION("GPIO PS2 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) MODULE_LICENSE("GPL v2");