Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * SGI IOC3 PS/2 controller driver for linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2019 Thomas Bogendoerfer <tbogendoerfer@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Based on code Copyright (C) 2005 Stanislaw Skowronek <skylark@unaligned.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *               Copyright (C) 2009 Johannes Dickgreber <tanzy@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/serio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/sn/ioc3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) struct ioc3kbd_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	struct ioc3_serioregs __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	struct serio *kbd, *aux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	bool kbd_exists, aux_exists;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static int ioc3kbd_wait(struct ioc3_serioregs __iomem *regs, u32 mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	unsigned long timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	while ((readl(&regs->km_csr) & mask) && (timeout < 250)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		timeout++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	return (timeout >= 250) ? -ETIMEDOUT : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) static int ioc3kbd_write(struct serio *dev, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	ret = ioc3kbd_wait(d->regs, KM_CSR_K_WRT_PEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	writel(val, &d->regs->k_wd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static int ioc3kbd_start(struct serio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	d->kbd_exists = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static void ioc3kbd_stop(struct serio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	d->kbd_exists = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) static int ioc3aux_write(struct serio *dev, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	ret = ioc3kbd_wait(d->regs, KM_CSR_M_WRT_PEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	writel(val, &d->regs->m_wd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int ioc3aux_start(struct serio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	d->aux_exists = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static void ioc3aux_stop(struct serio *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	struct ioc3kbd_data *d = dev->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	d->aux_exists = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static void ioc3kbd_process_data(struct serio *dev, u32 data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	if (data & KM_RD_VALID_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		serio_interrupt(dev, (data >> KM_RD_DATA_0_SHIFT) & 0xff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	if (data & KM_RD_VALID_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		serio_interrupt(dev, (data >> KM_RD_DATA_1_SHIFT) & 0xff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	if (data & KM_RD_VALID_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		serio_interrupt(dev, (data >> KM_RD_DATA_2_SHIFT) & 0xff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static irqreturn_t ioc3kbd_intr(int itq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	struct ioc3kbd_data *d = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	u32 data_k, data_m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	data_k = readl(&d->regs->k_rd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (d->kbd_exists)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		ioc3kbd_process_data(d->kbd, data_k);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	data_m = readl(&d->regs->m_rd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	if (d->aux_exists)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		ioc3kbd_process_data(d->aux, data_m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int ioc3kbd_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct ioc3_serioregs __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct ioc3kbd_data *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct serio *sk, *sa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	int irq, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	regs = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (IS_ERR(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return PTR_ERR(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (!d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	sk = kzalloc(sizeof(*sk), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (!sk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	sa = kzalloc(sizeof(*sa), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (!sa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		kfree(sk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	sk->id.type = SERIO_8042;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	sk->write = ioc3kbd_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	sk->start = ioc3kbd_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	sk->stop = ioc3kbd_stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	snprintf(sk->name, sizeof(sk->name), "IOC3 keyboard %d", pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	snprintf(sk->phys, sizeof(sk->phys), "ioc3/serio%dkbd", pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	sk->port_data = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	sk->dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	sa->id.type = SERIO_8042;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	sa->write = ioc3aux_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	sa->start = ioc3aux_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	sa->stop = ioc3aux_stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	snprintf(sa->name, sizeof(sa->name), "IOC3 auxiliary %d", pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	snprintf(sa->phys, sizeof(sa->phys), "ioc3/serio%daux", pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	sa->port_data = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	sa->dev.parent = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	d->regs = regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	d->kbd = sk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	d->aux = sa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	d->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	platform_set_drvdata(pdev, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	serio_register_port(d->kbd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	serio_register_port(d->aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	ret = request_irq(irq, ioc3kbd_intr, IRQF_SHARED, "ioc3-kbd", d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		dev_err(dev, "could not request IRQ %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		serio_unregister_port(d->kbd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		serio_unregister_port(d->aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	/* enable ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	writel(KM_CSR_K_CLAMP_3 | KM_CSR_M_CLAMP_3, &regs->km_csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int ioc3kbd_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct ioc3kbd_data *d = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	free_irq(d->irq, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	serio_unregister_port(d->kbd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	serio_unregister_port(d->aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static struct platform_driver ioc3kbd_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.probe          = ioc3kbd_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.remove         = ioc3kbd_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		.name = "ioc3-kbd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) module_platform_driver(ioc3kbd_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) MODULE_AUTHOR("Thomas Bogendoerfer <tbogendoerfer@suse.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) MODULE_DESCRIPTION("SGI IOC3 serio driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) MODULE_LICENSE("GPL");