Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _I8042_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _I8042_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  Copyright (c) 1999-2002 Vojtech Pavlik
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Arch-dependent inline functions and defines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #if defined(CONFIG_MACH_JAZZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "i8042-jazzio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #elif defined(CONFIG_SGI_HAS_I8042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "i8042-ip22io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #elif defined(CONFIG_SNI_RM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "i8042-snirm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #elif defined(CONFIG_SPARC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "i8042-sparcio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #elif defined(CONFIG_X86) || defined(CONFIG_IA64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "i8042-x86ia64io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "i8042-io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * This is in 50us units, the time we wait for the i8042 to react. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * has to be long enough for the i8042 itself to timeout on sending a byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * to a non-existent mouse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define I8042_CTL_TIMEOUT	10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  * Return codes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define I8042_RET_CTL_TEST	0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)  * Expected maximum internal i8042 buffer size. This is used for flushing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)  * the i8042 buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define I8042_BUFFER_SIZE	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)  * Number of AUX ports on controllers supporting active multiplexing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)  * specification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define I8042_NUM_MUX_PORTS	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)  * Debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static unsigned long i8042_start_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define dbg_init() do { i8042_start_time = jiffies; } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define dbg(format, arg...)							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	do {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		if (i8042_debug)						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 			printk(KERN_DEBUG KBUILD_MODNAME ": [%d] " format,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 			       (int) (jiffies - i8042_start_time), ##arg);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define filter_dbg(filter, data, format, args...)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	do {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		if (!i8042_debug)				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 			break;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		if (!filter || i8042_unmask_kbd_data)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 			dbg("%02x " format, data, ##args);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 		else						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 			dbg("** " format, ##args);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define dbg_init() do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define dbg(format, arg...)							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	do {									\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 		if (0)								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 			printk(KERN_DEBUG pr_fmt(format), ##arg);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define filter_dbg(filter, data, format, args...) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif /* _I8042_H */