Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _I8042_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _I8042_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define I8042_KBD_PHYS_DESC "isa0060/serio0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define I8042_AUX_PHYS_DESC "isa0060/serio1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define I8042_MUX_PHYS_DESC "isa0060/serio%d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifdef __alpha__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) # define I8042_KBD_IRQ	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) # define I8042_AUX_IRQ	(RTC_PORT(0) == 0x170 ? 9 : 12)	/* Jensen is special */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #elif defined(__arm__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* defined in include/asm-arm/arch-xxx/irqs.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #elif defined(CONFIG_PPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) extern int of_i8042_kbd_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) extern int of_i8042_aux_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) # define I8042_KBD_IRQ  of_i8042_kbd_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) # define I8042_AUX_IRQ  of_i8042_aux_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) # define I8042_KBD_IRQ	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) # define I8042_AUX_IRQ	12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * Register numbers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define I8042_COMMAND_REG	0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define I8042_STATUS_REG	0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define I8042_DATA_REG		0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static inline int i8042_read_data(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	return inb(I8042_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static inline int i8042_read_status(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	return inb(I8042_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static inline void i8042_write_data(int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	outb(val, I8042_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static inline void i8042_write_command(int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	outb(val, I8042_COMMAND_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static inline int i8042_platform_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)  * On some platforms touching the i8042 data register region can do really
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)  * bad things. Because of this the region is always reserved on such boxes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #if defined(CONFIG_PPC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	if (check_legacy_ioport(I8042_DATA_REG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #if !defined(__sh__) && !defined(__alpha__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	if (!request_region(I8042_DATA_REG, 16, "i8042"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	i8042_reset = I8042_RESET_ALWAYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static inline void i8042_platform_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #if !defined(__sh__) && !defined(__alpha__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 	release_region(I8042_DATA_REG, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif /* _I8042_IO_H */