Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Driver is originally developed by Pavel Sokolov <psokolov@synopsys.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/serio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define ARC_PS2_PORTS                   2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define ARC_ARC_PS2_ID                  0x0001f609
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define STAT_TIMEOUT                    128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define PS2_STAT_RX_FRM_ERR             (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define PS2_STAT_RX_BUF_OVER            (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define PS2_STAT_RX_INT_EN              (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define PS2_STAT_RX_VAL                 (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define PS2_STAT_TX_ISNOT_FUL           (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define PS2_STAT_TX_INT_EN              (1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) struct arc_ps2_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	void __iomem *data_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	void __iomem *status_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct serio *io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) struct arc_ps2_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	struct arc_ps2_port port[ARC_PS2_PORTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	unsigned int frame_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	unsigned int buf_overflow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	unsigned int total_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static void arc_ps2_check_rx(struct arc_ps2_data *arc_ps2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			     struct arc_ps2_port *port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned int timeout = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	unsigned int flag, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	unsigned char data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		status = ioread32(port->status_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		if (!(status & PS2_STAT_RX_VAL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		data = ioread32(port->data_addr) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		arc_ps2->total_int++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		if (status & PS2_STAT_RX_FRM_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			arc_ps2->frame_error++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			flag |= SERIO_PARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		} else if (status & PS2_STAT_RX_BUF_OVER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			arc_ps2->buf_overflow++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 			flag |= SERIO_FRAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		serio_interrupt(port->io, data, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	} while (--timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	dev_err(&port->io->dev, "PS/2 hardware stuck\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static irqreturn_t arc_ps2_interrupt(int irq, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct arc_ps2_data *arc_ps2 = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	for (i = 0; i < ARC_PS2_PORTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		arc_ps2_check_rx(arc_ps2, &arc_ps2->port[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static int arc_ps2_write(struct serio *io, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	unsigned status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct arc_ps2_port *port = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	int timeout = STAT_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		status = ioread32(port->status_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		if (status & PS2_STAT_TX_ISNOT_FUL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			iowrite32(val & 0xff, port->data_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	} while (--timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	dev_err(&io->dev, "write timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int arc_ps2_open(struct serio *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct arc_ps2_port *port = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	iowrite32(PS2_STAT_RX_INT_EN, port->status_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void arc_ps2_close(struct serio *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	struct arc_ps2_port *port = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	iowrite32(ioread32(port->status_addr) & ~PS2_STAT_RX_INT_EN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		  port->status_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static void __iomem *arc_ps2_calc_addr(struct arc_ps2_data *arc_ps2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 						  int index, bool status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	addr = arc_ps2->addr + 4 + 4 * index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		addr += ARC_PS2_PORTS * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void arc_ps2_inhibit_ports(struct arc_ps2_data *arc_ps2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	for (i = 0; i < ARC_PS2_PORTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		addr = arc_ps2_calc_addr(arc_ps2, i, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		val = ioread32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		val &= ~(PS2_STAT_RX_INT_EN | PS2_STAT_TX_INT_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		iowrite32(val, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int arc_ps2_create_port(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 					 struct arc_ps2_data *arc_ps2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 					 int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct arc_ps2_port *port = &arc_ps2->port[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	struct serio *io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	io = kzalloc(sizeof(struct serio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (!io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	io->id.type = SERIO_8042;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	io->write = arc_ps2_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	io->open = arc_ps2_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	io->close = arc_ps2_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	snprintf(io->name, sizeof(io->name), "ARC PS/2 port%d", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	snprintf(io->phys, sizeof(io->phys), "arc/serio%d", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	io->port_data = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	port->io = io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	port->data_addr = arc_ps2_calc_addr(arc_ps2, index, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	port->status_addr = arc_ps2_calc_addr(arc_ps2, index, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	dev_dbg(&pdev->dev, "port%d is allocated (data = 0x%p, status = 0x%p)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		index, port->data_addr, port->status_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	serio_register_port(port->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int arc_ps2_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct arc_ps2_data *arc_ps2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int error, id, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	irq = platform_get_irq_byname(pdev, "arc_ps2_irq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	arc_ps2 = devm_kzalloc(&pdev->dev, sizeof(struct arc_ps2_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	if (!arc_ps2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		dev_err(&pdev->dev, "out of memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	arc_ps2->addr = devm_ioremap_resource(&pdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (IS_ERR(arc_ps2->addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		return PTR_ERR(arc_ps2->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	dev_info(&pdev->dev, "irq = %d, address = 0x%p, ports = %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		 irq, arc_ps2->addr, ARC_PS2_PORTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	id = ioread32(arc_ps2->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if (id != ARC_ARC_PS2_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		dev_err(&pdev->dev, "device id does not match\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	arc_ps2_inhibit_ports(arc_ps2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	error = devm_request_irq(&pdev->dev, irq, arc_ps2_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 				 0, "arc_ps2", arc_ps2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		dev_err(&pdev->dev, "Could not allocate IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	for (i = 0; i < ARC_PS2_PORTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		error = arc_ps2_create_port(pdev, arc_ps2, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			while (--i >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 				serio_unregister_port(arc_ps2->port[i].io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	platform_set_drvdata(pdev, arc_ps2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int arc_ps2_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	struct arc_ps2_data *arc_ps2 = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	for (i = 0; i < ARC_PS2_PORTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		serio_unregister_port(arc_ps2->port[i].io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	dev_dbg(&pdev->dev, "interrupt count = %i\n", arc_ps2->total_int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	dev_dbg(&pdev->dev, "frame error count = %i\n", arc_ps2->frame_error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	dev_dbg(&pdev->dev, "buffer overflow count = %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		arc_ps2->buf_overflow);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #ifdef CONFIG_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const struct of_device_id arc_ps2_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	{ .compatible = "snps,arc_ps2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) MODULE_DEVICE_TABLE(of, arc_ps2_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static struct platform_driver arc_ps2_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	.driver	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		.name		= "arc_ps2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		.of_match_table	= of_match_ptr(arc_ps2_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	.probe	= arc_ps2_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	.remove	= arc_ps2_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) module_platform_driver(arc_ps2_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) MODULE_AUTHOR("Pavel Sokolov <psokolov@synopsys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MODULE_DESCRIPTION("ARC PS/2 Driver");