^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013 Aeroflex Gaisler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This driver supports the APBPS2 PS/2 core available in the GRLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * VHDL IP core library.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Full documentation of the APBPS2 core can be found here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * http://www.gaisler.com/products/grlib/grip.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * See "Documentation/devicetree/bindings/input/ps2keyb-mouse-apbps2.txt" for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * information on open firmware properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Contributors: Daniel Hellstrom <daniel@gaisler.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/serio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct apbps2_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 __iomem data; /* 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 __iomem status; /* 0x04 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 __iomem ctrl; /* 0x08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 __iomem reload; /* 0x0c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define APBPS2_STATUS_DR (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define APBPS2_STATUS_PE (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define APBPS2_STATUS_FE (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define APBPS2_STATUS_KI (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define APBPS2_STATUS_RF (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define APBPS2_STATUS_TF (1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define APBPS2_STATUS_TCNT (0x1f<<22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define APBPS2_STATUS_RCNT (0x1f<<27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define APBPS2_CTRL_RE (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define APBPS2_CTRL_TE (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define APBPS2_CTRL_RI (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define APBPS2_CTRL_TI (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct apbps2_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct serio *io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct apbps2_regs __iomem *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int apbps2_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static irqreturn_t apbps2_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct apbps2_priv *priv = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned long status, data, rxflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) irqreturn_t ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) data = ioread32be(&priv->regs->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) rxflags = (status & APBPS2_STATUS_PE) ? SERIO_PARITY : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) rxflags |= (status & APBPS2_STATUS_FE) ? SERIO_FRAME : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* clear error bits? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (rxflags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) iowrite32be(0, &priv->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) serio_interrupt(priv->io, data, rxflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static int apbps2_write(struct serio *io, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct apbps2_priv *priv = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned int tleft = 10000; /* timeout in 100ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* delay until PS/2 controller has room for more chars */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) iowrite32be(val, &priv->regs->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI | APBPS2_CTRL_TE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) &priv->regs->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int apbps2_open(struct serio *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct apbps2_priv *priv = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* clear error flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) iowrite32be(0, &priv->regs->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Clear old data if available (unlikely) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) limit = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) tmp = ioread32be(&priv->regs->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Enable reciever and it's interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI, &priv->regs->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static void apbps2_close(struct serio *io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct apbps2_priv *priv = io->port_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* stop interrupts at PS/2 HW level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) iowrite32be(0, &priv->regs->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* Initialize one APBPS2 PS/2 core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int apbps2_of_probe(struct platform_device *ofdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct apbps2_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int irq, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) u32 freq_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!priv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) dev_err(&ofdev->dev, "memory allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* Find Device Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) priv->regs = devm_ioremap_resource(&ofdev->dev, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (IS_ERR(priv->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return PTR_ERR(priv->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* Reset hardware, disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) iowrite32be(0, &priv->regs->ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) err = devm_request_irq(&ofdev->dev, irq, apbps2_isr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) IRQF_SHARED, "apbps2", priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) dev_err(&ofdev->dev, "request IRQ%d failed\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Get core frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (of_property_read_u32(ofdev->dev.of_node, "freq", &freq_hz)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev_err(&ofdev->dev, "unable to get core frequency\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* Set reload register to core freq in kHz/10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) iowrite32be(freq_hz / 10000, &priv->regs->reload);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) priv->io = kzalloc(sizeof(struct serio), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (!priv->io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) priv->io->id.type = SERIO_8042;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) priv->io->open = apbps2_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) priv->io->close = apbps2_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) priv->io->write = apbps2_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) priv->io->port_data = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) strlcpy(priv->io->name, "APBPS2 PS/2", sizeof(priv->io->name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) snprintf(priv->io->phys, sizeof(priv->io->phys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) "apbps2_%d", apbps2_idx++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) dev_info(&ofdev->dev, "irq = %d, base = 0x%p\n", irq, priv->regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) serio_register_port(priv->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) platform_set_drvdata(ofdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int apbps2_of_remove(struct platform_device *of_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct apbps2_priv *priv = platform_get_drvdata(of_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) serio_unregister_port(priv->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const struct of_device_id apbps2_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) { .name = "GAISLER_APBPS2", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) { .name = "01_060", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MODULE_DEVICE_TABLE(of, apbps2_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static struct platform_driver apbps2_of_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .name = "grlib-apbps2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .of_match_table = apbps2_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .probe = apbps2_of_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .remove = apbps2_of_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) module_platform_driver(apbps2_of_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MODULE_AUTHOR("Aeroflex Gaisler AB.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MODULE_DESCRIPTION("GRLIB APBPS2 PS/2 serial I/O");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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