Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2007-2016, Synaptics Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2016 Zodiac Inflight Innovations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/rmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "rmi_driver.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "rmi_f34.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) static int rmi_f34_write_bootloader_id(struct f34_data *f34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	struct rmi_function *fn = f34->fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	struct rmi_device *rmi_dev = fn->rmi_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	u8 bootloader_id[F34_BOOTLOADER_ID_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	ret = rmi_read_block(rmi_dev, fn->fd.query_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 			     bootloader_id, sizeof(bootloader_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		dev_err(&fn->dev, "%s: Reading bootloader ID failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 				__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: writing bootloader id '%c%c'\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			__func__, bootloader_id[0], bootloader_id[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	ret = rmi_write_block(rmi_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 			      fn->fd.data_base_addr + F34_BLOCK_DATA_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			      bootloader_id, sizeof(bootloader_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		dev_err(&fn->dev, "Failed to write bootloader ID: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static int rmi_f34_command(struct f34_data *f34, u8 command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 			   unsigned int timeout, bool write_bl_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct rmi_function *fn = f34->fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct rmi_device *rmi_dev = fn->rmi_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	if (write_bl_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		ret = rmi_f34_write_bootloader_id(f34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	init_completion(&f34->v5.cmd_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	ret = rmi_read(rmi_dev, f34->v5.ctrl_address, &f34->v5.status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 			"%s: Failed to read cmd register: %d (command %#02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			__func__, ret, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	f34->v5.status |= command & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	ret = rmi_write(rmi_dev, f34->v5.ctrl_address, f34->v5.status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			"Failed to write F34 command %#02x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			command, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (!wait_for_completion_timeout(&f34->v5.cmd_done,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 				msecs_to_jiffies(timeout))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		ret = rmi_read(rmi_dev, f34->v5.ctrl_address, &f34->v5.status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 			dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				"%s: cmd %#02x timed out: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				__func__, command, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		if (f34->v5.status & 0x7f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 				"%s: cmd %#02x timed out, status: %#02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				__func__, command, f34->v5.status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static irqreturn_t rmi_f34_attention(int irq, void *ctx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct rmi_function *fn = ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct f34_data *f34 = dev_get_drvdata(&fn->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	if (f34->bl_version == 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		ret = rmi_read(f34->fn->rmi_dev, f34->v5.ctrl_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			       &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: status: %#02x, ret: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			__func__, status, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		if (!ret && !(status & 0x7f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			complete(&f34->v5.cmd_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		ret = rmi_read_block(f34->fn->rmi_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 				     f34->fn->fd.data_base_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 						f34->v7.off.flash_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 				     &status, sizeof(status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: status: %#02x, ret: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 			__func__, status, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (!ret && !(status & 0x1f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			complete(&f34->v7.cmd_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int rmi_f34_write_blocks(struct f34_data *f34, const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 				int block_count, u8 command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	struct rmi_function *fn = f34->fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	struct rmi_device *rmi_dev = fn->rmi_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u16 address = fn->fd.data_base_addr + F34_BLOCK_DATA_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	u8 start_address[] = { 0, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	ret = rmi_write_block(rmi_dev, fn->fd.data_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			      start_address, sizeof(start_address));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		dev_err(&fn->dev, "Failed to write initial zeros: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	for (i = 0; i < block_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		ret = rmi_write_block(rmi_dev, address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 				      data, f34->v5.block_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 			dev_err(&fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 				"failed to write block #%d: %d\n", i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		ret = rmi_f34_command(f34, command, F34_IDLE_WAIT_MS, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			dev_err(&fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				"Failed to write command for block #%d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 				i, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		rmi_dbg(RMI_DEBUG_FN, &fn->dev, "wrote block %d of %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			i + 1, block_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		data += f34->v5.block_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		f34->update_progress += f34->v5.block_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		f34->update_status = (f34->update_progress * 100) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			f34->update_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static int rmi_f34_write_firmware(struct f34_data *f34, const void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	return rmi_f34_write_blocks(f34, data, f34->v5.fw_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				    F34_WRITE_FW_BLOCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static int rmi_f34_write_config(struct f34_data *f34, const void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return rmi_f34_write_blocks(f34, data, f34->v5.config_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 				    F34_WRITE_CONFIG_BLOCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int rmi_f34_enable_flash(struct f34_data *f34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return rmi_f34_command(f34, F34_ENABLE_FLASH_PROG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			       F34_ENABLE_WAIT_MS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int rmi_f34_flash_firmware(struct f34_data *f34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				  const struct rmi_f34_firmware *syn_fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	struct rmi_function *fn = f34->fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	u32 image_size = le32_to_cpu(syn_fw->image_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	u32 config_size = le32_to_cpu(syn_fw->config_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	f34->update_progress = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	f34->update_size = image_size + config_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (image_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		dev_info(&fn->dev, "Erasing firmware...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		ret = rmi_f34_command(f34, F34_ERASE_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 				      F34_ERASE_WAIT_MS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		dev_info(&fn->dev, "Writing firmware (%d bytes)...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			 image_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		ret = rmi_f34_write_firmware(f34, syn_fw->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (config_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		 * We only need to erase config if we haven't updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		 * firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		if (!image_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			dev_info(&fn->dev, "Erasing config...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			ret = rmi_f34_command(f34, F34_ERASE_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 					      F34_ERASE_WAIT_MS, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 				return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		dev_info(&fn->dev, "Writing config (%d bytes)...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 			 config_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		ret = rmi_f34_write_config(f34, &syn_fw->data[image_size]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int rmi_f34_update_firmware(struct f34_data *f34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				   const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	const struct rmi_f34_firmware *syn_fw =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 				(const struct rmi_f34_firmware *)fw->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	u32 image_size = le32_to_cpu(syn_fw->image_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	u32 config_size = le32_to_cpu(syn_fw->config_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	BUILD_BUG_ON(offsetof(struct rmi_f34_firmware, data) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			F34_FW_IMAGE_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		"FW size:%zd, checksum:%08x, image_size:%d, config_size:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		fw->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		le32_to_cpu(syn_fw->checksum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		image_size, config_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		"FW bootloader_id:%02x, product_id:%.*s, info: %02x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		syn_fw->bootloader_version,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		(int)sizeof(syn_fw->product_id), syn_fw->product_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		syn_fw->product_info[0], syn_fw->product_info[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (image_size && image_size != f34->v5.fw_blocks * f34->v5.block_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			"Bad firmware image: fw size %d, expected %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			image_size, f34->v5.fw_blocks * f34->v5.block_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		ret = -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (config_size &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	    config_size != f34->v5.config_blocks * f34->v5.block_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 			"Bad firmware image: config size %d, expected %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			config_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 			f34->v5.config_blocks * f34->v5.block_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 		ret = -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	if (image_size && !config_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		dev_err(&f34->fn->dev, "Bad firmware image: no config data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		ret = -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	dev_info(&f34->fn->dev, "Firmware image OK\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	mutex_lock(&f34->v5.flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	ret = rmi_f34_flash_firmware(f34, syn_fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	mutex_unlock(&f34->v5.flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int rmi_f34_status(struct rmi_function *fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	struct f34_data *f34 = dev_get_drvdata(&fn->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	 * The status is the percentage complete, or once complete,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	 * zero for success or a negative return code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	return f34->update_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static ssize_t rmi_driver_bootloader_id_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 					     struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 					     char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	struct rmi_driver_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	struct rmi_function *fn = data->f34_container;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	struct f34_data *f34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	if (fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		f34 = dev_get_drvdata(&fn->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		if (f34->bl_version == 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 			return scnprintf(buf, PAGE_SIZE, "%c%c\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 					 f34->bootloader_id[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 					 f34->bootloader_id[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			return scnprintf(buf, PAGE_SIZE, "V%d.%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 					 f34->bootloader_id[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 					 f34->bootloader_id[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static DEVICE_ATTR(bootloader_id, 0444, rmi_driver_bootloader_id_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static ssize_t rmi_driver_configuration_id_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 						struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 						char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	struct rmi_driver_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	struct rmi_function *fn = data->f34_container;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	struct f34_data *f34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	if (fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		f34 = dev_get_drvdata(&fn->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		return scnprintf(buf, PAGE_SIZE, "%s\n", f34->configuration_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static DEVICE_ATTR(configuration_id, 0444,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		   rmi_driver_configuration_id_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int rmi_firmware_update(struct rmi_driver_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			       const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	struct rmi_device *rmi_dev = data->rmi_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	struct device *dev = &rmi_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	struct f34_data *f34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	if (!data->f34_container) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		dev_warn(dev, "%s: No F34 present!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	f34 = dev_get_drvdata(&data->f34_container->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	if (f34->bl_version == 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		if (data->pdt_props & HAS_BSR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 			dev_err(dev, "%s: LTS not supported\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	} else if (f34->bl_version != 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		dev_warn(dev, "F34 V%d not supported!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 			 data->f34_container->fd.function_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	/* Enter flash mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	if (f34->bl_version == 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		ret = rmi_f34v7_start_reflash(f34, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		ret = rmi_f34_enable_flash(f34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	rmi_disable_irq(rmi_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	/* Tear down functions and re-probe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	rmi_free_function_list(rmi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	ret = rmi_probe_interrupts(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	ret = rmi_init_functions(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	if (!data->bootloader_mode || !data->f34_container) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 		dev_warn(dev, "%s: No F34 present or not in bootloader!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 				__func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	rmi_enable_irq(rmi_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	f34 = dev_get_drvdata(&data->f34_container->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	/* Perform firmware update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	if (f34->bl_version == 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		ret = rmi_f34v7_do_reflash(f34, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 		ret = rmi_f34_update_firmware(f34, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 		f34->update_status = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		dev_err(&f34->fn->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 			"Firmware update failed, status: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		dev_info(&f34->fn->dev, "Firmware update complete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	rmi_disable_irq(rmi_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	/* Re-probe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	rmi_dbg(RMI_DEBUG_FN, dev, "Re-probing device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	rmi_free_function_list(rmi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	ret = rmi_scan_pdt(rmi_dev, NULL, rmi_initial_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 		dev_warn(dev, "RMI reset failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	ret = rmi_probe_interrupts(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	ret = rmi_init_functions(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	rmi_enable_irq(rmi_dev, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	if (data->f01_container->dev.driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 		/* Driver already bound, so enable ATTN now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		return rmi_enable_sensor(rmi_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	rmi_dbg(RMI_DEBUG_FN, dev, "%s complete\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static ssize_t rmi_driver_update_fw_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 					  struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 					  const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	struct rmi_driver_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	char fw_name[NAME_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	size_t copy_count = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	if (count == 0 || count >= NAME_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	if (buf[count - 1] == '\0' || buf[count - 1] == '\n')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 		copy_count -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	strncpy(fw_name, buf, copy_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	fw_name[copy_count] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	ret = request_firmware(&fw, fw_name, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	dev_info(dev, "Flashing %s\n", fw_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	ret = rmi_firmware_update(data, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	return ret ?: count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static DEVICE_ATTR(update_fw, 0200, NULL, rmi_driver_update_fw_store);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static ssize_t rmi_driver_update_fw_status_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 						struct device_attribute *dattr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 						char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	struct rmi_driver_data *data = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	int update_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	if (data->f34_container)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 		update_status = rmi_f34_status(data->f34_container);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	return scnprintf(buf, PAGE_SIZE, "%d\n", update_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) static DEVICE_ATTR(update_fw_status, 0444,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 		   rmi_driver_update_fw_status_show, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) static struct attribute *rmi_firmware_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 	&dev_attr_bootloader_id.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 	&dev_attr_configuration_id.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	&dev_attr_update_fw.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	&dev_attr_update_fw_status.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static const struct attribute_group rmi_firmware_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 	.attrs = rmi_firmware_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static int rmi_f34_probe(struct rmi_function *fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 	struct f34_data *f34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 	unsigned char f34_queries[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	bool has_config_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	u8 version = fn->fd.function_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	f34 = devm_kzalloc(&fn->dev, sizeof(struct f34_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	if (!f34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	f34->fn = fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	dev_set_drvdata(&fn->dev, f34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	/* v5 code only supported version 0, try V7 probe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	if (version > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 		return rmi_f34v7_probe(f34);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	f34->bl_version = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	ret = rmi_read_block(fn->rmi_dev, fn->fd.query_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 			     f34_queries, sizeof(f34_queries));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 		dev_err(&fn->dev, "%s: Failed to query properties\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 			__func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	snprintf(f34->bootloader_id, sizeof(f34->bootloader_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 		 "%c%c", f34_queries[0], f34_queries[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	mutex_init(&f34->v5.flash_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	init_completion(&f34->v5.cmd_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	f34->v5.block_size = get_unaligned_le16(&f34_queries[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	f34->v5.fw_blocks = get_unaligned_le16(&f34_queries[5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	f34->v5.config_blocks = get_unaligned_le16(&f34_queries[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	f34->v5.ctrl_address = fn->fd.data_base_addr + F34_BLOCK_DATA_OFFSET +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 		f34->v5.block_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	has_config_id = f34_queries[2] & (1 << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	rmi_dbg(RMI_DEBUG_FN, &fn->dev, "Bootloader ID: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 		f34->bootloader_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	rmi_dbg(RMI_DEBUG_FN, &fn->dev, "Block size: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 		f34->v5.block_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	rmi_dbg(RMI_DEBUG_FN, &fn->dev, "FW blocks: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 		f34->v5.fw_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	rmi_dbg(RMI_DEBUG_FN, &fn->dev, "CFG blocks: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 		f34->v5.config_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	if (has_config_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 		ret = rmi_read_block(fn->rmi_dev, fn->fd.control_base_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 				     f34_queries, sizeof(f34_queries));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 		if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 			dev_err(&fn->dev, "Failed to read F34 config ID\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 		snprintf(f34->configuration_id, sizeof(f34->configuration_id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) 			 "%02x%02x%02x%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 			 f34_queries[0], f34_queries[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 			 f34_queries[2], f34_queries[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 		rmi_dbg(RMI_DEBUG_FN, &fn->dev, "Configuration ID: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 			 f34->configuration_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) int rmi_f34_create_sysfs(struct rmi_device *rmi_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) 	return sysfs_create_group(&rmi_dev->dev.kobj, &rmi_firmware_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) void rmi_f34_remove_sysfs(struct rmi_device *rmi_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) 	sysfs_remove_group(&rmi_dev->dev.kobj, &rmi_firmware_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) struct rmi_function_handler rmi_f34_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		.name = "rmi4_f34",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	.func = 0x34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 	.probe = rmi_f34_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 	.attention = rmi_f34_attention,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) };