Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2014, Sony Mobile Communications Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define PON_REV2			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define PON_RT_STS			0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define  PON_KPDPWR_N_SET		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define  PON_RESIN_N_SET		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define PON_PS_HOLD_RST_CTL		0x5a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define PON_PS_HOLD_RST_CTL2		0x5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define  PON_PS_HOLD_ENABLE		BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define  PON_PS_HOLD_TYPE_MASK		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define  PON_PS_HOLD_TYPE_SHUTDOWN	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define  PON_PS_HOLD_TYPE_HARD_RESET	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define PON_PULL_CTL			0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define  PON_KPDPWR_PULL_UP		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define  PON_RESIN_PULL_UP		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define PON_DBC_CTL			0x71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define  PON_DBC_DELAY_MASK		0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct pm8941_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	unsigned int pull_up_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	unsigned int status_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) struct pm8941_pwrkey {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u32 baseaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	unsigned int revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct notifier_block reboot_notifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	const struct pm8941_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static int pm8941_reboot_notify(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 				unsigned long code, void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct pm8941_pwrkey *pwrkey = container_of(nb, struct pm8941_pwrkey,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 						    reboot_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned int enable_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	unsigned int reset_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	/* PMICs with revision 0 have the enable bit in same register as ctrl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (pwrkey->revision == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		enable_reg = PON_PS_HOLD_RST_CTL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		enable_reg = PON_PS_HOLD_RST_CTL2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	error = regmap_update_bits(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 				   pwrkey->baseaddr + enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				   PON_PS_HOLD_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 				   0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		dev_err(pwrkey->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			"unable to clear ps hold reset enable: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	 * Updates of PON_PS_HOLD_ENABLE requires 3 sleep cycles between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	 * writes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	usleep_range(100, 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	switch (code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	case SYS_HALT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	case SYS_POWER_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		reset_type = PON_PS_HOLD_TYPE_SHUTDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	case SYS_RESTART:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		reset_type = PON_PS_HOLD_TYPE_HARD_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	error = regmap_update_bits(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				   pwrkey->baseaddr + PON_PS_HOLD_RST_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				   PON_PS_HOLD_TYPE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				   reset_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		dev_err(pwrkey->dev, "unable to set ps hold reset type: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	error = regmap_update_bits(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 				   pwrkey->baseaddr + enable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 				   PON_PS_HOLD_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				   PON_PS_HOLD_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		dev_err(pwrkey->dev, "unable to re-set enable: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static irqreturn_t pm8941_pwrkey_irq(int irq, void *_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	struct pm8941_pwrkey *pwrkey = _data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	unsigned int sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	error = regmap_read(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			    pwrkey->baseaddr + PON_RT_STS, &sts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	input_report_key(pwrkey->input, pwrkey->code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 			 sts & pwrkey->data->status_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	input_sync(pwrkey->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int __maybe_unused pm8941_pwrkey_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	struct pm8941_pwrkey *pwrkey = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		enable_irq_wake(pwrkey->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int __maybe_unused pm8941_pwrkey_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct pm8941_pwrkey *pwrkey = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		disable_irq_wake(pwrkey->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static SIMPLE_DEV_PM_OPS(pm8941_pwr_key_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			 pm8941_pwrkey_suspend, pm8941_pwrkey_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int pm8941_pwrkey_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	struct pm8941_pwrkey *pwrkey;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	bool pull_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct device *parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	u32 req_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (of_property_read_u32(pdev->dev.of_node, "debounce", &req_delay))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		req_delay = 15625;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	if (req_delay > 2000000 || req_delay == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		dev_err(&pdev->dev, "invalid debounce time: %u\n", req_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	pull_up = of_property_read_bool(pdev->dev.of_node, "bias-pull-up");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	pwrkey = devm_kzalloc(&pdev->dev, sizeof(*pwrkey), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	if (!pwrkey)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	pwrkey->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	pwrkey->data = of_device_get_match_data(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	parent = pdev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	pwrkey->regmap = dev_get_regmap(parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (!pwrkey->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		 * We failed to get regmap for parent. Let's see if we are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		 * a child of pon node and read regmap and reg from its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		 * parent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		pwrkey->regmap = dev_get_regmap(parent->parent, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (!pwrkey->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			dev_err(&pdev->dev, "failed to locate regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		error = of_property_read_u32(parent->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 					     "reg", &pwrkey->baseaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		error = of_property_read_u32(pdev->dev.of_node, "reg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 					     &pwrkey->baseaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	pwrkey->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (pwrkey->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return pwrkey->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	error = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_REV2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			    &pwrkey->revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		dev_err(&pdev->dev, "failed to set debounce: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	error = of_property_read_u32(pdev->dev.of_node, "linux,code",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 				     &pwrkey->code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		dev_dbg(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			"no linux,code assuming power (%d)\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		pwrkey->code = KEY_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	pwrkey->input = devm_input_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (!pwrkey->input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		dev_dbg(&pdev->dev, "unable to allocate input device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	input_set_capability(pwrkey->input, EV_KEY, pwrkey->code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	pwrkey->input->name = "pm8941_pwrkey";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	pwrkey->input->phys = "pm8941_pwrkey/input0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	req_delay = (req_delay << 6) / USEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	req_delay = ilog2(req_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	error = regmap_update_bits(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				   pwrkey->baseaddr + PON_DBC_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 				   PON_DBC_DELAY_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				   req_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		dev_err(&pdev->dev, "failed to set debounce: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	error = regmap_update_bits(pwrkey->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 				   pwrkey->baseaddr + PON_PULL_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 				   pwrkey->data->pull_up_bit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 				   pull_up ? pwrkey->data->pull_up_bit : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		dev_err(&pdev->dev, "failed to set pull: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	error = devm_request_threaded_irq(&pdev->dev, pwrkey->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 					  NULL, pm8941_pwrkey_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 					  IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 					  "pm8941_pwrkey", pwrkey);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		dev_err(&pdev->dev, "failed requesting IRQ: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	error = input_register_device(pwrkey->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		dev_err(&pdev->dev, "failed to register input device: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 			error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	pwrkey->reboot_notifier.notifier_call = pm8941_reboot_notify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	error = register_reboot_notifier(&pwrkey->reboot_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		dev_err(&pdev->dev, "failed to register reboot notifier: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	platform_set_drvdata(pdev, pwrkey);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static int pm8941_pwrkey_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct pm8941_pwrkey *pwrkey = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	unregister_reboot_notifier(&pwrkey->reboot_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static const struct pm8941_data pwrkey_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	.pull_up_bit = PON_KPDPWR_PULL_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	.status_bit = PON_KPDPWR_N_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static const struct pm8941_data resin_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.pull_up_bit = PON_RESIN_PULL_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	.status_bit = PON_RESIN_N_SET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static const struct of_device_id pm8941_pwr_key_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	{ .compatible = "qcom,pm8941-pwrkey", .data = &pwrkey_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	{ .compatible = "qcom,pm8941-resin", .data = &resin_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MODULE_DEVICE_TABLE(of, pm8941_pwr_key_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct platform_driver pm8941_pwrkey_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.probe = pm8941_pwrkey_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.remove = pm8941_pwrkey_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		.name = "pm8941-pwrkey",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		.pm = &pm8941_pwr_key_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		.of_match_table = of_match_ptr(pm8941_pwr_key_id_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) module_platform_driver(pm8941_pwrkey_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MODULE_DESCRIPTION("PM8941 Power Key driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) MODULE_LICENSE("GPL v2");