^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Azoteq IQS269A Capacitive Touch Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This driver registers up to 3 input devices: one representing capacitive or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * inductive keys as well as Hall-effect switches, and one for each of the two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * axial sliders presented by the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define IQS269_VER_INFO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define IQS269_VER_INFO_PROD_NUM 0x4F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define IQS269_SYS_FLAGS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define IQS269_SYS_FLAGS_SHOW_RESET BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define IQS269_SYS_FLAGS_IN_ATI BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define IQS269_CHx_COUNTS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define IQS269_SLIDER_X 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define IQS269_CAL_DATA_A 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define IQS269_SYS_SETTINGS 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define IQS269_SYS_SETTINGS_CLK_DIV BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define IQS269_SYS_SETTINGS_REDO_ATI BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define IQS269_SYS_SETTINGS_ACK_RESET BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define IQS269_FILT_STR_LP_LTA_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define IQS269_FILT_STR_LP_CNT_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define IQS269_FILT_STR_NP_LTA_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define IQS269_FILT_STR_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define IQS269_EVENT_MASK_SYS BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define IQS269_EVENT_MASK_DEEP BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define IQS269_EVENT_MASK_TOUCH BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define IQS269_EVENT_MASK_PROX BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define IQS269_RATE_NP_MS_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define IQS269_RATE_LP_MS_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define IQS269_RATE_ULP_MS_MAX 4080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define IQS269_TIMEOUT_PWR_MS_MAX 130560
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define IQS269_TIMEOUT_LTA_MS_MAX 130560
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define IQS269_MISC_A_ATI_LP_ONLY BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define IQS269_MISC_A_FILT_DISABLE BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define IQS269_MISC_A_DUAL_DIR BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define IQS269_MISC_A_TX_FREQ_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define IQS269_MISC_A_TX_FREQ_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define IQS269_MISC_B_RESEED_UI_SEL_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define IQS269_CHx_SETTINGS 0x8C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define IQS269_CHx_ENG_A_ATI_MODE_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define IQS269_CHx_ENG_A_INV_LOGIC BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define IQS269_CHx_ENG_B_ATI_BASE_75 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define IQS269_CHx_ENG_B_ATI_BASE_100 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define IQS269_CHx_ENG_B_ATI_BASE_150 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define IQS269_CHx_WEIGHT_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define IQS269_CHx_THRESH_MAX 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define IQS269_CHx_HYST_DEEP_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define IQS269_CHx_HYST_MAX 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define IQS269_CHx_HALL_INACTIVE 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define IQS269_CHx_HALL_ACTIVE 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define IQS269_HALL_PAD_R BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define IQS269_HALL_PAD_L BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define IQS269_HALL_PAD_INV BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define IQS269_HALL_UI 0xF5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define IQS269_HALL_UI_ENABLE BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define IQS269_MAX_REG 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define IQS269_NUM_CH 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define IQS269_NUM_SL 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define IQS269_ATI_POLL_SLEEP_US (iqs269->delay_mult * 10000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define IQS269_ATI_POLL_TIMEOUT_US (iqs269->delay_mult * 500000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define IQS269_ATI_STABLE_DELAY_MS (iqs269->delay_mult * 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define IQS269_PWR_MODE_POLL_SLEEP_US IQS269_ATI_POLL_SLEEP_US
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define IQS269_PWR_MODE_POLL_TIMEOUT_US IQS269_ATI_POLL_TIMEOUT_US
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define iqs269_irq_wait() usleep_range(100, 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) enum iqs269_local_cap_size {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) IQS269_LOCAL_CAP_SIZE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) enum iqs269_st_offs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) IQS269_ST_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) IQS269_ST_OFFS_DIR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) IQS269_ST_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) IQS269_ST_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) enum iqs269_th_offs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) IQS269_TH_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) IQS269_TH_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) IQS269_TH_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) enum iqs269_event_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) IQS269_EVENT_PROX_DN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) IQS269_EVENT_PROX_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) IQS269_EVENT_TOUCH_DN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) IQS269_EVENT_TOUCH_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) IQS269_EVENT_DEEP_DN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) IQS269_EVENT_DEEP_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct iqs269_switch_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned int code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct iqs269_event_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) enum iqs269_st_offs st_offs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) enum iqs269_th_offs th_offs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) bool dir_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static const struct iqs269_event_desc iqs269_events[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) [IQS269_EVENT_PROX_DN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .name = "event-prox",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .st_offs = IQS269_ST_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .th_offs = IQS269_TH_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .mask = IQS269_EVENT_MASK_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) [IQS269_EVENT_PROX_UP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .name = "event-prox-alt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .st_offs = IQS269_ST_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .th_offs = IQS269_TH_OFFS_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .dir_up = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .mask = IQS269_EVENT_MASK_PROX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [IQS269_EVENT_TOUCH_DN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .name = "event-touch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .st_offs = IQS269_ST_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .th_offs = IQS269_TH_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .mask = IQS269_EVENT_MASK_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) [IQS269_EVENT_TOUCH_UP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .name = "event-touch-alt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .st_offs = IQS269_ST_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .th_offs = IQS269_TH_OFFS_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .dir_up = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .mask = IQS269_EVENT_MASK_TOUCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) [IQS269_EVENT_DEEP_DN] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .name = "event-deep",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .st_offs = IQS269_ST_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .th_offs = IQS269_TH_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .mask = IQS269_EVENT_MASK_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) [IQS269_EVENT_DEEP_UP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .name = "event-deep-alt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .st_offs = IQS269_ST_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .th_offs = IQS269_TH_OFFS_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .dir_up = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .mask = IQS269_EVENT_MASK_DEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct iqs269_ver_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u8 prod_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u8 sw_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u8 hw_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u8 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct iqs269_sys_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) __be16 general;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u8 active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) u8 filter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u8 reseed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 event_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) u8 rate_np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u8 rate_lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u8 rate_ulp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u8 timeout_pwr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 timeout_rdy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) u8 timeout_lta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) __be16 misc_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) __be16 misc_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u8 blocking;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u8 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u8 slider_select[IQS269_NUM_SL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u8 timeout_tap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) u8 timeout_swipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u8 thresh_swipe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u8 redo_ati;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct iqs269_ch_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u8 rx_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u8 tx_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) __be16 engine_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) __be16 engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) __be16 ati_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u8 thresh[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) u8 hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 assoc_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 assoc_weight;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct iqs269_flags {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) __be16 system;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u8 gesture;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 states[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct iqs269_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct iqs269_ch_reg ch_reg[IQS269_NUM_CH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct iqs269_sys_reg sys_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct input_dev *keypad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct input_dev *slider[IQS269_NUM_SL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) unsigned int suspend_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned int delay_mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) unsigned int ch_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) bool hall_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) bool ati_current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static int iqs269_ati_mode_set(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) unsigned int ch_num, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u16 engine_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) iqs269->ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) iqs269->ati_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static int iqs269_ati_mode_get(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) unsigned int ch_num, unsigned int *mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) u16 engine_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static int iqs269_ati_base_set(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) unsigned int ch_num, unsigned int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u16 engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) switch (base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) case 75:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) base = IQS269_CHx_ENG_B_ATI_BASE_75;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) case 100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) base = IQS269_CHx_ENG_B_ATI_BASE_100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) case 150:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) base = IQS269_CHx_ENG_B_ATI_BASE_150;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) case 200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) base = IQS269_CHx_ENG_B_ATI_BASE_200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) engine_b |= base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) iqs269->ati_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int iqs269_ati_base_get(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned int ch_num, unsigned int *base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) u16 engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) case IQS269_CHx_ENG_B_ATI_BASE_75:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) *base = 75;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) case IQS269_CHx_ENG_B_ATI_BASE_100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) *base = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) case IQS269_CHx_ENG_B_ATI_BASE_150:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) *base = 150;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) case IQS269_CHx_ENG_B_ATI_BASE_200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) *base = 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static int iqs269_ati_target_set(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) unsigned int ch_num, unsigned int target)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u16 engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) engine_b |= target / 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) iqs269->ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) iqs269->ati_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static int iqs269_ati_target_get(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned int ch_num, unsigned int *target)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) u16 engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (ch_num >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) engine_b = be16_to_cpu(iqs269->ch_reg[ch_num].engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static int iqs269_parse_mask(const struct fwnode_handle *fwnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) const char *propname, u8 *mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) unsigned int val[IQS269_NUM_CH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) int count, error, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) count = fwnode_property_count_u32(fwnode, propname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) if (count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) if (count > IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) error = fwnode_property_read_u32_array(fwnode, propname, val, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) *mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) for (i = 0; i < count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (val[i] >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) *mask |= BIT(val[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static int iqs269_parse_chan(struct iqs269_private *iqs269,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) const struct fwnode_handle *ch_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct fwnode_handle *ev_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct iqs269_ch_reg *ch_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u16 engine_a, engine_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) unsigned int reg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) int error, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) error = fwnode_property_read_u32(ch_node, "reg", ®);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) dev_err(&client->dev, "Failed to read channel number: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) } else if (reg >= IQS269_NUM_CH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) dev_err(&client->dev, "Invalid channel number: %u\n", reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) iqs269->sys_reg.active |= BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) iqs269->sys_reg.reseed |= BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (fwnode_property_present(ch_node, "azoteq,blocking-enable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) iqs269->sys_reg.blocking |= BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (fwnode_property_present(ch_node, "azoteq,slider0-select"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) iqs269->sys_reg.slider_select[0] |= BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (fwnode_property_present(ch_node, "azoteq,slider1-select"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) iqs269->sys_reg.slider_select[1] |= BIT(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) ch_reg = &iqs269->ch_reg[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) error = regmap_raw_read(iqs269->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) IQS269_CHx_SETTINGS + reg * sizeof(*ch_reg) / 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) ch_reg, sizeof(*ch_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) error = iqs269_parse_mask(ch_node, "azoteq,rx-enable",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) &ch_reg->rx_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) reg, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) error = iqs269_parse_mask(ch_node, "azoteq,tx-enable",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) &ch_reg->tx_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) reg, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) engine_a = be16_to_cpu(ch_reg->engine_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) engine_b = be16_to_cpu(ch_reg->engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) case IQS269_LOCAL_CAP_SIZE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) "Invalid channel %u local cap. size: %u\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) engine_a |= IQS269_CHx_ENG_A_INV_LOGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) "Invalid channel %u bias current: %u\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) "Invalid channel %u sensing mode: %u\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) engine_a |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) "Invalid channel %u sensing frequency: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (fwnode_property_present(ch_node, "azoteq,static-enable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) ch_reg->engine_a = cpu_to_be16(engine_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) ch_reg->engine_b = cpu_to_be16(engine_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) error = iqs269_ati_mode_set(iqs269, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) "Invalid channel %u ATI mode: %u\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) error = iqs269_ati_base_set(iqs269, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "Invalid channel %u ATI base: %u\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) error = iqs269_ati_target_set(iqs269, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "Invalid channel %u ATI target: %u\n", reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) error = iqs269_parse_mask(ch_node, "azoteq,assoc-select",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) &ch_reg->assoc_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) dev_err(&client->dev, "Invalid channel %u association: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) reg, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (val > IQS269_CHx_WEIGHT_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) "Invalid channel %u associated weight: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) ch_reg->assoc_weight = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) ev_node = fwnode_get_named_child_node(ch_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) iqs269_events[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) if (!ev_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (val > IQS269_CHx_THRESH_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) "Invalid channel %u threshold: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ch_reg->thresh[iqs269_events[i].th_offs] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) u8 *hyst = &ch_reg->hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (val > IQS269_CHx_HYST_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) "Invalid channel %u hysteresis: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (i == IQS269_EVENT_DEEP_DN ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) i == IQS269_EVENT_DEEP_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) *hyst &= ~IQS269_CHx_HYST_DEEP_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) } else if (i == IQS269_EVENT_TOUCH_DN ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) i == IQS269_EVENT_TOUCH_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) *hyst |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) if (fwnode_property_read_u32(ev_node, "linux,code", &val))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) case IQS269_CHx_HALL_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (iqs269->hall_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) iqs269->switches[i].code = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) iqs269->switches[i].enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) case IQS269_CHx_HALL_INACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (iqs269->hall_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) iqs269->keycode[i * IQS269_NUM_CH + reg] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) static int iqs269_parse_prop(struct iqs269_private *iqs269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) struct fwnode_handle *ch_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) u16 general, misc_a, misc_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) iqs269->hall_enable = device_property_present(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) "azoteq,hall-enable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) dev_err(&client->dev, "Invalid suspend mode: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) iqs269->suspend_mode = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) sizeof(*sys_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (val > IQS269_FILT_STR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) dev_err(&client->dev, "Invalid filter strength: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (val > IQS269_FILT_STR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) dev_err(&client->dev, "Invalid filter strength: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (val > IQS269_FILT_STR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) dev_err(&client->dev, "Invalid filter strength: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (val > IQS269_FILT_STR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) dev_err(&client->dev, "Invalid filter strength: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) sys_reg->filter |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) if (val > IQS269_RATE_NP_MS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) dev_err(&client->dev, "Invalid report rate: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) sys_reg->rate_np = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) if (val > IQS269_RATE_LP_MS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) dev_err(&client->dev, "Invalid report rate: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) sys_reg->rate_lp = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) if (val > IQS269_RATE_ULP_MS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) dev_err(&client->dev, "Invalid report rate: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) sys_reg->rate_ulp = val / 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) if (val > IQS269_TIMEOUT_PWR_MS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) dev_err(&client->dev, "Invalid timeout: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) sys_reg->timeout_pwr = val / 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if (val > IQS269_TIMEOUT_LTA_MS_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) dev_err(&client->dev, "Invalid timeout: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) sys_reg->timeout_lta = val / 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) misc_a = be16_to_cpu(sys_reg->misc_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) misc_b = be16_to_cpu(sys_reg->misc_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) misc_a |= IQS269_MISC_A_ATI_LP_ONLY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if (device_property_present(&client->dev, "azoteq,ati-band-tighten"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) misc_a &= ~IQS269_MISC_A_FILT_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) if (device_property_present(&client->dev, "azoteq,filt-disable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) misc_a |= IQS269_MISC_A_FILT_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) if (val >= IQS269_NUM_CH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) misc_a &= ~IQS269_MISC_A_DUAL_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (device_property_present(&client->dev, "azoteq,dual-direction"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) misc_a |= IQS269_MISC_A_DUAL_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) if (val > IQS269_MISC_A_TX_FREQ_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) "Invalid excitation frequency: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) if (device_property_present(&client->dev, "azoteq,global-cap-increase"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) dev_err(&client->dev, "Invalid reseed selection: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) if (device_property_present(&client->dev, "azoteq,tracking-enable"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (val > IQS269_FILT_STR_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) dev_err(&client->dev, "Invalid filter strength: %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) misc_b |= val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) sys_reg->misc_a = cpu_to_be16(misc_a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) sys_reg->misc_b = cpu_to_be16(misc_b);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) sys_reg->active = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) sys_reg->reseed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) sys_reg->blocking = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) sys_reg->slider_select[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) sys_reg->slider_select[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) device_for_each_child_node(&client->dev, ch_node) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) error = iqs269_parse_chan(iqs269, ch_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) fwnode_handle_put(ch_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) * Volunteer all active channels to participate in ATI when REDO-ATI is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) * manually triggered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) sys_reg->redo_ati = sys_reg->active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) general = be16_to_cpu(sys_reg->general);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if (device_property_present(&client->dev, "azoteq,clk-div")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) general |= IQS269_SYS_SETTINGS_CLK_DIV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) iqs269->delay_mult = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) general &= ~IQS269_SYS_SETTINGS_CLK_DIV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) iqs269->delay_mult = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) * Configure the device to automatically switch between normal and low-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * power modes as a function of sensing activity. Ultra-low-power mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * if enabled, is reserved for suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) general &= ~IQS269_SYS_SETTINGS_ULP_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) general &= ~IQS269_SYS_SETTINGS_DIS_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) dev_err(&client->dev, "Invalid update rate: %u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) if (device_property_present(&client->dev, "azoteq,reseed-offset"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) general |= IQS269_SYS_SETTINGS_RESEED_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) general |= IQS269_SYS_SETTINGS_EVENT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * As per the datasheet, enable streaming during normal-power mode if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * either slider is in use. In that case, the device returns to event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * mode during low-power mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) if (sys_reg->slider_select[0] || sys_reg->slider_select[1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) general |= IQS269_SYS_SETTINGS_REDO_ATI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) general |= IQS269_SYS_SETTINGS_ACK_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) sys_reg->general = cpu_to_be16(general);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static int iqs269_dev_init(struct iqs269_private *iqs269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) struct iqs269_ch_reg *ch_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) int error, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) IQS269_HALL_UI_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) iqs269->hall_enable ? ~0 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) goto err_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) for (i = 0; i < IQS269_NUM_CH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (!(sys_reg->active & BIT(i)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) ch_reg = &iqs269->ch_reg[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) error = regmap_raw_write(iqs269->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) IQS269_CHx_SETTINGS + i *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) sizeof(*ch_reg) / 2, ch_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) sizeof(*ch_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) goto err_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * The REDO-ATI and ATI channel selection fields must be written in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * same block write, so every field between registers 0x80 through 0x8B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) * (inclusive) must be written as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) sizeof(*sys_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) goto err_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) !(val & IQS269_SYS_FLAGS_IN_ATI),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) IQS269_ATI_POLL_SLEEP_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) IQS269_ATI_POLL_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) goto err_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) msleep(IQS269_ATI_STABLE_DELAY_MS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) iqs269->ati_current = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) err_mutex:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) static int iqs269_input_init(struct iqs269_private *iqs269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) struct iqs269_flags flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) unsigned int sw_code, keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) int error, i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) u8 dir_mask, state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) iqs269->keypad = devm_input_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (!iqs269->keypad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) iqs269->keypad->keycode = iqs269->keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) iqs269->keypad->keycodesize = sizeof(*iqs269->keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) iqs269->keypad->name = "iqs269a_keypad";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) iqs269->keypad->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) if (iqs269->hall_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) &flags, sizeof(flags));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) "Failed to read initial status: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) dir_mask = flags.states[IQS269_ST_OFFS_DIR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) if (!iqs269_events[i].dir_up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) dir_mask = ~dir_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) state = flags.states[iqs269_events[i].st_offs] & dir_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) sw_code = iqs269->switches[i].code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) for (j = 0; j < IQS269_NUM_CH; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * Hall-effect sensing repurposes a pair of dedicated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * channels, only one of which reports events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) switch (j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) case IQS269_CHx_HALL_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if (iqs269->hall_enable &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) iqs269->switches[i].enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) input_set_capability(iqs269->keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) EV_SW, sw_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) input_report_switch(iqs269->keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) sw_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) state & BIT(j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) case IQS269_CHx_HALL_INACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) if (iqs269->hall_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (keycode != KEY_RESERVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) input_set_capability(iqs269->keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) EV_KEY, keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) input_sync(iqs269->keypad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) error = input_register_device(iqs269->keypad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) dev_err(&client->dev, "Failed to register keypad: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) for (i = 0; i < IQS269_NUM_SL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) if (!iqs269->sys_reg.slider_select[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) iqs269->slider[i] = devm_input_allocate_device(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) if (!iqs269->slider[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) iqs269->slider[i]->name = i ? "iqs269a_slider_1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) : "iqs269a_slider_0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) iqs269->slider[i]->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) input_set_capability(iqs269->slider[i], EV_KEY, BTN_TOUCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) input_set_abs_params(iqs269->slider[i], ABS_X, 0, 255, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) error = input_register_device(iqs269->slider[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) "Failed to register slider %d: %d\n", i, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) static int iqs269_report(struct iqs269_private *iqs269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) struct iqs269_flags flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) unsigned int sw_code, keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) int error, i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) u8 slider_x[IQS269_NUM_SL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) u8 dir_mask, state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) sizeof(flags));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) dev_err(&client->dev, "Failed to read device status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) * The device resets itself if its own watchdog bites, which can happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) * in the event of an I2C communication error. In this case, the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) * asserts a SHOW_RESET interrupt and all registers must be restored.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) dev_err(&client->dev, "Unexpected device reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) error = iqs269_dev_init(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) "Failed to re-initialize device: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X, slider_x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) sizeof(slider_x));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) dev_err(&client->dev, "Failed to read slider position: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) for (i = 0; i < IQS269_NUM_SL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (!iqs269->sys_reg.slider_select[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) * Report BTN_TOUCH if any channel that participates in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) * slider is in a state of touch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) if (flags.states[IQS269_ST_OFFS_TOUCH] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) iqs269->sys_reg.slider_select[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) input_report_key(iqs269->slider[i], BTN_TOUCH, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) input_report_abs(iqs269->slider[i], ABS_X, slider_x[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) input_report_key(iqs269->slider[i], BTN_TOUCH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) input_sync(iqs269->slider[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) dir_mask = flags.states[IQS269_ST_OFFS_DIR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) if (!iqs269_events[i].dir_up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) dir_mask = ~dir_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) state = flags.states[iqs269_events[i].st_offs] & dir_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) sw_code = iqs269->switches[i].code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) for (j = 0; j < IQS269_NUM_CH; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) switch (j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) case IQS269_CHx_HALL_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) if (iqs269->hall_enable &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) iqs269->switches[i].enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) input_report_switch(iqs269->keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) sw_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) state & BIT(j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) case IQS269_CHx_HALL_INACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) if (iqs269->hall_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) input_report_key(iqs269->keypad, keycode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) state & BIT(j));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) input_sync(iqs269->keypad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) static irqreturn_t iqs269_irq(int irq, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) struct iqs269_private *iqs269 = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) if (iqs269_report(iqs269))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) * The device does not deassert its interrupt (RDY) pin until shortly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) * after receiving an I2C stop condition; the following delay ensures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) * the interrupt handler does not return before this time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) static ssize_t counts_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) __le16 counts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if (!iqs269->ati_current || iqs269->hall_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) * Unsolicited I2C communication prompts the device to assert its RDY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) * pin, so disable the interrupt line until the operation is finished
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) * and RDY has been deasserted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) error = regmap_raw_read(iqs269->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) IQS269_CHx_COUNTS + iqs269->ch_num * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) &counts, sizeof(counts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) return scnprintf(buf, PAGE_SIZE, "%u\n", le16_to_cpu(counts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) static ssize_t hall_bin_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) switch (iqs269->ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) iqs269->ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) case IQS269_HALL_PAD_R:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) case IQS269_HALL_PAD_L:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) return scnprintf(buf, PAGE_SIZE, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) static ssize_t hall_enable_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->hall_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) static ssize_t hall_enable_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) iqs269->hall_enable = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) iqs269->ati_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) static ssize_t ch_number_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ch_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) static ssize_t ch_number_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) if (val >= IQS269_NUM_CH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) iqs269->ch_num = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) static ssize_t rx_enable_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) return scnprintf(buf, PAGE_SIZE, "%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) iqs269->ch_reg[iqs269->ch_num].rx_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) static ssize_t rx_enable_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) if (val > 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) mutex_lock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) iqs269->ch_reg[iqs269->ch_num].rx_enable = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) iqs269->ati_current = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) mutex_unlock(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) static ssize_t ati_mode_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) return scnprintf(buf, PAGE_SIZE, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) static ssize_t ati_mode_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) static ssize_t ati_base_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) return scnprintf(buf, PAGE_SIZE, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) static ssize_t ati_base_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) static ssize_t ati_target_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) return scnprintf(buf, PAGE_SIZE, "%u\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) static ssize_t ati_target_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) static ssize_t ati_trigger_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) return scnprintf(buf, PAGE_SIZE, "%u\n", iqs269->ati_current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) static ssize_t ati_trigger_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) struct device_attribute *attr, const char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) error = kstrtouint(buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) if (!val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) error = iqs269_dev_init(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) static DEVICE_ATTR_RO(counts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) static DEVICE_ATTR_RO(hall_bin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) static DEVICE_ATTR_RW(hall_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) static DEVICE_ATTR_RW(ch_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) static DEVICE_ATTR_RW(rx_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) static DEVICE_ATTR_RW(ati_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) static DEVICE_ATTR_RW(ati_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) static DEVICE_ATTR_RW(ati_target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) static DEVICE_ATTR_RW(ati_trigger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) static struct attribute *iqs269_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) &dev_attr_counts.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) &dev_attr_hall_bin.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) &dev_attr_hall_enable.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) &dev_attr_ch_number.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) &dev_attr_rx_enable.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) &dev_attr_ati_mode.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) &dev_attr_ati_base.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) &dev_attr_ati_target.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) &dev_attr_ati_trigger.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) static const struct attribute_group iqs269_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) .attrs = iqs269_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) static const struct regmap_config iqs269_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) .val_bits = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) .max_register = IQS269_MAX_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) static int iqs269_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) struct iqs269_ver_info ver_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) struct iqs269_private *iqs269;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) if (!iqs269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) i2c_set_clientdata(client, iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) iqs269->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) if (IS_ERR(iqs269->regmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) error = PTR_ERR(iqs269->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) dev_err(&client->dev, "Failed to initialize register map: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) mutex_init(&iqs269->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO, &ver_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) sizeof(ver_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) if (ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) ver_info.prod_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) error = iqs269_parse_prop(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) error = iqs269_dev_init(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) dev_err(&client->dev, "Failed to initialize device: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) error = iqs269_input_init(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) error = devm_request_threaded_irq(&client->dev, client->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) NULL, iqs269_irq, IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) client->name, iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) error = devm_device_add_group(&client->dev, &iqs269_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) dev_err(&client->dev, "Failed to add attributes: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) static int __maybe_unused iqs269_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) if (!iqs269->suspend_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) * Automatic power mode switching must be disabled before the device is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) * forced into any particular power mode. In this case, the device will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) * transition into normal-power mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) IQS269_SYS_SETTINGS_DIS_AUTO, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) * The following check ensures the device has completed its transition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) * into normal-power mode before a manual mode switch is performed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) IQS269_PWR_MODE_POLL_SLEEP_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) IQS269_PWR_MODE_POLL_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) IQS269_SYS_SETTINGS_PWR_MODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) iqs269->suspend_mode <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) IQS269_SYS_SETTINGS_PWR_MODE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) * This last check ensures the device has completed its transition into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) * the desired power mode to prevent any spurious interrupts from being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) * triggered after iqs269_suspend has already returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) (val & IQS269_SYS_FLAGS_PWR_MODE_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) == (iqs269->suspend_mode <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) IQS269_SYS_FLAGS_PWR_MODE_SHIFT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) IQS269_PWR_MODE_POLL_SLEEP_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) IQS269_PWR_MODE_POLL_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) static int __maybe_unused iqs269_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) struct iqs269_private *iqs269 = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) struct i2c_client *client = iqs269->client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) if (!iqs269->suspend_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) IQS269_SYS_SETTINGS_PWR_MODE_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) * This check ensures the device has returned to normal-power mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) * before automatic power mode switching is re-enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) error = regmap_read_poll_timeout(iqs269->regmap, IQS269_SYS_FLAGS, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) !(val & IQS269_SYS_FLAGS_PWR_MODE_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) IQS269_PWR_MODE_POLL_SLEEP_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) IQS269_PWR_MODE_POLL_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) error = regmap_update_bits(iqs269->regmap, IQS269_SYS_SETTINGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) IQS269_SYS_SETTINGS_DIS_AUTO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) * This step reports any events that may have been "swallowed" as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) * result of polling PWR_MODE (which automatically acknowledges any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) * pending interrupts).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) error = iqs269_report(iqs269);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) iqs269_irq_wait();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) static SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) static const struct of_device_id iqs269_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) { .compatible = "azoteq,iqs269a" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) MODULE_DEVICE_TABLE(of, iqs269_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) static struct i2c_driver iqs269_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) .name = "iqs269a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) .of_match_table = iqs269_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) .pm = &iqs269_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) .probe_new = iqs269_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) module_i2c_driver(iqs269_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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