^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ADLX345/346 Three-Axis Digital Accelerometers (SPI Interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Enter bugs at http://blackfin.uclinux.org/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009 Michael Hennerich, Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/input.h> /* BUS_SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "adxl34x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MAX_SPI_FREQ_HZ 5000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define MAX_FREQ_NO_FIFODELAY 1500000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ADXL34X_CMD_MULTB (1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ADXL34X_CMD_READ (1 << 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ADXL34X_WRITECMD(reg) (reg & 0x3F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ADXL34X_READCMD(reg) (ADXL34X_CMD_READ | (reg & 0x3F))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ADXL34X_READMB_CMD(reg) (ADXL34X_CMD_READ | ADXL34X_CMD_MULTB \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) | (reg & 0x3F))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int adxl34x_spi_read(struct device *dev, unsigned char reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned char cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cmd = ADXL34X_READCMD(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) return spi_w8r8(spi, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int adxl34x_spi_write(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned char reg, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) buf[0] = ADXL34X_WRITECMD(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) buf[1] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return spi_write(spi, buf, sizeof(buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int adxl34x_spi_read_block(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned char reg, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ssize_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) reg = ADXL34X_READMB_CMD(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) status = spi_write_then_read(spi, ®, 1, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return (status < 0) ? status : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static const struct adxl34x_bus_ops adxl34x_spi_bops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .bustype = BUS_SPI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .write = adxl34x_spi_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .read = adxl34x_spi_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .read_block = adxl34x_spi_read_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int adxl34x_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct adxl34x *ac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* don't exceed max specified SPI CLK frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (spi->max_speed_hz > MAX_SPI_FREQ_HZ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dev_err(&spi->dev, "SPI CLK %d Hz too fast\n", spi->max_speed_hz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ac = adxl34x_probe(&spi->dev, spi->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) spi->max_speed_hz > MAX_FREQ_NO_FIFODELAY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) &adxl34x_spi_bops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (IS_ERR(ac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return PTR_ERR(ac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) spi_set_drvdata(spi, ac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static int adxl34x_spi_remove(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct adxl34x *ac = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return adxl34x_remove(ac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static int __maybe_unused adxl34x_spi_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct adxl34x *ac = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) adxl34x_suspend(ac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int __maybe_unused adxl34x_spi_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct spi_device *spi = to_spi_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct adxl34x *ac = spi_get_drvdata(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) adxl34x_resume(ac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static SIMPLE_DEV_PM_OPS(adxl34x_spi_pm, adxl34x_spi_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) adxl34x_spi_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static struct spi_driver adxl34x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .name = "adxl34x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .pm = &adxl34x_spi_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .probe = adxl34x_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .remove = adxl34x_spi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) module_spi_driver(adxl34x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MODULE_DESCRIPTION("ADXL345/346 Three-Axis Digital Accelerometer SPI Bus Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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