Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AD714X CapTouch Programmable Controller driver (SPI bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright 2009-2011 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/input.h>	/* BUS_SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "ad714x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define AD714x_SPI_CMD_PREFIX      0xE000   /* bits 15:11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define AD714x_SPI_READ            BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) static int __maybe_unused ad714x_spi_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	return ad714x_disable(spi_get_drvdata(to_spi_device(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static int __maybe_unused ad714x_spi_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	return ad714x_enable(spi_get_drvdata(to_spi_device(dev)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static SIMPLE_DEV_PM_OPS(ad714x_spi_pm, ad714x_spi_suspend, ad714x_spi_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static int ad714x_spi_read(struct ad714x_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 			   unsigned short reg, unsigned short *data, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct spi_device *spi = to_spi_device(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct spi_message message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct spi_transfer xfer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	spi_message_init(&message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	memset(xfer, 0, sizeof(xfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	chip->xfer_buf[0] = cpu_to_be16(AD714x_SPI_CMD_PREFIX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 					AD714x_SPI_READ | reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	xfer[0].tx_buf = &chip->xfer_buf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	xfer[0].len = sizeof(chip->xfer_buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	spi_message_add_tail(&xfer[0], &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	xfer[1].rx_buf = &chip->xfer_buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	xfer[1].len = sizeof(chip->xfer_buf[1]) * len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	spi_message_add_tail(&xfer[1], &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	error = spi_sync(spi, &message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	if (unlikely(error)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		dev_err(chip->dev, "SPI read error: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		data[i] = be16_to_cpu(chip->xfer_buf[i + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) static int ad714x_spi_write(struct ad714x_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 			    unsigned short reg, unsigned short data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	struct spi_device *spi = to_spi_device(chip->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	chip->xfer_buf[0] = cpu_to_be16(AD714x_SPI_CMD_PREFIX | reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	chip->xfer_buf[1] = cpu_to_be16(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	error = spi_write(spi, (u8 *)chip->xfer_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			  2 * sizeof(*chip->xfer_buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	if (unlikely(error)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		dev_err(chip->dev, "SPI write error: %d\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static int ad714x_spi_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	struct ad714x_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	spi->bits_per_word = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	err = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	chip = ad714x_probe(&spi->dev, BUS_SPI, spi->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 			    ad714x_spi_read, ad714x_spi_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (IS_ERR(chip))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		return PTR_ERR(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	spi_set_drvdata(spi, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct spi_driver ad714x_spi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.name	= "ad714x_captouch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		.pm	= &ad714x_spi_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.probe		= ad714x_spi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) module_spi_driver(ad714x_spi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MODULE_DESCRIPTION("Analog Devices AD714X Capacitance Touch Sensor SPI Bus Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MODULE_LICENSE("GPL");