^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Driver for the IMX SNVS ON/OFF Power Key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Copyright (C) 2015 Freescale Semiconductor, Inc. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pm_wakeirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SNVS_HPVIDR1_REG 0xF8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SNVS_LPSR_REG 0x4C /* LP Status Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SNVS_LPCR_REG 0x38 /* LP Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SNVS_HPSR_REG 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SNVS_HPSR_BTN BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SNVS_LPSR_SPO BIT(18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SNVS_LPCR_DEP_EN BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DEBOUNCE_TIME 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REPEAT_INTERVAL 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct pwrkey_drv_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct regmap *snvs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int keystate; /* 1:pressed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int wakeup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct timer_list check_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u8 minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static void imx_imx_snvs_check_for_events(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct pwrkey_drv_data *pdata = from_timer(pdata, t, check_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct input_dev *input = pdata->input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) regmap_read(pdata->snvs, SNVS_HPSR_REG, &state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) state = state & SNVS_HPSR_BTN ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* only report new event if status changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (state ^ pdata->keystate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) pdata->keystate = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) input_event(input, EV_KEY, pdata->keycode, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) input_sync(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) pm_relax(pdata->input->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* repeat check if pressed long */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) mod_timer(&pdata->check_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) jiffies + msecs_to_jiffies(REPEAT_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct platform_device *pdev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct pwrkey_drv_data *pdata = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct input_dev *input = pdata->input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 lp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) pm_wakeup_event(input->dev.parent, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (lp_status & SNVS_LPSR_SPO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) if (pdata->minor_rev == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * The first generation i.MX6 SoCs only sends an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * interrupt on button release. To mimic power-key
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * usage, we'll prepend a press event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) input_report_key(input, pdata->keycode, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) input_sync(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) input_report_key(input, pdata->keycode, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) input_sync(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pm_relax(input->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) mod_timer(&pdata->check_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) jiffies + msecs_to_jiffies(DEBOUNCE_TIME));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* clear SPO status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static void imx_snvs_pwrkey_disable_clk(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) clk_disable_unprepare(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static void imx_snvs_pwrkey_act(void *pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct pwrkey_drv_data *pd = pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) del_timer_sync(&pd->check_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static int imx_snvs_pwrkey_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct pwrkey_drv_data *pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u32 vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* Get SNVS register Page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) np = pdev->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pdata->snvs = syscon_regmap_lookup_by_phandle(np, "regmap");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (IS_ERR(pdata->snvs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_err(&pdev->dev, "Can't get snvs syscon\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return PTR_ERR(pdata->snvs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (of_property_read_u32(np, "linux,keycode", &pdata->keycode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pdata->keycode = KEY_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) dev_warn(&pdev->dev, "KEY_POWER without setting in dts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) clk = devm_clk_get_optional(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) dev_err(&pdev->dev, "Failed to get snvs clock (%pe)\n", clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return PTR_ERR(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) error = clk_prepare_enable(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) dev_err(&pdev->dev, "Failed to enable snvs clock (%pe)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ERR_PTR(error));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) error = devm_add_action_or_reset(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) imx_snvs_pwrkey_disable_clk, clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) "Failed to register clock cleanup handler (%pe)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ERR_PTR(error));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pdata->wakeup = of_property_read_bool(np, "wakeup-source");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pdata->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) if (pdata->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pdata->minor_rev = vid & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) regmap_update_bits(pdata->snvs, SNVS_LPCR_REG, SNVS_LPCR_DEP_EN, SNVS_LPCR_DEP_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* clear the unexpected interrupt before driver ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) timer_setup(&pdata->check_timer, imx_imx_snvs_check_for_events, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) input = devm_input_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (!input) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) dev_err(&pdev->dev, "failed to allocate the input device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) input->name = pdev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) input->phys = "snvs-pwrkey/input0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) input->id.bustype = BUS_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) input_set_capability(input, EV_KEY, pdata->keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* input customer action to cancel release timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) error = devm_add_action(&pdev->dev, imx_snvs_pwrkey_act, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dev_err(&pdev->dev, "failed to register remove action\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) pdata->input = input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) platform_set_drvdata(pdev, pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) error = devm_request_irq(&pdev->dev, pdata->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) imx_snvs_pwrkey_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0, pdev->name, pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) dev_err(&pdev->dev, "interrupt not available.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) error = input_register_device(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (error < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev_err(&pdev->dev, "failed to register input device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) device_init_wakeup(&pdev->dev, pdata->wakeup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) error = dev_pm_set_wake_irq(&pdev->dev, pdata->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) dev_err(&pdev->dev, "irq wake enable failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const struct of_device_id imx_snvs_pwrkey_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) { .compatible = "fsl,sec-v4.0-pwrkey" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) { /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) MODULE_DEVICE_TABLE(of, imx_snvs_pwrkey_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static struct platform_driver imx_snvs_pwrkey_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .name = "snvs_pwrkey",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .of_match_table = imx_snvs_pwrkey_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .probe = imx_snvs_pwrkey_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) module_platform_driver(imx_snvs_pwrkey_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) MODULE_AUTHOR("Freescale Semiconductor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MODULE_DESCRIPTION("i.MX snvs power key Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) MODULE_LICENSE("GPL");