^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Microchip AT42QT1050 QTouch Sensor Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Base on AT42QT1070 driver by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Bo Shen <voice.shen@atmel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2011 Atmel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/log2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Chip ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define QT1050_CHIP_ID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define QT1050_CHIP_ID_VER 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Firmware version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define QT1050_FW_VERSION 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Detection status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define QT1050_DET_STATUS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Key status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define QT1050_KEY_STATUS 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Key Signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define QT1050_KEY_SIGNAL_0_MSB 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define QT1050_KEY_SIGNAL_0_LSB 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define QT1050_KEY_SIGNAL_1_MSB 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define QT1050_KEY_SIGNAL_1_LSB 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define QT1050_KEY_SIGNAL_2_MSB 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define QT1050_KEY_SIGNAL_2_LSB 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define QT1050_KEY_SIGNAL_3_MSB 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define QT1050_KEY_SIGNAL_3_LSB 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define QT1050_KEY_SIGNAL_4_MSB 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define QT1050_KEY_SIGNAL_4_LSB 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* Reference data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define QT1050_REF_DATA_0_MSB 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define QT1050_REF_DATA_0_LSB 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define QT1050_REF_DATA_1_MSB 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define QT1050_REF_DATA_1_LSB 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define QT1050_REF_DATA_2_MSB 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define QT1050_REF_DATA_2_LSB 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define QT1050_REF_DATA_3_MSB 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define QT1050_REF_DATA_3_LSB 0x1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define QT1050_REF_DATA_4_MSB 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define QT1050_REF_DATA_4_LSB 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Negative threshold level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define QT1050_NTHR_0 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define QT1050_NTHR_1 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define QT1050_NTHR_2 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define QT1050_NTHR_3 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define QT1050_NTHR_4 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Pulse / Scale */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define QT1050_PULSE_SCALE_0 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define QT1050_PULSE_SCALE_1 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define QT1050_PULSE_SCALE_2 0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define QT1050_PULSE_SCALE_3 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define QT1050_PULSE_SCALE_4 0x2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Detection integrator counter / AKS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define QT1050_DI_AKS_0 0x2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define QT1050_DI_AKS_1 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define QT1050_DI_AKS_2 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define QT1050_DI_AKS_3 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define QT1050_DI_AKS_4 0x34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Charge Share Delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define QT1050_CSD_0 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define QT1050_CSD_1 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define QT1050_CSD_2 0x39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define QT1050_CSD_3 0x3a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define QT1050_CSD_4 0x3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Low Power Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define QT1050_LPMODE 0x3d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Calibration and Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define QT1050_RES_CAL 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define QT1050_RES_CAL_RESET BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define QT1050_RES_CAL_CALIBRATE BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define QT1050_MAX_KEYS 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define QT1050_RESET_TIME 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct qt1050_key_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned int nthr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned int pulse_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int di_aks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int csd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct qt1050_key {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u32 num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u32 charge_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 thr_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 samples;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct qt1050_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct qt1050_key keys[QT1050_MAX_KEYS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned short keycodes[QT1050_MAX_KEYS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 reg_keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u8 last_keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static const struct qt1050_key_regs qt1050_key_regs_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .nthr = QT1050_NTHR_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .pulse_scale = QT1050_PULSE_SCALE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .di_aks = QT1050_DI_AKS_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .csd = QT1050_CSD_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .nthr = QT1050_NTHR_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .pulse_scale = QT1050_PULSE_SCALE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .di_aks = QT1050_DI_AKS_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .csd = QT1050_CSD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .nthr = QT1050_NTHR_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .pulse_scale = QT1050_PULSE_SCALE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .di_aks = QT1050_DI_AKS_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .csd = QT1050_CSD_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .nthr = QT1050_NTHR_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .pulse_scale = QT1050_PULSE_SCALE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .di_aks = QT1050_DI_AKS_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .csd = QT1050_CSD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .nthr = QT1050_NTHR_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .pulse_scale = QT1050_PULSE_SCALE_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .di_aks = QT1050_DI_AKS_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .csd = QT1050_CSD_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static bool qt1050_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) case QT1050_DET_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) case QT1050_KEY_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) case QT1050_KEY_SIGNAL_0_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case QT1050_KEY_SIGNAL_0_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) case QT1050_KEY_SIGNAL_1_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) case QT1050_KEY_SIGNAL_1_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) case QT1050_KEY_SIGNAL_2_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case QT1050_KEY_SIGNAL_2_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case QT1050_KEY_SIGNAL_3_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) case QT1050_KEY_SIGNAL_3_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) case QT1050_KEY_SIGNAL_4_MSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case QT1050_KEY_SIGNAL_4_LSB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct regmap_range qt1050_readable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) regmap_reg_range(QT1050_CHIP_ID, QT1050_KEY_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) regmap_reg_range(QT1050_KEY_SIGNAL_0_MSB, QT1050_KEY_SIGNAL_1_LSB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) regmap_reg_range(QT1050_KEY_SIGNAL_2_MSB, QT1050_KEY_SIGNAL_4_LSB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) regmap_reg_range(QT1050_REF_DATA_0_MSB, QT1050_REF_DATA_1_LSB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) regmap_reg_range(QT1050_REF_DATA_2_MSB, QT1050_REF_DATA_4_LSB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) regmap_reg_range(QT1050_NTHR_0, QT1050_NTHR_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) regmap_reg_range(QT1050_NTHR_2, QT1050_NTHR_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) regmap_reg_range(QT1050_PULSE_SCALE_0, QT1050_PULSE_SCALE_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) regmap_reg_range(QT1050_PULSE_SCALE_2, QT1050_PULSE_SCALE_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) regmap_reg_range(QT1050_DI_AKS_0, QT1050_DI_AKS_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) regmap_reg_range(QT1050_DI_AKS_2, QT1050_DI_AKS_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) regmap_reg_range(QT1050_CSD_0, QT1050_CSD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) regmap_reg_range(QT1050_CSD_2, QT1050_RES_CAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const struct regmap_access_table qt1050_readable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .yes_ranges = qt1050_readable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .n_yes_ranges = ARRAY_SIZE(qt1050_readable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static const struct regmap_range qt1050_writeable_ranges[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) regmap_reg_range(QT1050_NTHR_0, QT1050_NTHR_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) regmap_reg_range(QT1050_NTHR_2, QT1050_NTHR_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) regmap_reg_range(QT1050_PULSE_SCALE_0, QT1050_PULSE_SCALE_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) regmap_reg_range(QT1050_PULSE_SCALE_2, QT1050_PULSE_SCALE_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) regmap_reg_range(QT1050_DI_AKS_0, QT1050_DI_AKS_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) regmap_reg_range(QT1050_DI_AKS_2, QT1050_DI_AKS_4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) regmap_reg_range(QT1050_CSD_0, QT1050_CSD_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) regmap_reg_range(QT1050_CSD_2, QT1050_RES_CAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct regmap_access_table qt1050_writeable_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .yes_ranges = qt1050_writeable_ranges,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .n_yes_ranges = ARRAY_SIZE(qt1050_writeable_ranges),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static struct regmap_config qt1050_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .max_register = QT1050_RES_CAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .wr_table = &qt1050_writeable_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .rd_table = &qt1050_readable_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .volatile_reg = qt1050_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static bool qt1050_identify(struct qt1050_priv *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* Read Chip ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) regmap_read(ts->regmap, QT1050_CHIP_ID, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (val != QT1050_CHIP_ID_VER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_err(&ts->client->dev, "ID %d not supported\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Read firmware version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) err = regmap_read(ts->regmap, QT1050_FW_VERSION, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) dev_err(&ts->client->dev, "could not read the firmware version\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) dev_info(&ts->client->dev, "AT42QT1050 firmware version %1d.%1d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) val >> 4, val & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static irqreturn_t qt1050_irq_threaded(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct qt1050_priv *ts = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct input_dev *input = ts->input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) unsigned long new_keys, changed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* Read the detected status register, thus clearing interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) err = regmap_read(ts->regmap, QT1050_DET_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dev_err(&ts->client->dev, "Fail to read detection status: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /* Read which key changed, keys are not continuous */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) err = regmap_read(ts->regmap, QT1050_KEY_STATUS, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) dev_err(&ts->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) "Fail to determine the key status: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) new_keys = (val & 0x70) >> 2 | (val & 0x6) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) changed = ts->last_keys ^ new_keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /* Report registered keys only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) changed &= ts->reg_keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) for_each_set_bit(i, &changed, QT1050_MAX_KEYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) input_report_key(input, ts->keys[i].keycode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) test_bit(i, &new_keys));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ts->last_keys = new_keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) input_sync(input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static const struct qt1050_key_regs *qt1050_get_key_regs(int key_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return &qt1050_key_regs_data[key_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static int qt1050_set_key(struct regmap *map, int number, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) const struct qt1050_key_regs *key_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) key_regs = qt1050_get_key_regs(number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return regmap_update_bits(map, key_regs->di_aks, 0xfc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) on ? BIT(4) : 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static int qt1050_apply_fw_data(struct qt1050_priv *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct regmap *map = ts->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) struct qt1050_key *button = &ts->keys[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) const struct qt1050_key_regs *key_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Disable all keys and enable only the specified ones */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) for (i = 0; i < QT1050_MAX_KEYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) err = qt1050_set_key(map, i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) for (i = 0; i < QT1050_MAX_KEYS; i++, button++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* Keep KEY_RESERVED keys off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (button->keycode == KEY_RESERVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) err = qt1050_set_key(map, button->num, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) key_regs = qt1050_get_key_regs(button->num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) err = regmap_write(map, key_regs->pulse_scale,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) (button->samples << 4) | (button->scale));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) err = regmap_write(map, key_regs->csd, button->charge_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) err = regmap_write(map, key_regs->nthr, button->thr_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static int qt1050_parse_fw(struct qt1050_priv *ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct device *dev = &ts->client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct fwnode_handle *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) int nbuttons;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) nbuttons = device_get_child_node_count(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (nbuttons == 0 || nbuttons > QT1050_MAX_KEYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) device_for_each_child_node(dev, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) struct qt1050_key button;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* Required properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (fwnode_property_read_u32(child, "linux,code",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) &button.keycode)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dev_err(dev, "Button without keycode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (button.keycode >= KEY_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) dev_err(dev, "Invalid keycode 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) button.keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (fwnode_property_read_u32(child, "reg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) &button.num)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev_err(dev, "Button without pad number\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (button.num < 0 || button.num > QT1050_MAX_KEYS - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ts->reg_keys |= BIT(button.num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* Optional properties */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (fwnode_property_read_u32(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) "microchip,pre-charge-time-ns",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) &button.charge_delay)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) button.charge_delay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (button.charge_delay % 2500 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) button.charge_delay =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) button.charge_delay / 2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) button.charge_delay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (fwnode_property_read_u32(child, "microchip,average-samples",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) &button.samples)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) button.samples = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (is_power_of_2(button.samples))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) button.samples = ilog2(button.samples);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) button.samples = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (fwnode_property_read_u32(child, "microchip,average-scaling",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) &button.scale)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) button.scale = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (is_power_of_2(button.scale))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) button.scale = ilog2(button.scale);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) button.scale = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (fwnode_property_read_u32(child, "microchip,threshold",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) &button.thr_cnt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) button.thr_cnt = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (button.thr_cnt > 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) button.thr_cnt = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ts->keys[button.num] = button;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) fwnode_handle_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static int qt1050_probe(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct qt1050_priv *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct input_dev *input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct device *dev = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) unsigned int status, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* Check basic functionality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) err = i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev_err(&client->dev, "%s adapter not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) dev_driver_string(&client->adapter->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (!client->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) dev_err(dev, "assign a irq line to this device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (!ts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) input = devm_input_allocate_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (!input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) map = devm_regmap_init_i2c(client, &qt1050_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (IS_ERR(map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return PTR_ERR(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ts->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) ts->input = input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ts->regmap = map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) i2c_set_clientdata(client, ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* Identify the qt1050 chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (!qt1050_identify(ts))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* Get pdata */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) err = qt1050_parse_fw(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) dev_err(dev, "Failed to parse firmware: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) input->name = "AT42QT1050 QTouch Sensor";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) input->dev.parent = &client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) input->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /* Add the keycode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) input->keycode = ts->keycodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) input->keycodesize = sizeof(ts->keycodes[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) input->keycodemax = QT1050_MAX_KEYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) __set_bit(EV_KEY, input->evbit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) for (i = 0; i < QT1050_MAX_KEYS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) ts->keycodes[i] = ts->keys[i].keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) __set_bit(ts->keycodes[i], input->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* Trigger re-calibration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) err = regmap_update_bits(ts->regmap, QT1050_RES_CAL, 0x7f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) QT1050_RES_CAL_CALIBRATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) dev_err(dev, "Trigger calibration failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) err = regmap_read_poll_timeout(ts->regmap, QT1050_DET_STATUS, status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) status >> 7 == 1, 10000, 200000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) dev_err(dev, "Calibration failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* Soft reset to set defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) err = regmap_update_bits(ts->regmap, QT1050_RES_CAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) QT1050_RES_CAL_RESET, QT1050_RES_CAL_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) dev_err(dev, "Trigger soft reset failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) msleep(QT1050_RESET_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* Set pdata */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) err = qt1050_apply_fw_data(ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) dev_err(dev, "Failed to set firmware data: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) err = devm_request_threaded_irq(dev, client->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) qt1050_irq_threaded, IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) "qt1050", ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) dev_err(&client->dev, "Failed to request irq: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* Clear #CHANGE line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) err = regmap_read(ts->regmap, QT1050_DET_STATUS, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) dev_err(dev, "Failed to clear #CHANGE line level: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /* Register the input device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) err = input_register_device(ts->input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) dev_err(&client->dev, "Failed to register input device: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) static int __maybe_unused qt1050_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct qt1050_priv *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * Set measurement interval to 1s (125 x 8ms) if wakeup is allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * else turn off. The 1s interval seems to be a good compromise between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * low power and response time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return regmap_write(ts->regmap, QT1050_LPMODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) device_may_wakeup(dev) ? 125 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static int __maybe_unused qt1050_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) struct qt1050_priv *ts = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* Set measurement interval back to 16ms (2 x 8ms) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return regmap_write(ts->regmap, QT1050_LPMODE, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static SIMPLE_DEV_PM_OPS(qt1050_pm_ops, qt1050_suspend, qt1050_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static const struct of_device_id __maybe_unused qt1050_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) { .compatible = "microchip,qt1050", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) MODULE_DEVICE_TABLE(of, qt1050_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static struct i2c_driver qt1050_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .name = "qt1050",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .of_match_table = of_match_ptr(qt1050_of_match),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .pm = &qt1050_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .probe_new = qt1050_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) module_i2c_driver(qt1050_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) MODULE_DESCRIPTION("Driver for AT42QT1050 QTouch sensor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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