^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2017 MediaTek, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Chen Zhong <chen.zhong@mediatek.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/mt6323/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mfd/mt6397/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mfd/mt6397/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MTK_PMIC_RST_DU_MASK 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MTK_PMIC_RST_DU_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MTK_PMIC_PWRKEY_RST \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MTK_PMIC_HOMEKEY_RST \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MTK_PMIC_PWRKEY_INDEX 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MTK_PMIC_HOMEKEY_INDEX 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MTK_PMIC_MAX_KEY_COUNT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct mtk_pmic_keys_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 deb_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 deb_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 intsel_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u32 intsel_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) _intsel_reg, _intsel_mask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .deb_reg = _deb_reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .deb_mask = _deb_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .intsel_reg = _intsel_reg, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .intsel_mask = _intsel_mask, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct mtk_pmic_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 pmic_rst_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static const struct mtk_pmic_regs mt6397_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 0x8, MT6397_INT_RSV, 0x10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 0x10, MT6397_INT_RSV, 0x8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .pmic_rst_reg = MT6397_TOP_RST_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const struct mtk_pmic_regs mt6323_regs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 0x2, MT6323_INT_MISC_CON, 0x10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x4, MT6323_INT_MISC_CON, 0x8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .pmic_rst_reg = MT6323_TOP_RST_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct mtk_pmic_keys_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct mtk_pmic_keys *keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) const struct mtk_pmic_keys_regs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int keycode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) bool wakeup:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct mtk_pmic_keys {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct input_dev *input_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum mtk_pmic_keys_lp_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) LP_DISABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) LP_ONEKEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) LP_TWOKEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) u32 pmic_rst_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u32 long_press_mode, long_press_debounce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = of_property_read_u32(keys->dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "power-off-time-sec", &long_press_debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) long_press_debounce = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) long_press_debounce << MTK_PMIC_RST_DU_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = of_property_read_u32(keys->dev->of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) "mediatek,long-press-mode", &long_press_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) long_press_mode = LP_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) switch (long_press_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) case LP_ONEKEY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MTK_PMIC_PWRKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MTK_PMIC_PWRKEY_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MTK_PMIC_HOMEKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) case LP_TWOKEY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) MTK_PMIC_PWRKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) MTK_PMIC_PWRKEY_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) MTK_PMIC_HOMEKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) MTK_PMIC_HOMEKEY_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) case LP_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MTK_PMIC_PWRKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) regmap_update_bits(keys->regmap, pmic_rst_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MTK_PMIC_HOMEKEY_RST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct mtk_pmic_keys_info *info = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) u32 key_deb, pressed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) key_deb &= info->regs->deb_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pressed = !key_deb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) input_report_key(info->keys->input_dev, info->keycode, pressed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) input_sync(info->keys->input_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pressed ? "pressed" : "released", info->keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct mtk_pmic_keys_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) info->keys = keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) info->regs->intsel_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) info->regs->intsel_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mtk_pmic_keys_irq_handler_thread,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "mtk-pmic-keys", info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) info->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) input_set_capability(keys->input_dev, EV_KEY, info->keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (keys->keys[index].wakeup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) enable_irq_wake(keys->keys[index].irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (keys->keys[index].wakeup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) disable_irq_wake(keys->keys[index].irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) mtk_pmic_keys_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .compatible = "mediatek,mt6397-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .data = &mt6397_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .compatible = "mediatek,mt6323-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .data = &mt6323_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* sentinel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int mtk_pmic_keys_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int error, index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) unsigned int keycount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct device_node *node = pdev->dev.of_node, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) struct mtk_pmic_keys *keys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) const struct mtk_pmic_regs *mtk_pmic_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct input_dev *input_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) const struct of_device_id *of_id =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (!keys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) keys->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) keys->regmap = pmic_chip->regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) mtk_pmic_regs = of_id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (!input_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dev_err(keys->dev, "input allocate device fail.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) input_dev->name = "mtk-pmic-keys";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) input_dev->id.bustype = BUS_HOST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) input_dev->id.vendor = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) input_dev->id.product = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) input_dev->id.version = 0x0001;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) keycount = of_get_available_child_count(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (keycount > MTK_PMIC_MAX_KEY_COUNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) for_each_child_of_node(node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) keys->keys[index].irq = platform_get_irq(pdev, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (keys->keys[index].irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return keys->keys[index].irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) error = of_property_read_u32(child,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) "linux,keycodes", &keys->keys[index].keycode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) dev_err(keys->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) "failed to read key:%d linux,keycode property: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) index, error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (of_property_read_bool(child, "wakeup-source"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) keys->keys[index].wakeup = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) error = mtk_pmic_key_setup(keys, &keys->keys[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) error = input_register_device(input_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) "register input device failed (%d)\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) platform_set_drvdata(pdev, keys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static struct platform_driver pmic_keys_pdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .probe = mtk_pmic_keys_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .name = "mtk-pmic-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .of_match_table = of_mtk_pmic_keys_match_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .pm = &mtk_pmic_keys_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) module_platform_driver(pmic_keys_pdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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