^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/i2c/chips/lm8323.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007-2009 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Written by Daniel Stone <daniel.stone@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Timo O. Karjalainen <timo.o.karjalainen@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Updated by Felipe Balbi <felipe.balbi@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/lm8323.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Commands to send to the chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define LM8323_CMD_READ_ID 0x80 /* Read chip ID. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define LM8323_CMD_WRITE_CFG 0x81 /* Set configuration item. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define LM8323_CMD_READ_INT 0x82 /* Get interrupt status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define LM8323_CMD_RESET 0x83 /* Reset, same as external one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define LM8323_CMD_WRITE_PORT_SEL 0x85 /* Set GPIO in/out. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LM8323_CMD_WRITE_PORT_STATE 0x86 /* Set GPIO pullup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LM8323_CMD_READ_PORT_SEL 0x87 /* Get GPIO in/out. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LM8323_CMD_READ_PORT_STATE 0x88 /* Get GPIO pullup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LM8323_CMD_READ_FIFO 0x89 /* Read byte from FIFO. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LM8323_CMD_RPT_READ_FIFO 0x8a /* Read FIFO (no increment). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LM8323_CMD_SET_ACTIVE 0x8b /* Set active time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LM8323_CMD_READ_ERR 0x8c /* Get error status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LM8323_CMD_READ_ROTATOR 0x8e /* Read rotator status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LM8323_CMD_SET_DEBOUNCE 0x8f /* Set debouncing time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define LM8323_CMD_SET_KEY_SIZE 0x90 /* Set keypad size. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define LM8323_CMD_READ_KEY_SIZE 0x91 /* Get keypad size. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LM8323_CMD_READ_CFG 0x92 /* Get configuration item. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LM8323_CMD_WRITE_CLOCK 0x93 /* Set clock config. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LM8323_CMD_READ_CLOCK 0x94 /* Get clock config. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define LM8323_CMD_PWM_WRITE 0x95 /* Write PWM script. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LM8323_CMD_START_PWM 0x96 /* Start PWM engine. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LM8323_CMD_STOP_PWM 0x97 /* Stop PWM engine. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Interrupt status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define INT_KEYPAD 0x01 /* Key event. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define INT_ROTATOR 0x02 /* Rotator event. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define INT_ERROR 0x08 /* Error: use CMD_READ_ERR. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define INT_NOINIT 0x10 /* Lost configuration. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define INT_PWM1 0x20 /* PWM1 stopped. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define INT_PWM2 0x40 /* PWM2 stopped. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define INT_PWM3 0x80 /* PWM3 stopped. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Errors (signalled by INT_ERROR, read with CMD_READ_ERR). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define ERR_BADPAR 0x01 /* Bad parameter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ERR_CMDUNK 0x02 /* Unknown command. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define ERR_KEYOVR 0x04 /* Too many keys pressed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ERR_FIFOOVER 0x40 /* FIFO overflow. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Configuration keys (CMD_{WRITE,READ}_CFG). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define CFG_MUX1SEL 0x01 /* Select MUX1_OUT input. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define CFG_MUX1EN 0x02 /* Enable MUX1_OUT. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CFG_MUX2SEL 0x04 /* Select MUX2_OUT input. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define CFG_MUX2EN 0x08 /* Enable MUX2_OUT. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define CFG_PSIZE 0x20 /* Package size (must be 0). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define CFG_ROTEN 0x40 /* Enable rotator. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Clock settings (CMD_{WRITE,READ}_CLOCK). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CLK_RCPWM_INTERNAL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define CLK_RCPWM_EXTERNAL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define CLK_SLOWCLKEN 0x08 /* Enable 32.768kHz clock. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define CLK_SLOWCLKOUT 0x40 /* Enable slow pulse output. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* The possible addresses corresponding to CONFIG1 and CONFIG2 pin wirings. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define LM8323_I2C_ADDR00 (0x84 >> 1) /* 1000 010x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define LM8323_I2C_ADDR01 (0x86 >> 1) /* 1000 011x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LM8323_I2C_ADDR10 (0x88 >> 1) /* 1000 100x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LM8323_I2C_ADDR11 (0x8A >> 1) /* 1000 101x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Key event fifo length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define LM8323_FIFO_LEN 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Commands for PWM engine; feed in with PWM_WRITE. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Load ramp counter from duty cycle field (range 0 - 0xff). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PWM_SET(v) (0x4000 | ((v) & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Go to start of script. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PWM_GOTOSTART 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * Stop engine (generates interrupt). If reset is 1, clear the program
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * counter, else leave it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PWM_END(reset) (0xc000 | (!!(reset) << 11))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Ramp. If s is 1, divide clock by 512, else divide clock by 16.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Take t clock scales (up to 63) per step, for n steps (up to 126).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * If u is set, ramp up, else ramp down.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define PWM_RAMP(s, t, n, u) ((!!(s) << 14) | ((t) & 0x3f) << 8 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ((n) & 0x7f) | ((u) ? 0 : 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * Loop (i.e. jump back to pos) for a given number of iterations (up to 63).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * If cnt is zero, execute until PWM_END is encountered.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define PWM_LOOP(cnt, pos) (0xa000 | (((cnt) & 0x3f) << 7) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ((pos) & 0x3f))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Wait for trigger. Argument is a mask of channels, shifted by the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * number, e.g. 0xa for channels 3 and 1. Note that channels are numbered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * from 1, not 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PWM_WAIT_TRIG(chans) (0xe000 | (((chans) & 0x7) << 6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* Send trigger. Argument is same as PWM_WAIT_TRIG. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define PWM_SEND_TRIG(chans) (0xe000 | ((chans) & 0x7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct lm8323_pwm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int fade_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int desired_brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) bool running;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* pwm lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct led_classdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct lm8323_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct lm8323_chip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* device lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct input_dev *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) bool kp_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) bool pm_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned keys_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) char phys[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned short keymap[LM8323_KEYMAP_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int size_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int size_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int debounce_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int active_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct lm8323_pwm pwm[LM8323_NUM_PWMS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define client_to_lm8323(c) container_of(c, struct lm8323_chip, client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define dev_to_lm8323(d) container_of(d, struct lm8323_chip, client->dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define cdev_to_pwm(c) container_of(c, struct lm8323_pwm, cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define work_to_pwm(w) container_of(w, struct lm8323_pwm, work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define LM8323_MAX_DATA 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * To write, we just access the chip's address in write mode, and dump the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * command and data out on the bus. The command byte and data are taken as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * sequential u8s out of varargs, to a maximum of LM8323_MAX_DATA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int lm8323_write(struct lm8323_chip *lm, int len, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) va_list ap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) u8 data[LM8323_MAX_DATA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) va_start(ap, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (unlikely(len > LM8323_MAX_DATA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) dev_err(&lm->client->dev, "tried to send %d bytes\n", len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) va_end(ap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) data[i] = va_arg(ap, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) va_end(ap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * If the host is asleep while we send the data, we can get a NACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * back while it wakes up, so try again, once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ret = i2c_master_send(lm->client, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (unlikely(ret == -EREMOTEIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ret = i2c_master_send(lm->client, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (unlikely(ret != len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dev_err(&lm->client->dev, "sent %d bytes of %d total\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * To read, we first send the command byte to the chip and end the transaction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * then access the chip in read mode, at which point it will send the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static int lm8323_read(struct lm8323_chip *lm, u8 cmd, u8 *buf, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * If the host is asleep while we send the byte, we can get a NACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * back while it wakes up, so try again, once.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ret = i2c_master_send(lm->client, &cmd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (unlikely(ret == -EREMOTEIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ret = i2c_master_send(lm->client, &cmd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (unlikely(ret != 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) dev_err(&lm->client->dev, "sending read cmd 0x%02x failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) ret = i2c_master_recv(lm->client, buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (unlikely(ret != len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) dev_err(&lm->client->dev, "wanted %d bytes, got %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) len, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * Set the chip active time (idle time before it enters halt).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static void lm8323_set_active_time(struct lm8323_chip *lm, int time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) lm8323_write(lm, 2, LM8323_CMD_SET_ACTIVE, time >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * The signals are AT-style: the low 7 bits are the keycode, and the top
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * bit indicates the state (1 for down, 0 for up).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static inline u8 lm8323_whichkey(u8 event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return event & 0x7f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static inline int lm8323_ispress(u8 event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return (event & 0x80) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static void process_keys(struct lm8323_chip *lm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u8 event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) u8 key_fifo[LM8323_FIFO_LEN + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int old_keys_down = lm->keys_down;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * Read all key events from the FIFO at once. Next READ_FIFO clears the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * FIFO even if we didn't read all events previously.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ret = lm8323_read(lm, LM8323_CMD_READ_FIFO, key_fifo, LM8323_FIFO_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dev_err(&lm->client->dev, "Failed reading fifo \n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) key_fifo[ret] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) while ((event = key_fifo[i++])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u8 key = lm8323_whichkey(event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int isdown = lm8323_ispress(event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) unsigned short keycode = lm->keymap[key];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) dev_vdbg(&lm->client->dev, "key 0x%02x %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) key, isdown ? "down" : "up");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (lm->kp_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) input_event(lm->idev, EV_MSC, MSC_SCAN, key);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) input_report_key(lm->idev, keycode, isdown);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) input_sync(lm->idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (isdown)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) lm->keys_down++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) lm->keys_down--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * Errata: We need to ensure that the chip never enters halt mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * during a keypress, so set active time to 0. When it's released,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * we can enter halt again, so set the active time back to normal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!old_keys_down && lm->keys_down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) lm8323_set_active_time(lm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (old_keys_down && !lm->keys_down)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) lm8323_set_active_time(lm, lm->active_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static void lm8323_process_error(struct lm8323_chip *lm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u8 error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (lm8323_read(lm, LM8323_CMD_READ_ERR, &error, 1) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (error & ERR_FIFOOVER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dev_vdbg(&lm->client->dev, "fifo overflow!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (error & ERR_KEYOVR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_vdbg(&lm->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) "more than two keys pressed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (error & ERR_CMDUNK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev_vdbg(&lm->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) "unknown command submitted\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (error & ERR_BADPAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) dev_vdbg(&lm->client->dev, "bad command parameter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static void lm8323_reset(struct lm8323_chip *lm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* The docs say we must pass 0xAA as the data byte. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) lm8323_write(lm, 2, LM8323_CMD_RESET, 0xAA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int lm8323_configure(struct lm8323_chip *lm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) int keysize = (lm->size_x << 4) | lm->size_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int clock = (CLK_SLOWCLKEN | CLK_RCPWM_EXTERNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) int debounce = lm->debounce_time >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int active = lm->active_time >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * Active time must be greater than the debounce time: if it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * a close-run thing, give ourselves a 12ms buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (debounce >= active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) active = debounce + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) lm8323_write(lm, 2, LM8323_CMD_WRITE_CFG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) lm8323_write(lm, 2, LM8323_CMD_WRITE_CLOCK, clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) lm8323_write(lm, 2, LM8323_CMD_SET_KEY_SIZE, keysize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) lm8323_set_active_time(lm, lm->active_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) lm8323_write(lm, 2, LM8323_CMD_SET_DEBOUNCE, debounce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) lm8323_write(lm, 3, LM8323_CMD_WRITE_PORT_STATE, 0xff, 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) lm8323_write(lm, 3, LM8323_CMD_WRITE_PORT_SEL, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Not much we can do about errors at this point, so just hope
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * for the best.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static void pwm_done(struct lm8323_pwm *pwm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) mutex_lock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) pwm->running = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (pwm->desired_brightness != pwm->brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) schedule_work(&pwm->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) mutex_unlock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * Bottom half: handle the interrupt by posting key events, or dealing with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * errors appropriately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static irqreturn_t lm8323_irq(int irq, void *_lm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) struct lm8323_chip *lm = _lm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) u8 ints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) mutex_lock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) while ((lm8323_read(lm, LM8323_CMD_READ_INT, &ints, 1) == 1) && ints) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (likely(ints & INT_KEYPAD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) process_keys(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (ints & INT_ROTATOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* We don't currently support the rotator. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dev_vdbg(&lm->client->dev, "rotator fired\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ints & INT_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dev_vdbg(&lm->client->dev, "error!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) lm8323_process_error(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (ints & INT_NOINIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) dev_err(&lm->client->dev, "chip lost config; "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) "reinitialising\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) lm8323_configure(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) for (i = 0; i < LM8323_NUM_PWMS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (ints & (INT_PWM1 << i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev_vdbg(&lm->client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) "pwm%d engine completed\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) pwm_done(&lm->pwm[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) mutex_unlock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * Read the chip ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static int lm8323_read_id(struct lm8323_chip *lm, u8 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) int bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) bytes = lm8323_read(lm, LM8323_CMD_READ_ID, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (unlikely(bytes != 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static void lm8323_write_pwm_one(struct lm8323_pwm *pwm, int pos, u16 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) lm8323_write(pwm->chip, 4, LM8323_CMD_PWM_WRITE, (pos << 2) | pwm->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) (cmd & 0xff00) >> 8, cmd & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) * Write a script into a given PWM engine, concluding with PWM_END.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * If 'kill' is nonzero, the engine will be shut down at the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * of the script, producing a zero output. Otherwise the engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * will be kept running at the final PWM level indefinitely.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static void lm8323_write_pwm(struct lm8323_pwm *pwm, int kill,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int len, const u16 *cmds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) lm8323_write_pwm_one(pwm, i, cmds[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) lm8323_write_pwm_one(pwm, i++, PWM_END(kill));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) lm8323_write(pwm->chip, 2, LM8323_CMD_START_PWM, pwm->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) pwm->running = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static void lm8323_pwm_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct lm8323_pwm *pwm = work_to_pwm(work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int div512, perstep, steps, hz, up, kill;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) u16 pwm_cmds[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) int num_cmds = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) mutex_lock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * Do nothing if we're already at the requested level,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * or previous setting is not yet complete. In the latter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * case we will be called again when the previous PWM script
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * finishes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (pwm->running || pwm->desired_brightness == pwm->brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) kill = (pwm->desired_brightness == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) up = (pwm->desired_brightness > pwm->brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) steps = abs(pwm->desired_brightness - pwm->brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * Convert time (in ms) into a divisor (512 or 16 on a refclk of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * 32768Hz), and number of ticks per step.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if ((pwm->fade_time / steps) > (32768 / 512)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) div512 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) hz = 32768 / 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) div512 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) hz = 32768 / 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) perstep = (hz * pwm->fade_time) / (steps * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (perstep == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) perstep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) else if (perstep > 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) perstep = 63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) while (steps) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) int s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) s = min(126, steps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) pwm_cmds[num_cmds++] = PWM_RAMP(div512, perstep, s, up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) steps -= s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) lm8323_write_pwm(pwm, kill, num_cmds, pwm_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) pwm->brightness = pwm->desired_brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) mutex_unlock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static void lm8323_pwm_set_brightness(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct lm8323_chip *lm = pwm->chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) mutex_lock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) pwm->desired_brightness = brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) mutex_unlock(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (in_interrupt()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) schedule_work(&pwm->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * Schedule PWM work as usual unless we are going into suspend
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) mutex_lock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (likely(!lm->pm_suspend))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) schedule_work(&pwm->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) lm8323_pwm_work(&pwm->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) mutex_unlock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static ssize_t lm8323_pwm_show_time(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct led_classdev *led_cdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) return sprintf(buf, "%d\n", pwm->fade_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static ssize_t lm8323_pwm_store_time(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct device_attribute *attr, const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct led_classdev *led_cdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct lm8323_pwm *pwm = cdev_to_pwm(led_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) int ret, time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) ret = kstrtoint(buf, 10, &time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /* Numbers only, please. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) pwm->fade_time = time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return strlen(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static DEVICE_ATTR(time, 0644, lm8323_pwm_show_time, lm8323_pwm_store_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static struct attribute *lm8323_pwm_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) &dev_attr_time.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ATTRIBUTE_GROUPS(lm8323_pwm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static int init_pwm(struct lm8323_chip *lm, int id, struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) struct lm8323_pwm *pwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) BUG_ON(id > 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) pwm = &lm->pwm[id - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) pwm->id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) pwm->fade_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) pwm->brightness = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) pwm->desired_brightness = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pwm->running = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) pwm->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) INIT_WORK(&pwm->work, lm8323_pwm_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) mutex_init(&pwm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) pwm->chip = lm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (name) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) pwm->cdev.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) pwm->cdev.brightness_set = lm8323_pwm_set_brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) pwm->cdev.groups = lm8323_pwm_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (led_classdev_register(dev, &pwm->cdev) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) dev_err(dev, "couldn't register PWM %d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) pwm->enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) static struct i2c_driver lm8323_i2c_driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) static ssize_t lm8323_show_disable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct lm8323_chip *lm = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return sprintf(buf, "%u\n", !lm->kp_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static ssize_t lm8323_set_disable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) const char *buf, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) struct lm8323_chip *lm = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ret = kstrtouint(buf, 10, &i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) mutex_lock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) lm->kp_enabled = !i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) mutex_unlock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static DEVICE_ATTR(disable_kp, 0644, lm8323_show_disable, lm8323_set_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static int lm8323_probe(struct i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct lm8323_platform_data *pdata = dev_get_platdata(&client->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct input_dev *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) struct lm8323_chip *lm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) int pwm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) unsigned long tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) u8 data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (!pdata || !pdata->size_x || !pdata->size_y) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) dev_err(&client->dev, "missing platform_data\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if (pdata->size_x > 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) dev_err(&client->dev, "invalid x size %d specified\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) pdata->size_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) if (pdata->size_y > 12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) dev_err(&client->dev, "invalid y size %d specified\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) pdata->size_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) lm = kzalloc(sizeof *lm, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) idev = input_allocate_device();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if (!lm || !idev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) goto fail1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) lm->client = client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) lm->idev = idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) mutex_init(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) lm->size_x = pdata->size_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) lm->size_y = pdata->size_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) dev_vdbg(&client->dev, "Keypad size: %d x %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) lm->size_x, lm->size_y);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) lm->debounce_time = pdata->debounce_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) lm->active_time = pdata->active_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) lm8323_reset(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /* Nothing's set up to service the IRQ yet, so just spin for max.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * 100ms until we can configure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) tmo = jiffies + msecs_to_jiffies(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) while (lm8323_read(lm, LM8323_CMD_READ_INT, data, 1) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (data[0] & INT_NOINIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (time_after(jiffies, tmo)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) dev_err(&client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "timeout waiting for initialisation\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) lm8323_configure(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) /* If a true probe check the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) if (lm8323_read_id(lm, data) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) dev_err(&client->dev, "device not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) goto fail1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) for (pwm = 0; pwm < LM8323_NUM_PWMS; pwm++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) err = init_pwm(lm, pwm + 1, &client->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) pdata->pwm_names[pwm]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) goto fail2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) lm->kp_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) err = device_create_file(&client->dev, &dev_attr_disable_kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) goto fail2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) idev->name = pdata->name ? : "LM8323 keypad";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) snprintf(lm->phys, sizeof(lm->phys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) "%s/input-kp", dev_name(&client->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) idev->phys = lm->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) idev->evbit[0] = BIT(EV_KEY) | BIT(EV_MSC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) __set_bit(MSC_SCAN, idev->mscbit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) for (i = 0; i < LM8323_KEYMAP_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) __set_bit(pdata->keymap[i], idev->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) lm->keymap[i] = pdata->keymap[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) __clear_bit(KEY_RESERVED, idev->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) if (pdata->repeat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) __set_bit(EV_REP, idev->evbit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) err = input_register_device(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev_dbg(&client->dev, "error registering input device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) goto fail3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) err = request_threaded_irq(client->irq, NULL, lm8323_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) IRQF_TRIGGER_LOW|IRQF_ONESHOT, "lm8323", lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) dev_err(&client->dev, "could not get IRQ %d\n", client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) goto fail4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) i2c_set_clientdata(client, lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) device_init_wakeup(&client->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) enable_irq_wake(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) fail4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) input_unregister_device(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) idev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) fail3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) device_remove_file(&client->dev, &dev_attr_disable_kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) fail2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) while (--pwm >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (lm->pwm[pwm].enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) led_classdev_unregister(&lm->pwm[pwm].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) fail1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) input_free_device(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) kfree(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static int lm8323_remove(struct i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) struct lm8323_chip *lm = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) disable_irq_wake(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) free_irq(client->irq, lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) input_unregister_device(lm->idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) device_remove_file(&lm->client->dev, &dev_attr_disable_kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (lm->pwm[i].enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) led_classdev_unregister(&lm->pwm[i].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) kfree(lm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * We don't need to explicitly suspend the chip, as it already switches off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * when there's no activity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static int lm8323_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct lm8323_chip *lm = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) irq_set_irq_wake(client->irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) disable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) mutex_lock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) lm->pm_suspend = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) mutex_unlock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (lm->pwm[i].enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) led_classdev_suspend(&lm->pwm[i].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static int lm8323_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) struct i2c_client *client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) struct lm8323_chip *lm = i2c_get_clientdata(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) mutex_lock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) lm->pm_suspend = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) mutex_unlock(&lm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) for (i = 0; i < 3; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (lm->pwm[i].enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) led_classdev_resume(&lm->pwm[i].cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) enable_irq(client->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) irq_set_irq_wake(client->irq, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) static SIMPLE_DEV_PM_OPS(lm8323_pm_ops, lm8323_suspend, lm8323_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static const struct i2c_device_id lm8323_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) { "lm8323", 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static struct i2c_driver lm8323_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .name = "lm8323",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .pm = &lm8323_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .probe = lm8323_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .remove = lm8323_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .id_table = lm8323_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) MODULE_DEVICE_TABLE(i2c, lm8323_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) module_i2c_driver(lm8323_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) MODULE_AUTHOR("Timo O. Karjalainen <timo.o.karjalainen@nokia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) MODULE_AUTHOR("Daniel Stone");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) MODULE_AUTHOR("Felipe Balbi <felipe.balbi@nokia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) MODULE_DESCRIPTION("LM8323 keypad driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags