Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Input driver for Microchip CAP11xx based capacitive touch sensors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * (c) 2014 Daniel Mack <linux@zonque.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define CAP11XX_REG_MAIN_CONTROL	0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define CAP11XX_REG_MAIN_CONTROL_GAIN_SHIFT	(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define CAP11XX_REG_MAIN_CONTROL_GAIN_MASK	(0xc0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define CAP11XX_REG_MAIN_CONTROL_DLSEEP		BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define CAP11XX_REG_GENERAL_STATUS	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define CAP11XX_REG_SENSOR_INPUT	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define CAP11XX_REG_NOISE_FLAG_STATUS	0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define CAP11XX_REG_SENOR_DELTA(X)	(0x10 + (X))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define CAP11XX_REG_SENSITIVITY_CONTROL	0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define CAP11XX_REG_CONFIG		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define CAP11XX_REG_SENSOR_ENABLE	0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define CAP11XX_REG_SENSOR_CONFIG	0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define CAP11XX_REG_SENSOR_CONFIG2	0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define CAP11XX_REG_SAMPLING_CONFIG	0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define CAP11XX_REG_CALIBRATION		0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define CAP11XX_REG_INT_ENABLE		0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define CAP11XX_REG_REPEAT_RATE		0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define CAP11XX_REG_MT_CONFIG		0x2a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define CAP11XX_REG_MT_PATTERN_CONFIG	0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define CAP11XX_REG_MT_PATTERN		0x2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define CAP11XX_REG_RECALIB_CONFIG	0x2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CAP11XX_REG_SENSOR_THRESH(X)	(0x30 + (X))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define CAP11XX_REG_SENSOR_NOISE_THRESH	0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define CAP11XX_REG_STANDBY_CHANNEL	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define CAP11XX_REG_STANDBY_CONFIG	0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define CAP11XX_REG_STANDBY_SENSITIVITY	0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define CAP11XX_REG_STANDBY_THRESH	0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define CAP11XX_REG_CONFIG2		0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define CAP11XX_REG_CONFIG2_ALT_POL	BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define CAP11XX_REG_SENSOR_BASE_CNT(X)	(0x50 + (X))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define CAP11XX_REG_LED_POLARITY	0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define CAP11XX_REG_LED_OUTPUT_CONTROL	0x74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define CAP11XX_REG_LED_DUTY_CYCLE_1	0x90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define CAP11XX_REG_LED_DUTY_CYCLE_2	0x91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define CAP11XX_REG_LED_DUTY_CYCLE_3	0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define CAP11XX_REG_LED_DUTY_CYCLE_4	0x93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define CAP11XX_REG_LED_DUTY_MIN_MASK	(0x0f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define CAP11XX_REG_LED_DUTY_MIN_MASK_SHIFT	(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define CAP11XX_REG_LED_DUTY_MAX_MASK	(0xf0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define CAP11XX_REG_LED_DUTY_MAX_MASK_SHIFT	(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define CAP11XX_REG_LED_DUTY_MAX_VALUE	(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define CAP11XX_REG_SENSOR_CALIB	(0xb1 + (X))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define CAP11XX_REG_SENSOR_CALIB_LSB1	0xb9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define CAP11XX_REG_SENSOR_CALIB_LSB2	0xba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define CAP11XX_REG_PRODUCT_ID		0xfd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define CAP11XX_REG_MANUFACTURER_ID	0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define CAP11XX_REG_REVISION		0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define CAP11XX_MANUFACTURER_ID	0x5d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #ifdef CONFIG_LEDS_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) struct cap11xx_led {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct cap11xx_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	struct led_classdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) struct cap11xx_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct input_dev *idev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct cap11xx_led *leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	int num_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	/* config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	u32 keycodes[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) struct cap11xx_hw_model {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	u8 product_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	unsigned int num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	unsigned int num_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	CAP1106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	CAP1126,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	CAP1188,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct cap11xx_hw_model cap11xx_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	[CAP1106] = { .product_id = 0x55, .num_channels = 6, .num_leds = 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	[CAP1126] = { .product_id = 0x53, .num_channels = 6, .num_leds = 2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	[CAP1188] = { .product_id = 0x50, .num_channels = 8, .num_leds = 8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static const struct reg_default cap11xx_reg_defaults[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	{ CAP11XX_REG_MAIN_CONTROL,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	{ CAP11XX_REG_GENERAL_STATUS,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	{ CAP11XX_REG_SENSOR_INPUT,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	{ CAP11XX_REG_NOISE_FLAG_STATUS,	0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	{ CAP11XX_REG_SENSITIVITY_CONTROL,	0x2f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	{ CAP11XX_REG_CONFIG,			0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	{ CAP11XX_REG_SENSOR_ENABLE,		0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	{ CAP11XX_REG_SENSOR_CONFIG,		0xa4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	{ CAP11XX_REG_SENSOR_CONFIG2,		0x07 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	{ CAP11XX_REG_SAMPLING_CONFIG,		0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	{ CAP11XX_REG_CALIBRATION,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	{ CAP11XX_REG_INT_ENABLE,		0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	{ CAP11XX_REG_REPEAT_RATE,		0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	{ CAP11XX_REG_MT_CONFIG,		0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	{ CAP11XX_REG_MT_PATTERN_CONFIG,	0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	{ CAP11XX_REG_MT_PATTERN,		0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	{ CAP11XX_REG_RECALIB_CONFIG,		0x8a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	{ CAP11XX_REG_SENSOR_THRESH(0),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	{ CAP11XX_REG_SENSOR_THRESH(1),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	{ CAP11XX_REG_SENSOR_THRESH(2),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	{ CAP11XX_REG_SENSOR_THRESH(3),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	{ CAP11XX_REG_SENSOR_THRESH(4),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	{ CAP11XX_REG_SENSOR_THRESH(5),		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	{ CAP11XX_REG_SENSOR_NOISE_THRESH,	0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	{ CAP11XX_REG_STANDBY_CHANNEL,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	{ CAP11XX_REG_STANDBY_CONFIG,		0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	{ CAP11XX_REG_STANDBY_SENSITIVITY,	0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	{ CAP11XX_REG_STANDBY_THRESH,		0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	{ CAP11XX_REG_CONFIG2,			0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	{ CAP11XX_REG_LED_POLARITY,		0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	{ CAP11XX_REG_SENSOR_CALIB_LSB1,	0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	{ CAP11XX_REG_SENSOR_CALIB_LSB2,	0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static bool cap11xx_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	case CAP11XX_REG_MAIN_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	case CAP11XX_REG_SENSOR_INPUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	case CAP11XX_REG_SENOR_DELTA(0):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	case CAP11XX_REG_SENOR_DELTA(1):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	case CAP11XX_REG_SENOR_DELTA(2):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	case CAP11XX_REG_SENOR_DELTA(3):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	case CAP11XX_REG_SENOR_DELTA(4):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	case CAP11XX_REG_SENOR_DELTA(5):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	case CAP11XX_REG_PRODUCT_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	case CAP11XX_REG_MANUFACTURER_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	case CAP11XX_REG_REVISION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static const struct regmap_config cap11xx_regmap_config = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.reg_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	.val_bits = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.max_register = CAP11XX_REG_REVISION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.reg_defaults = cap11xx_reg_defaults,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.num_reg_defaults = ARRAY_SIZE(cap11xx_reg_defaults),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.volatile_reg = cap11xx_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static irqreturn_t cap11xx_thread_func(int irq_num, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	struct cap11xx_priv *priv = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	unsigned int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	 * Deassert interrupt. This needs to be done before reading the status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	 * registers, which will not carry valid values otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	ret = regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	ret = regmap_read(priv->regmap, CAP11XX_REG_SENSOR_INPUT, &status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	for (i = 0; i < priv->idev->keycodemax; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		input_report_key(priv->idev, priv->keycodes[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 				 status & (1 << i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	input_sync(priv->idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int cap11xx_set_sleep(struct cap11xx_priv *priv, bool sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	 * DLSEEP mode will turn off all LEDS, prevent this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (IS_ENABLED(CONFIG_LEDS_CLASS) && priv->num_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	return regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 				  CAP11XX_REG_MAIN_CONTROL_DLSEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 				  sleep ? CAP11XX_REG_MAIN_CONTROL_DLSEEP : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int cap11xx_input_open(struct input_dev *idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct cap11xx_priv *priv = input_get_drvdata(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return cap11xx_set_sleep(priv, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static void cap11xx_input_close(struct input_dev *idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct cap11xx_priv *priv = input_get_drvdata(idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	cap11xx_set_sleep(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #ifdef CONFIG_LEDS_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int cap11xx_led_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 			    enum led_brightness value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	struct cap11xx_led *led = container_of(cdev, struct cap11xx_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	struct cap11xx_priv *priv = led->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	 * All LEDs share the same duty cycle as this is a HW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	 * limitation. Brightness levels per LED are either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	 * 0 (OFF) and 1 (ON).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return regmap_update_bits(priv->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 				  CAP11XX_REG_LED_OUTPUT_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 				  BIT(led->reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 				  value ? BIT(led->reg) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static int cap11xx_init_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			     struct cap11xx_priv *priv, int num_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	struct device_node *node = dev->of_node, *child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	struct cap11xx_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	int cnt = of_get_child_count(node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	if (!num_leds || !cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	if (cnt > num_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	led = devm_kcalloc(dev, cnt, sizeof(struct cap11xx_led), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (!led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	priv->leds = led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	error = regmap_update_bits(priv->regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 				CAP11XX_REG_LED_OUTPUT_CONTROL, 0xff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	error = regmap_update_bits(priv->regmap, CAP11XX_REG_LED_DUTY_CYCLE_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 				CAP11XX_REG_LED_DUTY_MAX_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 				CAP11XX_REG_LED_DUTY_MAX_VALUE <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 				CAP11XX_REG_LED_DUTY_MAX_MASK_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	for_each_child_of_node(node, child) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		led->cdev.name =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 			of_get_property(child, "label", NULL) ? : child->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		led->cdev.default_trigger =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			of_get_property(child, "linux,default-trigger", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		led->cdev.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		led->cdev.brightness_set_blocking = cap11xx_led_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		led->cdev.max_brightness = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		led->cdev.brightness = LED_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		error = of_property_read_u32(child, "reg", &reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		if (error != 0 || reg >= num_leds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 			of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		led->reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		led->priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		error = devm_led_classdev_register(dev, &led->cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			of_node_put(child);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		priv->num_leds++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		led++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int cap11xx_init_leds(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 			     struct cap11xx_priv *priv, int num_leds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static int cap11xx_i2c_probe(struct i2c_client *i2c_client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			     const struct i2c_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	struct device *dev = &i2c_client->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	struct cap11xx_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	struct device_node *node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	const struct cap11xx_hw_model *cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	int i, error, irq, gain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	unsigned int val, rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	u32 gain32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	if (id->driver_data >= ARRAY_SIZE(cap11xx_devices)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		dev_err(dev, "Invalid device ID %lu\n", id->driver_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	cap = &cap11xx_devices[id->driver_data];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	if (!cap || !cap->num_channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		dev_err(dev, "Invalid device configuration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	priv = devm_kzalloc(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			    struct_size(priv, keycodes, cap->num_channels),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			    GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	priv->regmap = devm_regmap_init_i2c(i2c_client, &cap11xx_regmap_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	if (IS_ERR(priv->regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		return PTR_ERR(priv->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	error = regmap_read(priv->regmap, CAP11XX_REG_PRODUCT_ID, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	if (val != cap->product_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		dev_err(dev, "Product ID: Got 0x%02x, expected 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			val, cap->product_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	error = regmap_read(priv->regmap, CAP11XX_REG_MANUFACTURER_ID, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	if (val != CAP11XX_MANUFACTURER_ID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		dev_err(dev, "Manufacturer ID: Got 0x%02x, expected 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 			val, CAP11XX_MANUFACTURER_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	error = regmap_read(priv->regmap, CAP11XX_REG_REVISION, &rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	if (error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	dev_info(dev, "CAP11XX detected, revision 0x%02x\n", rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	node = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (!of_property_read_u32(node, "microchip,sensor-gain", &gain32)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		if (is_power_of_2(gain32) && gain32 <= 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 			gain = ilog2(gain32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			dev_err(dev, "Invalid sensor-gain value %d\n", gain32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	if (of_property_read_bool(node, "microchip,irq-active-high")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		error = regmap_update_bits(priv->regmap, CAP11XX_REG_CONFIG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 					   CAP11XX_REG_CONFIG2_ALT_POL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 		if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 			return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	/* Provide some useful defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	for (i = 0; i < cap->num_channels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		priv->keycodes[i] = KEY_A + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	of_property_read_u32_array(node, "linux,keycodes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 				   priv->keycodes, cap->num_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	error = regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 				   CAP11XX_REG_MAIN_CONTROL_GAIN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 				   gain << CAP11XX_REG_MAIN_CONTROL_GAIN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	/* Disable autorepeat. The Linux input system has its own handling. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	error = regmap_write(priv->regmap, CAP11XX_REG_REPEAT_RATE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	priv->idev = devm_input_allocate_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	if (!priv->idev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	priv->idev->name = "CAP11XX capacitive touch sensor";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	priv->idev->id.bustype = BUS_I2C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	priv->idev->evbit[0] = BIT_MASK(EV_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	if (of_property_read_bool(node, "autorepeat"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		__set_bit(EV_REP, priv->idev->evbit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	for (i = 0; i < cap->num_channels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		__set_bit(priv->keycodes[i], priv->idev->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	__clear_bit(KEY_RESERVED, priv->idev->keybit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	priv->idev->keycode = priv->keycodes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	priv->idev->keycodesize = sizeof(priv->keycodes[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	priv->idev->keycodemax = cap->num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	priv->idev->id.vendor = CAP11XX_MANUFACTURER_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	priv->idev->id.product = cap->product_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	priv->idev->id.version = rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	priv->idev->open = cap11xx_input_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	priv->idev->close = cap11xx_input_close;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	error = cap11xx_init_leds(dev, priv, cap->num_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	input_set_drvdata(priv->idev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	 * Put the device in deep sleep mode for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	 * ->open() will bring it back once the it is actually needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	cap11xx_set_sleep(priv, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	error = input_register_device(priv->idev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	irq = irq_of_parse_and_map(node, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	if (!irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		dev_err(dev, "Unable to parse or map IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	error = devm_request_threaded_irq(dev, irq, NULL, cap11xx_thread_func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 					  IRQF_ONESHOT, dev_name(dev), priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static const struct of_device_id cap11xx_dt_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	{ .compatible = "microchip,cap1106", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	{ .compatible = "microchip,cap1126", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	{ .compatible = "microchip,cap1188", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) MODULE_DEVICE_TABLE(of, cap11xx_dt_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static const struct i2c_device_id cap11xx_i2c_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	{ "cap1106", CAP1106 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	{ "cap1126", CAP1126 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	{ "cap1188", CAP1188 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) MODULE_DEVICE_TABLE(i2c, cap11xx_i2c_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static struct i2c_driver cap11xx_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 		.name	= "cap11xx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 		.of_match_table = cap11xx_dt_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	.id_table	= cap11xx_i2c_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	.probe		= cap11xx_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) module_i2c_driver(cap11xx_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) MODULE_DESCRIPTION("Microchip CAP11XX driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) MODULE_AUTHOR("Daniel Mack <linux@zonque.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) MODULE_LICENSE("GPL v2");