Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) /* Authors: Bernard Metzler <bmt@zurich.ibm.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) /* Copyright (c) 2008-2019, IBM Corporation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #ifndef _IWARP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #define _IWARP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <rdma/rdma_user_cm.h> /* RDMA_MAX_PRIVATE_DATA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define RDMAP_VERSION 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define DDP_VERSION 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define MPA_REVISION_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define MPA_REVISION_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define MPA_MAX_PRIVDATA RDMA_MAX_PRIVATE_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define MPA_KEY_REQ "MPA ID Req Frame"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define MPA_KEY_REP "MPA ID Rep Frame"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define MPA_IRD_ORD_MASK 0x3fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct mpa_rr_params {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	__be16 bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	__be16 pd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * MPA request/response header bits & fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	MPA_RR_FLAG_MARKERS = cpu_to_be16(0x8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	MPA_RR_FLAG_CRC = cpu_to_be16(0x4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	MPA_RR_FLAG_REJECT = cpu_to_be16(0x2000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	MPA_RR_FLAG_ENHANCED = cpu_to_be16(0x1000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	MPA_RR_FLAG_GSO_EXP = cpu_to_be16(0x0800),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	MPA_RR_MASK_REVISION = cpu_to_be16(0x00ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * MPA request/reply header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) struct mpa_rr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	__u8 key[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct mpa_rr_params params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static inline void __mpa_rr_set_revision(__be16 *bits, u8 rev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	*bits = (*bits & ~MPA_RR_MASK_REVISION) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		(cpu_to_be16(rev) & MPA_RR_MASK_REVISION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static inline u8 __mpa_rr_revision(__be16 mpa_rr_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	__be16 rev = mpa_rr_bits & MPA_RR_MASK_REVISION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	return be16_to_cpu(rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) enum mpa_v2_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	MPA_V2_PEER_TO_PEER = cpu_to_be16(0x8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	MPA_V2_ZERO_LENGTH_RTR = cpu_to_be16(0x4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	MPA_V2_RDMA_WRITE_RTR = cpu_to_be16(0x8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	MPA_V2_RDMA_READ_RTR = cpu_to_be16(0x4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	MPA_V2_RDMA_NO_RTR = cpu_to_be16(0x0000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	MPA_V2_MASK_IRD_ORD = cpu_to_be16(0x3fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) struct mpa_v2_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	__be16 ird;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	__be16 ord;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) struct mpa_marker {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	__be16 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	__be16 fpdu_hmd; /* FPDU header-marker distance (= MPA's FPDUPTR) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * maximum MPA trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) struct mpa_trailer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	__u8 pad[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	__be32 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define MPA_HDR_SIZE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define MPA_CRC_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * Common portion of iWARP headers (MPA, DDP, RDMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * for any FPDU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) struct iwarp_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	__be16 mpa_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	__be16 ddp_rdmap_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  * DDP/RDMAP Hdr bits & fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	DDP_FLAG_TAGGED = cpu_to_be16(0x8000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	DDP_FLAG_LAST = cpu_to_be16(0x4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	DDP_MASK_RESERVED = cpu_to_be16(0x3C00),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	DDP_MASK_VERSION = cpu_to_be16(0x0300),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	RDMAP_MASK_VERSION = cpu_to_be16(0x00C0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	RDMAP_MASK_RESERVED = cpu_to_be16(0x0030),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	RDMAP_MASK_OPCODE = cpu_to_be16(0x000f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static inline u8 __ddp_get_version(struct iwarp_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return be16_to_cpu(ctrl->ddp_rdmap_ctrl & DDP_MASK_VERSION) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static inline void __ddp_set_version(struct iwarp_ctrl *ctrl, u8 version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	ctrl->ddp_rdmap_ctrl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		(ctrl->ddp_rdmap_ctrl & ~DDP_MASK_VERSION) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		(cpu_to_be16((u16)version << 8) & DDP_MASK_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static inline u8 __rdmap_get_version(struct iwarp_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	__be16 ver = ctrl->ddp_rdmap_ctrl & RDMAP_MASK_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	return be16_to_cpu(ver) >> 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static inline void __rdmap_set_version(struct iwarp_ctrl *ctrl, u8 version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	ctrl->ddp_rdmap_ctrl = (ctrl->ddp_rdmap_ctrl & ~RDMAP_MASK_VERSION) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			       (cpu_to_be16(version << 6) & RDMAP_MASK_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static inline u8 __rdmap_get_opcode(struct iwarp_ctrl *ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return be16_to_cpu(ctrl->ddp_rdmap_ctrl & RDMAP_MASK_OPCODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static inline void __rdmap_set_opcode(struct iwarp_ctrl *ctrl, u8 opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ctrl->ddp_rdmap_ctrl = (ctrl->ddp_rdmap_ctrl & ~RDMAP_MASK_OPCODE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			       (cpu_to_be16(opcode) & RDMAP_MASK_OPCODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct iwarp_rdma_write {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	__be32 sink_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	__be64 sink_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct iwarp_rdma_rreq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	__be32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	__be32 ddp_qn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	__be32 ddp_msn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	__be32 ddp_mo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	__be32 sink_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	__be64 sink_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	__be32 read_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	__be32 source_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	__be64 source_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct iwarp_rdma_rresp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	__be32 sink_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	__be64 sink_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct iwarp_send {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	__be32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	__be32 ddp_qn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	__be32 ddp_msn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	__be32 ddp_mo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct iwarp_send_inv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	__be32 inval_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	__be32 ddp_qn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	__be32 ddp_msn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	__be32 ddp_mo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct iwarp_terminate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	__be32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	__be32 ddp_qn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	__be32 ddp_msn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	__be32 ddp_mo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #if defined(__LITTLE_ENDIAN_BITFIELD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	__be32 layer : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	__be32 etype : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	__be32 ecode : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	__be32 flag_m : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	__be32 flag_d : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	__be32 flag_r : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	__be32 reserved : 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #elif defined(__BIG_ENDIAN_BITFIELD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	__be32 reserved : 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	__be32 flag_r : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	__be32 flag_d : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	__be32 flag_m : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	__be32 ecode : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	__be32 etype : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	__be32 layer : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #error "undefined byte order"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)  * Terminate Hdr bits & fields
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	TERM_MASK_LAYER = cpu_to_be32(0xf0000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	TERM_MASK_ETYPE = cpu_to_be32(0x0f000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	TERM_MASK_ECODE = cpu_to_be32(0x00ff0000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	TERM_FLAG_M = cpu_to_be32(0x00008000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	TERM_FLAG_D = cpu_to_be32(0x00004000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	TERM_FLAG_R = cpu_to_be32(0x00002000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	TERM_MASK_RESVD = cpu_to_be32(0x00001fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static inline u8 __rdmap_term_layer(struct iwarp_terminate *term)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	return term->layer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static inline void __rdmap_term_set_layer(struct iwarp_terminate *term,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 					  u8 layer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	term->layer = layer & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static inline u8 __rdmap_term_etype(struct iwarp_terminate *term)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	return term->etype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static inline void __rdmap_term_set_etype(struct iwarp_terminate *term,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 					  u8 etype)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	term->etype = etype & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static inline u8 __rdmap_term_ecode(struct iwarp_terminate *term)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	return term->ecode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static inline void __rdmap_term_set_ecode(struct iwarp_terminate *term,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 					  u8 ecode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	term->ecode = ecode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)  * Common portion of iWARP headers (MPA, DDP, RDMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)  * for an FPDU carrying an untagged DDP segment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct iwarp_ctrl_untagged {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	__be32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	__be32 ddp_qn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	__be32 ddp_msn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	__be32 ddp_mo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)  * Common portion of iWARP headers (MPA, DDP, RDMAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)  * for an FPDU carrying a tagged DDP segment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct iwarp_ctrl_tagged {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	__be32 ddp_stag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	__be64 ddp_to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) union iwarp_hdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	struct iwarp_ctrl ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct iwarp_ctrl_untagged c_untagged;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	struct iwarp_ctrl_tagged c_tagged;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct iwarp_rdma_write rwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	struct iwarp_rdma_rreq rreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct iwarp_rdma_rresp rresp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	struct iwarp_terminate terminate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	struct iwarp_send send;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct iwarp_send_inv send_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) enum term_elayer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	TERM_ERROR_LAYER_RDMAP = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	TERM_ERROR_LAYER_DDP = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	TERM_ERROR_LAYER_LLP = 0x02 /* eg., MPA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) enum ddp_etype {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	DDP_ETYPE_CATASTROPHIC = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	DDP_ETYPE_TAGGED_BUF = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	DDP_ETYPE_UNTAGGED_BUF = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	DDP_ETYPE_RSVD = 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) enum ddp_ecode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	/* unspecified, set to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	DDP_ECODE_CATASTROPHIC = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	/* Tagged Buffer Errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	DDP_ECODE_T_INVALID_STAG = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	DDP_ECODE_T_BASE_BOUNDS = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	DDP_ECODE_T_STAG_NOT_ASSOC = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	DDP_ECODE_T_TO_WRAP = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	DDP_ECODE_T_VERSION = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	/* Untagged Buffer Errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	DDP_ECODE_UT_INVALID_QN = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	DDP_ECODE_UT_INVALID_MSN_NOBUF = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	DDP_ECODE_UT_INVALID_MSN_RANGE = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	DDP_ECODE_UT_INVALID_MO = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	DDP_ECODE_UT_MSG_TOOLONG = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	DDP_ECODE_UT_VERSION = 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) enum rdmap_untagged_qn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	RDMAP_UNTAGGED_QN_SEND = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	RDMAP_UNTAGGED_QN_RDMA_READ = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	RDMAP_UNTAGGED_QN_TERMINATE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	RDMAP_UNTAGGED_QN_COUNT = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) enum rdmap_etype {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	RDMAP_ETYPE_CATASTROPHIC = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	RDMAP_ETYPE_REMOTE_PROTECTION = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	RDMAP_ETYPE_REMOTE_OPERATION = 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) enum rdmap_ecode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	RDMAP_ECODE_INVALID_STAG = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	RDMAP_ECODE_BASE_BOUNDS = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	RDMAP_ECODE_ACCESS_RIGHTS = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	RDMAP_ECODE_STAG_NOT_ASSOC = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	RDMAP_ECODE_TO_WRAP = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	RDMAP_ECODE_VERSION = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	RDMAP_ECODE_OPCODE = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	RDMAP_ECODE_CATASTROPHIC_STREAM = 0x07,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	RDMAP_ECODE_CATASTROPHIC_GLOBAL = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	RDMAP_ECODE_CANNOT_INVALIDATE = 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	RDMAP_ECODE_UNSPECIFIED = 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) enum llp_ecode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	LLP_ECODE_TCP_STREAM_LOST = 0x01, /* How to transfer this ?? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	LLP_ECODE_RECEIVED_CRC = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	LLP_ECODE_FPDU_START = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	LLP_ECODE_INVALID_REQ_RESP = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	/* Errors for Enhanced Connection Establishment only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	LLP_ECODE_LOCAL_CATASTROPHIC = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	LLP_ECODE_INSUFFICIENT_IRD = 0x06,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	LLP_ECODE_NO_MATCHING_RTR = 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) enum llp_etype { LLP_ETYPE_MPA = 0x00 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) enum rdma_opcode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	RDMAP_RDMA_WRITE = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	RDMAP_RDMA_READ_REQ = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	RDMAP_RDMA_READ_RESP = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	RDMAP_SEND = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	RDMAP_SEND_INVAL = 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	RDMAP_SEND_SE = 0x5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	RDMAP_SEND_SE_INVAL = 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	RDMAP_TERMINATE = 0x7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	RDMAP_NOT_SUPPORTED = RDMAP_TERMINATE + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #endif