^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * licenses. You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * COPYING in the main directory of this source tree, or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * OpenIB.org BSD license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Redistribution and use in source and binary forms, with or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * without modification, are permitted provided that the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * conditions are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * - Redistributions of source code must retain the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * - Redistributions in binary form must reproduce the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * disclaimer in the documentation and/or other materials
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <rdma/ib_addr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <rdma/ib_cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/inet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/mlx4/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "mlx4_ib.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static void create_ib_ah(struct ib_ah *ib_ah, struct rdma_ah_attr *ah_attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct mlx4_ib_ah *ah = to_mah(ib_ah);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct mlx4_dev *dev = to_mdev(ib_ah->device)->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ah->av.ib.port_pd = cpu_to_be32(to_mpd(ib_ah->pd)->pdn |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) (rdma_ah_get_port_num(ah_attr) << 24));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ah->av.ib.g_slid = rdma_ah_get_path_bits(ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ah->av.ib.sl_tclass_flowlabel =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) cpu_to_be32(rdma_ah_get_sl(ah_attr) << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ah->av.ib.g_slid |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ah->av.ib.gid_index = grh->sgid_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ah->av.ib.hop_limit = grh->hop_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ah->av.ib.sl_tclass_flowlabel |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) cpu_to_be32((grh->traffic_class << 20) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) grh->flow_label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) memcpy(ah->av.ib.dgid, grh->dgid.raw, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ah->av.ib.dlid = cpu_to_be16(rdma_ah_get_dlid(ah_attr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (rdma_ah_get_static_rate(ah_attr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 static_rate = rdma_ah_get_static_rate(ah_attr) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MLX4_STAT_RATE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) while (static_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) !(1 << static_rate & dev->caps.stat_rate_support))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) --static_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ah->av.ib.stat_rate = static_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int create_iboe_ah(struct ib_ah *ib_ah, struct rdma_ah_attr *ah_attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct mlx4_ib_dev *ibdev = to_mdev(ib_ah->device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct mlx4_ib_ah *ah = to_mah(ib_ah);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) const struct ib_gid_attr *gid_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct mlx4_dev *dev = ibdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int is_mcast = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct in6_addr in6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u16 vlan_tag = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) const struct ib_global_route *grh = rdma_ah_read_grh(ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) memcpy(&in6, grh->dgid.raw, sizeof(in6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (rdma_is_multicast_addr(&in6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) is_mcast = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) memcpy(ah->av.eth.mac, ah_attr->roce.dmac, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) eth_zero_addr(ah->av.eth.s_mac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * If sgid_attr is NULL we are being called by mlx4_ib_create_ah_slave
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * and we are directly creating an AV for a slave's gid_index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) gid_attr = ah_attr->grh.sgid_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (gid_attr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ret = rdma_read_gid_l2_fields(gid_attr, &vlan_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) &ah->av.eth.s_mac[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = mlx4_ib_gid_index_to_real_index(ibdev, gid_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ah->av.eth.gid_index = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* mlx4_ib_create_ah_slave fills in the s_mac and the vlan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ah->av.eth.gid_index = ah_attr->grh.sgid_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (vlan_tag < 0x1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) vlan_tag |= (rdma_ah_get_sl(ah_attr) & 7) << 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ah->av.eth.port_pd = cpu_to_be32(to_mpd(ib_ah->pd)->pdn |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) (rdma_ah_get_port_num(ah_attr) << 24));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ah->av.eth.vlan = cpu_to_be16(vlan_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ah->av.eth.hop_limit = grh->hop_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (rdma_ah_get_static_rate(ah_attr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ah->av.eth.stat_rate = rdma_ah_get_static_rate(ah_attr) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) MLX4_STAT_RATE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) while (ah->av.eth.stat_rate > IB_RATE_2_5_GBPS + MLX4_STAT_RATE_OFFSET &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) !(1 << ah->av.eth.stat_rate & dev->caps.stat_rate_support))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) --ah->av.eth.stat_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ah->av.eth.sl_tclass_flowlabel |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) cpu_to_be32((grh->traffic_class << 20) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) grh->flow_label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * HW requires multicast LID so we just choose one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (is_mcast)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ah->av.ib.dlid = cpu_to_be16(0xc000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) memcpy(ah->av.eth.dgid, grh->dgid.raw, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ah->av.eth.sl_tclass_flowlabel |= cpu_to_be32(rdma_ah_get_sl(ah_attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) << 29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int mlx4_ib_create_ah(struct ib_ah *ib_ah, struct rdma_ah_init_attr *init_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct ib_udata *udata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct rdma_ah_attr *ah_attr = init_attr->ah_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (!(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * TBD: need to handle the case when we get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * called in an atomic context and there we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * might sleep. We don't expect this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * currently since we're working with link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * local addresses which we can translate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * without going to sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return create_iboe_ah(ib_ah, ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) create_ib_ah(ib_ah, ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int mlx4_ib_create_ah_slave(struct ib_ah *ah, struct rdma_ah_attr *ah_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int slave_sgid_index, u8 *s_mac, u16 vlan_tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct rdma_ah_attr slave_attr = *ah_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct rdma_ah_init_attr init_attr = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct mlx4_ib_ah *mah = to_mah(ah);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) slave_attr.grh.sgid_attr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) slave_attr.grh.sgid_index = slave_sgid_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) init_attr.ah_attr = &slave_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ret = mlx4_ib_create_ah(ah, &init_attr, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ah->type = ah_attr->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* get rid of force-loopback bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) mah->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) memcpy(mah->av.eth.s_mac, s_mac, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (vlan_tag < 0x1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) vlan_tag |= (rdma_ah_get_sl(ah_attr) & 7) << 13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) mah->av.eth.vlan = cpu_to_be16(vlan_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int mlx4_ib_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct mlx4_ib_ah *ah = to_mah(ibah);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int port_num = be32_to_cpu(ah->av.ib.port_pd) >> 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) memset(ah_attr, 0, sizeof *ah_attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ah_attr->type = ibah->type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) rdma_ah_set_dlid(ah_attr, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) rdma_ah_set_sl(ah_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) be32_to_cpu(ah->av.eth.sl_tclass_flowlabel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) >> 29);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) rdma_ah_set_dlid(ah_attr, be16_to_cpu(ah->av.ib.dlid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) rdma_ah_set_sl(ah_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) be32_to_cpu(ah->av.ib.sl_tclass_flowlabel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) >> 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) rdma_ah_set_port_num(ah_attr, port_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (ah->av.ib.stat_rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) rdma_ah_set_static_rate(ah_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ah->av.ib.stat_rate -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) MLX4_STAT_RATE_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) rdma_ah_set_path_bits(ah_attr, ah->av.ib.g_slid & 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (mlx4_ib_ah_grh_present(ah)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u32 tc_fl = be32_to_cpu(ah->av.ib.sl_tclass_flowlabel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) rdma_ah_set_grh(ah_attr, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) tc_fl & 0xfffff, ah->av.ib.gid_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ah->av.ib.hop_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) tc_fl >> 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) rdma_ah_set_dgid_raw(ah_attr, ah->av.ib.dgid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }