^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * licenses. You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * COPYING in the main directory of this source tree, or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * OpenFabrics.org BSD license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Redistribution and use in source and binary forms, with or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * without modification, are permitted provided that the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * conditions are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * - Redistributions of source code must retain the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * - Redistributions in binary form must reproduce the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * disclaimer in the documentation and/or other materials
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #ifndef I40IW_IW_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define I40IW_IW_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/inetdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/crc32c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/net/intel/i40e_client.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <rdma/ib_smi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <rdma/ib_verbs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <rdma/ib_pack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <rdma/rdma_cm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <rdma/iw_cm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <crypto/hash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include "i40iw_status.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "i40iw_osdep.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include "i40iw_d.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include "i40iw_hmc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include "i40iw_type.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include "i40iw_p.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <rdma/i40iw-abi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include "i40iw_pble.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "i40iw_verbs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "i40iw_cm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include "i40iw_user.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include "i40iw_puda.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define I40IW_FW_VER_DEFAULT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define I40IW_HW_VERSION 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define I40IW_ARP_ADD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define I40IW_ARP_DELETE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define I40IW_ARP_RESOLVE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define I40IW_MACIP_ADD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define I40IW_MACIP_DELETE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define IW_CEQ_SIZE 2048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define IW_AEQ_SIZE 2048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define RX_BUF_SIZE (1536 + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define IW_REG0_SIZE (4 * 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define IW_TX_TIMEOUT (6 * HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define IW_FIRST_QPN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define IW_SW_CONTEXT_ALIGN 1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MAX_DPC_ITERATIONS 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define I40IW_EVENT_TIMEOUT 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define I40IW_VCHNL_EVENT_TIMEOUT 100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define I40IW_NO_VLAN 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define I40IW_NO_QSET 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* access to mcast filter list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define IW_ADD_MCAST false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define IW_DEL_MCAST true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define IW_CFG_FPM_QP_COUNT 32768
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define I40IW_MAX_PAGES_PER_FMR 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define I40IW_MIN_PAGES_PER_FMR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define I40IW_CQP_COMPL_RQ_WQE_FLUSHED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define I40IW_CQP_COMPL_SQ_WQE_FLUSHED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define I40IW_CQP_COMPL_RQ_SQ_WQE_FLUSHED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct i40iw_cqp_compl_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u32 op_ret_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u16 maj_err_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u16 min_err_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) bool error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u8 op_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct i40iw_cqp_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct cqp_commands_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) wait_queue_head_t waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) atomic_t refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) void (*callback_fcn)(struct i40iw_cqp_request*, u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void *param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct i40iw_cqp_compl_info compl_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) bool waiting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) bool request_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) bool dynamic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct i40iw_cqp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct i40iw_sc_cqp sc_cqp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) spinlock_t req_lock; /*cqp request list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) wait_queue_head_t waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct i40iw_dma_mem sq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct i40iw_dma_mem host_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u64 *scratch_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct i40iw_cqp_request *cqp_requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct list_head cqp_avail_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct list_head cqp_pending_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct i40iw_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct i40iw_ccq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct i40iw_sc_cq sc_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) spinlock_t lock; /* ccq control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) wait_queue_head_t waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct i40iw_dma_mem mem_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) struct i40iw_dma_mem shadow_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct i40iw_ceq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct i40iw_sc_ceq sc_ceq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct i40iw_dma_mem mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u32 irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) u32 msix_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct i40iw_device *iwdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct tasklet_struct dpc_tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct i40iw_aeq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct i40iw_sc_aeq sc_aeq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct i40iw_dma_mem mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct i40iw_arp_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u32 ip_addr[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) enum init_completion_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) INVALID_STATE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) INITIAL_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) CQP_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) HMC_OBJS_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PBLE_CHUNK_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) CCQ_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) AEQ_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) CEQ_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ILQ_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) IEQ_CREATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) IP_ADDR_REGISTERED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) RDMA_DEV_REGISTERED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct i40iw_msix_vector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u32 idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u32 irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u32 cpu_affinity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u32 ceq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) cpumask_t mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct l2params_work {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct i40iw_device *iwdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct i40iw_l2params l2params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define I40IW_MSIX_TABLE_SIZE 65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct virtchnl_work {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct work_struct work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct i40iw_cqp_request *cqp_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct i40iw_virtchnl_work_info work_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct i40e_qvlist_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct i40iw_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct i40iw_ib_device *iwibdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct net_device *netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) wait_queue_head_t vchnl_waitq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct i40iw_sc_dev sc_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct i40iw_sc_vsi vsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct i40iw_handler *hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct i40e_info *ldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct i40e_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct i40iw_hw hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct i40iw_cm_core cm_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u8 *mem_resources;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) unsigned long *allocated_qps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) unsigned long *allocated_cqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned long *allocated_mrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) unsigned long *allocated_pds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned long *allocated_arps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct i40iw_qp **qp_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) bool msix_shared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u32 msix_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct i40iw_msix_vector *iw_msixtbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct i40e_qvlist_info *iw_qvlist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct i40iw_hmc_pble_rsrc *pble_rsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct i40iw_arp_entry *arp_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct i40iw_cqp cqp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) struct i40iw_ccq ccq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u32 ceqs_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct i40iw_ceq *ceqlist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct i40iw_aeq aeq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) u32 arp_table_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u32 next_arp_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) spinlock_t resource_lock; /* hw resource access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) spinlock_t qptable_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u32 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) u32 vendor_part_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) u32 of_device_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) u32 device_cap_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) unsigned long db_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u8 resource_profile;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) u8 max_rdma_vfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) u8 max_enabled_vfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u8 max_sge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u8 iw_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) u8 send_term_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) bool push_mode; /* Initialized from parameter passed to driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* x710 specific */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct mutex pbl_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct tasklet_struct dpc_tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct workqueue_struct *virtchnl_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct i40iw_dma_mem obj_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct i40iw_dma_mem obj_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 *hmc_info_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u32 sd_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct workqueue_struct *param_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) atomic_t params_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) enum init_completion_state init_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u16 mac_ip_table_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) atomic_t vchnl_msgs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u32 max_mr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) u32 max_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u32 max_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u32 max_pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) u32 next_qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u32 next_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u32 next_pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) u32 max_mr_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u32 max_qp_wr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) u32 max_cqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) u32 mr_stagmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) u32 mpa_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) bool dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) bool closing;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) bool reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u32 used_pds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u32 used_cqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u32 used_mrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) u32 used_qps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) wait_queue_head_t close_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) atomic64_t use_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct i40iw_ib_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct ib_device ibdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct i40iw_device *iwdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct i40iw_handler {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct i40e_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct i40iw_device device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct i40e_info ldev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * i40iw_fw_major_ver - get firmware major version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * @dev: iwarp device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static inline u64 i40iw_fw_major_ver(struct i40iw_sc_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return RS_64(dev->feature_info[I40IW_FEATURE_FW_INFO],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) I40IW_FW_VER_MAJOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * i40iw_fw_minor_ver - get firmware minor version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * @dev: iwarp device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static inline u64 i40iw_fw_minor_ver(struct i40iw_sc_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return RS_64(dev->feature_info[I40IW_FEATURE_FW_INFO],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) I40IW_FW_VER_MINOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * to_iwdev - get device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * @ibdev: ib device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * to_ucontext - get user context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * @ibucontext: ib user context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * to_iwpd - get protection domain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * @ibpd: ib pd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) return container_of(ibpd, struct i40iw_pd, ibpd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * to_iwmr - get device memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @ibdev: ib memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return container_of(ibmr, struct i40iw_mr, ibmr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * to_iwmw - get device memory window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * @ibmw: ib memory window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return container_of(ibmw, struct i40iw_mr, ibmw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * to_iwcq - get completion queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * @ibcq: ib cqdevice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return container_of(ibcq, struct i40iw_cq, ibcq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * to_iwqp - get device qp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * @ibqp: ib qp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return container_of(ibqp, struct i40iw_qp, ibqp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /* i40iw.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) void i40iw_qp_add_ref(struct ib_qp *ibqp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) void i40iw_qp_rem_ref(struct ib_qp *ibqp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct ib_qp *i40iw_get_qp(struct ib_device *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) void i40iw_flush_wqes(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct i40iw_qp *qp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) unsigned char *mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u32 *ip_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) bool ipv4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) u32 action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int i40iw_manage_apbvt(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u16 accel_local_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) bool add_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * i40iw_alloc_resource - allocate a resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * @iwdev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * @resource_array: resource bit array:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * @max_resources: maximum resource number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * @req_resources_num: Allocated resource number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * @next: next free id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) unsigned long *resource_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) u32 max_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u32 *req_resource_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) u32 *next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u32 resource_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) spin_lock_irqsave(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) resource_num = find_next_zero_bit(resource_array, max_resources, *next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (resource_num >= max_resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) resource_num = find_first_zero_bit(resource_array, max_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (resource_num >= max_resources) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) spin_unlock_irqrestore(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return -EOVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) set_bit(resource_num, resource_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) *next = resource_num + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (*next == max_resources)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) *next = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) *req_resource_num = resource_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) spin_unlock_irqrestore(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * i40iw_is_resource_allocated - detrmine if resource is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * @iwdev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * @resource_array: resource array for the resource_num
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * @resource_num: resource number to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) unsigned long *resource_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u32 resource_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) bool bit_is_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) spin_lock_irqsave(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) bit_is_set = test_bit(resource_num, resource_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) spin_unlock_irqrestore(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return bit_is_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * i40iw_free_resource - free a resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) * @iwdev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * @resource_array: resource array for the resource_num
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) * @resource_num: resource number to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static inline void i40iw_free_resource(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) unsigned long *resource_array,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) u32 resource_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) spin_lock_irqsave(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) clear_bit(resource_num, resource_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) spin_unlock_irqrestore(&iwdev->resource_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * to_iwhdl - Get the handler from the device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * @iwdev: device pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) return container_of(iw_dev, struct i40iw_handler, device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * iw_init_resources -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) int i40iw_register_rdma_device(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) void i40iw_port_ibevent(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) void i40iw_cm_disconn(struct i40iw_qp *iwqp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) void i40iw_cm_disconn_worker(void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct sk_buff *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct i40iw_cqp_request *cqp_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) u8 *mac_addr, u8 *mac_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) void i40iw_rem_devusecount(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) void i40iw_add_devusecount(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) struct i40iw_modify_qp_info *info, bool wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct i40iw_sc_qp *qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) bool suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) struct i40iw_cm_info *cminfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) enum i40iw_quad_entry_type etype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) enum i40iw_quad_hash_manage_type mtype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) void *cmnode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) bool wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) void i40iw_receive_ilq(struct i40iw_sc_vsi *vsi, struct i40iw_puda_buf *rbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) void i40iw_free_sqbuf(struct i40iw_sc_vsi *vsi, void *bufp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) void i40iw_free_qp_resources(struct i40iw_qp *iwqp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) struct i40iw_dma_mem *memptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) u32 size, u32 mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) void i40iw_request_reset(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) int i40iw_setup_cm_core(struct i40iw_device *iwdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) void i40iw_process_aeq(struct i40iw_device *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) void i40iw_next_iw_state(struct i40iw_qp *iwqp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) u8 state, u8 del_hash,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) u8 term, u8 term_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) int i40iw_send_reset(struct i40iw_cm_node *cm_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) u16 rem_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) u32 *rem_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) u16 loc_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) u32 *loc_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) bool add_refcnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) bool accelerated_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) struct i40iw_sc_qp *qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct i40iw_qp_flush_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) bool wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) void i40iw_gen_ae(struct i40iw_device *iwdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) struct i40iw_sc_qp *qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) struct i40iw_gen_ae_info *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) bool wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u64 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) u64 size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) int acc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u64 *iova_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) int i40iw_inetaddr_event(struct notifier_block *notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) void *ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) int i40iw_inet6addr_event(struct notifier_block *notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) void *ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) int i40iw_net_event(struct notifier_block *notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) void *ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) int i40iw_netdevice_event(struct notifier_block *notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) unsigned long event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) void *ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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