Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright(c) 2019 Intel Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include "aspm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) /* Time after which the timer interrupt will re-enable ASPM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define ASPM_TIMER_MS 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) /* Time for which interrupts are ignored after a timer has been scheduled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define ASPM_RESCHED_TIMER_MS (ASPM_TIMER_MS / 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /* Two interrupts within this time trigger ASPM disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define ASPM_TRIGGER_MS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define ASPM_TRIGGER_NS (ASPM_TRIGGER_MS * 1000 * 1000ull)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define ASPM_L1_SUPPORTED(reg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	((((reg) & PCI_EXP_LNKCAP_ASPMS) >> 10) & 0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) uint aspm_mode = ASPM_MODE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) module_param_named(aspm, aspm_mode, uint, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) MODULE_PARM_DESC(aspm, "PCIe ASPM: 0: disable, 1: enable, 2: dynamic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct pci_dev *parent = dd->pcidev->bus->self;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	u32 up, dn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	 * If the driver does not have access to the upstream component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	 * it cannot support ASPM L1 at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	if (!parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	dn = ASPM_L1_SUPPORTED(dn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	up = ASPM_L1_SUPPORTED(up);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	/* ASPM works on A-step but is reported as not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	return (!!dn || is_ax(dd)) && !!up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* Set L1 entrance latency for slower entry to L1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u32 l1_ent_lat = 0x4u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u32 reg32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, &reg32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	reg32 &= ~PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	reg32 |= l1_ent_lat << PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static void aspm_hw_enable_l1(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	struct pci_dev *parent = dd->pcidev->bus->self;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	 * If the driver does not have access to the upstream component,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	 * it cannot support ASPM L1 at all.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (!parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	/* Enable ASPM L1 first in upstream component and then downstream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 					   PCI_EXP_LNKCTL_ASPMC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 					   PCI_EXP_LNKCTL_ASPM_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 					   PCI_EXP_LNKCTL_ASPMC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 					   PCI_EXP_LNKCTL_ASPM_L1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) void aspm_hw_disable_l1(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct pci_dev *parent = dd->pcidev->bus->self;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* Disable ASPM L1 first in downstream component and then upstream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 					   PCI_EXP_LNKCTL_ASPMC, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	if (parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 						   PCI_EXP_LNKCTL_ASPMC, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static  void aspm_enable(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (dd->aspm_enabled || aspm_mode == ASPM_MODE_DISABLED ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	    !dd->aspm_supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	aspm_hw_enable_l1(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	dd->aspm_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) static  void aspm_disable(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (!dd->aspm_enabled || aspm_mode == ASPM_MODE_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	aspm_hw_disable_l1(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	dd->aspm_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static  void aspm_disable_inc(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	spin_lock_irqsave(&dd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	aspm_disable(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	atomic_inc(&dd->aspm_disabled_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	spin_unlock_irqrestore(&dd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static  void aspm_enable_dec(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	spin_lock_irqsave(&dd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	if (atomic_dec_and_test(&dd->aspm_disabled_cnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		aspm_enable(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	spin_unlock_irqrestore(&dd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* ASPM processing for each receive context interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) void __aspm_ctx_disable(struct hfi1_ctxtdata *rcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	bool restart_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	bool close_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	ktime_t now, prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	spin_lock_irqsave(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	/* PSM contexts are open */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	if (!rcd->aspm_intr_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		goto unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	prev = rcd->aspm_ts_last_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	now = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	rcd->aspm_ts_last_intr = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	/* An interrupt pair close together in time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	close_interrupts = ktime_to_ns(ktime_sub(now, prev)) < ASPM_TRIGGER_NS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	/* Don't push out our timer till this much time has elapsed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	restart_timer = ktime_to_ns(ktime_sub(now, rcd->aspm_ts_timer_sched)) >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 				    ASPM_RESCHED_TIMER_MS * NSEC_PER_MSEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	restart_timer = restart_timer && close_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	/* Disable ASPM and schedule timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (rcd->aspm_enabled && close_interrupts) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		aspm_disable_inc(rcd->dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		rcd->aspm_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		restart_timer = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (restart_timer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		mod_timer(&rcd->aspm_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			  jiffies + msecs_to_jiffies(ASPM_TIMER_MS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		rcd->aspm_ts_timer_sched = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* Timer function for re-enabling ASPM in the absence of interrupt activity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static  void aspm_ctx_timer_function(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	struct hfi1_ctxtdata *rcd = from_timer(rcd, t, aspm_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	spin_lock_irqsave(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	aspm_enable_dec(rcd->dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	rcd->aspm_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  * Disable interrupt processing for verbs contexts when PSM or VNIC contexts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)  * are open.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) void aspm_disable_all(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	struct hfi1_ctxtdata *rcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		rcd = hfi1_rcd_get_by_index(dd, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (rcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			del_timer_sync(&rcd->aspm_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			spin_lock_irqsave(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			rcd->aspm_intr_enable = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			hfi1_rcd_put(rcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	aspm_disable(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	atomic_set(&dd->aspm_disabled_cnt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* Re-enable interrupt processing for verbs contexts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) void aspm_enable_all(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	struct hfi1_ctxtdata *rcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	aspm_enable(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (aspm_mode != ASPM_MODE_DYNAMIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		rcd = hfi1_rcd_get_by_index(dd, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		if (rcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			spin_lock_irqsave(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			rcd->aspm_intr_enable = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			rcd->aspm_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			hfi1_rcd_put(rcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static  void aspm_ctx_init(struct hfi1_ctxtdata *rcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	spin_lock_init(&rcd->aspm_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	timer_setup(&rcd->aspm_timer, aspm_ctx_timer_function, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	rcd->aspm_intr_supported = rcd->dd->aspm_supported &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		aspm_mode == ASPM_MODE_DYNAMIC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		rcd->ctxt < rcd->dd->first_dyn_alloc_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) void aspm_init(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct hfi1_ctxtdata *rcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	spin_lock_init(&dd->aspm_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	dd->aspm_supported = aspm_hw_l1_supported(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		rcd = hfi1_rcd_get_by_index(dd, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		if (rcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 			aspm_ctx_init(rcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		hfi1_rcd_put(rcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	/* Start with ASPM disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	aspm_hw_set_l1_ent_latency(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	dd->aspm_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	aspm_hw_disable_l1(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	/* Now turn on ASPM if configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	aspm_enable_all(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) void aspm_exit(struct hfi1_devdata *dd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	aspm_disable_all(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	/* Turn on ASPM on exit to conserve power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	aspm_enable(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)