Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This software is available to you under a choice of one of two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * licenses.  You may choose to be licensed under the terms of the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * General Public License (GPL) Version 2, available from the file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * COPYING in the main directory of this source tree, or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * OpenIB.org BSD license below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *     Redistribution and use in source and binary forms, with or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *     without modification, are permitted provided that the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *     conditions are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *      - Redistributions of source code must retain the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *        copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *        disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *      - Redistributions in binary form must reproduce the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  *        copyright notice, this list of conditions and the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *        disclaimer in the documentation and/or other materials
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *        provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include <linux/rtnetlink.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <linux/inetdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #include <rdma/iw_cm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #include <rdma/ib_verbs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #include <rdma/ib_smi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #include <rdma/ib_umem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #include <rdma/ib_user_verbs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #include "iw_cxgb4.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static int fastreg_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) module_param(fastreg_support, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) MODULE_PARM_DESC(fastreg_support, "Advertise fastreg support (default=1)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static void c4iw_dealloc_ucontext(struct ib_ucontext *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct c4iw_ucontext *ucontext = to_c4iw_ucontext(context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	struct c4iw_dev *rhp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	struct c4iw_mm_entry *mm, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	pr_debug("context %p\n", context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	rhp = to_c4iw_dev(ucontext->ibucontext.device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		kfree(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	c4iw_release_dev_ucontext(&rhp->rdev, &ucontext->uctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static int c4iw_alloc_ucontext(struct ib_ucontext *ucontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			       struct ib_udata *udata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct ib_device *ibdev = ucontext->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct c4iw_ucontext *context = to_c4iw_ucontext(ucontext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct c4iw_dev *rhp = to_c4iw_dev(ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	struct c4iw_alloc_ucontext_resp uresp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct c4iw_mm_entry *mm = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	pr_debug("ibdev %p\n", ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	c4iw_init_dev_ucontext(&rhp->rdev, &context->uctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	INIT_LIST_HEAD(&context->mmaps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	spin_lock_init(&context->mmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (udata->outlen < sizeof(uresp) - sizeof(uresp.reserved)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		pr_err_once("Warning - downlevel libcxgb4 (non-fatal), device status page disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		rhp->rdev.flags |= T4_STATUS_PAGE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		mm = kmalloc(sizeof(*mm), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		if (!mm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 			ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		uresp.status_page_size = PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		spin_lock(&context->mmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		uresp.status_page_key = context->key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		context->key += PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		spin_unlock(&context->mmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		ret = ib_copy_to_udata(udata, &uresp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				       sizeof(uresp) - sizeof(uresp.reserved));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			goto err_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		mm->key = uresp.status_page_key;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		mm->addr = virt_to_phys(rhp->rdev.status_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		mm->len = PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		insert_mmap(context, mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) err_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	kfree(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static int c4iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int len = vma->vm_end - vma->vm_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	u32 key = vma->vm_pgoff << PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct c4iw_rdev *rdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	struct c4iw_mm_entry *mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct c4iw_ucontext *ucontext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	pr_debug("pgoff 0x%lx key 0x%x len %d\n", vma->vm_pgoff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		 key, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (vma->vm_start & (PAGE_SIZE-1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	rdev = &(to_c4iw_dev(context->device)->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	ucontext = to_c4iw_ucontext(context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	mm = remove_mmap(ucontext, key, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	if (!mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	addr = mm->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	kfree(mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if ((addr >= pci_resource_start(rdev->lldi.pdev, 0)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	    (addr < (pci_resource_start(rdev->lldi.pdev, 0) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		    pci_resource_len(rdev->lldi.pdev, 0)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		 * MA_SYNC register...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		ret = io_remap_pfn_range(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 					 addr >> PAGE_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 					 len, vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	} else if ((addr >= pci_resource_start(rdev->lldi.pdev, 2)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		   (addr < (pci_resource_start(rdev->lldi.pdev, 2) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		    pci_resource_len(rdev->lldi.pdev, 2)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		 * Map user DB or OCQP memory...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		if (addr >= rdev->oc_mw_pa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			vma->vm_page_prot = t4_pgprot_wc(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			if (!is_t4(rdev->lldi.adapter_type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				vma->vm_page_prot =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 					t4_pgprot_wc(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 				vma->vm_page_prot =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 					pgprot_noncached(vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		ret = io_remap_pfn_range(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 					 addr >> PAGE_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 					 len, vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		 * Map WQ or CQ contig dma memory...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		ret = remap_pfn_range(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 				      addr >> PAGE_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 				      len, vma->vm_page_prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int c4iw_deallocate_pd(struct ib_pd *pd, struct ib_udata *udata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct c4iw_dev *rhp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct c4iw_pd *php;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	php = to_c4iw_pd(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	rhp = php->rhp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	pr_debug("ibpd %p pdid 0x%x\n", pd, php->pdid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	c4iw_put_resource(&rhp->rdev.resource.pdid_table, php->pdid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	mutex_lock(&rhp->rdev.stats.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	rhp->rdev.stats.pd.cur--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	mutex_unlock(&rhp->rdev.stats.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int c4iw_allocate_pd(struct ib_pd *pd, struct ib_udata *udata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	struct c4iw_pd *php = to_c4iw_pd(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct ib_device *ibdev = pd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	u32 pdid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	struct c4iw_dev *rhp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	pr_debug("ibdev %p\n", ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	rhp = (struct c4iw_dev *) ibdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	pdid =  c4iw_get_resource(&rhp->rdev.resource.pdid_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (!pdid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	php->pdid = pdid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	php->rhp = rhp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	if (udata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		struct c4iw_alloc_pd_resp uresp = {.pdid = php->pdid};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			c4iw_deallocate_pd(&php->ibpd, udata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 			return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	mutex_lock(&rhp->rdev.stats.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	rhp->rdev.stats.pd.cur++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (rhp->rdev.stats.pd.cur > rhp->rdev.stats.pd.max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		rhp->rdev.stats.pd.max = rhp->rdev.stats.pd.cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	mutex_unlock(&rhp->rdev.stats.lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	pr_debug("pdid 0x%0x ptr 0x%p\n", pdid, php);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int c4iw_query_gid(struct ib_device *ibdev, u8 port, int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			  union ib_gid *gid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	struct c4iw_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	pr_debug("ibdev %p, port %d, index %d, gid %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		 ibdev, port, index, gid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (!port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	dev = to_c4iw_dev(ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	memset(&(gid->raw[0]), 0, sizeof(gid->raw));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	memcpy(&(gid->raw[0]), dev->rdev.lldi.ports[port-1]->dev_addr, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static int c4iw_query_device(struct ib_device *ibdev, struct ib_device_attr *props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			     struct ib_udata *uhw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	struct c4iw_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	pr_debug("ibdev %p\n", ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (uhw->inlen || uhw->outlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	dev = to_c4iw_dev(ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	memcpy(&props->sys_image_guid, dev->rdev.lldi.ports[0]->dev_addr, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	props->hw_ver = CHELSIO_CHIP_RELEASE(dev->rdev.lldi.adapter_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	props->fw_ver = dev->rdev.lldi.fw_vers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	props->device_cap_flags = dev->device_cap_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	props->page_size_cap = T4_PAGESIZE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	props->vendor_id = (u32)dev->rdev.lldi.pdev->vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	props->vendor_part_id = (u32)dev->rdev.lldi.pdev->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	props->max_mr_size = T4_MAX_MR_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	props->max_qp = dev->rdev.lldi.vr->qp.size / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	props->max_srq = dev->rdev.lldi.vr->srq.size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	props->max_qp_wr = dev->rdev.hw_queue.t4_max_qp_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	props->max_srq_wr = dev->rdev.hw_queue.t4_max_qp_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	props->max_send_sge = min(T4_MAX_SEND_SGE, T4_MAX_WRITE_SGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	props->max_recv_sge = T4_MAX_RECV_SGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	props->max_srq_sge = T4_MAX_RECV_SGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	props->max_sge_rd = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	props->max_res_rd_atom = dev->rdev.lldi.max_ird_adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	props->max_qp_rd_atom = min(dev->rdev.lldi.max_ordird_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 				    c4iw_max_read_depth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	props->max_qp_init_rd_atom = props->max_qp_rd_atom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	props->max_cq = dev->rdev.lldi.vr->qp.size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	props->max_cqe = dev->rdev.hw_queue.t4_max_cq_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	props->max_mr = c4iw_num_stags(&dev->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	props->max_pd = T4_MAX_NUM_PD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	props->local_ca_ack_delay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	props->max_fast_reg_page_list_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		t4_max_fr_depth(dev->rdev.lldi.ulptx_memwrite_dsgl && use_dsgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int c4iw_query_port(struct ib_device *ibdev, u8 port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			   struct ib_port_attr *props)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	pr_debug("ibdev %p\n", ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	ret = ib_get_eth_speed(ibdev, port, &props->active_speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			       &props->active_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	props->port_cap_flags =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	    IB_PORT_CM_SUP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	    IB_PORT_SNMP_TUNNEL_SUP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	    IB_PORT_REINIT_SUP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	    IB_PORT_DEVICE_MGMT_SUP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	    IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	props->gid_tbl_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	props->max_msg_sz = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static ssize_t hw_rev_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 			   struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	struct c4iw_dev *c4iw_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			rdma_device_to_drv_device(dev, struct c4iw_dev, ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	pr_debug("dev 0x%p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	return sprintf(buf, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		       CHELSIO_CHIP_RELEASE(c4iw_dev->rdev.lldi.adapter_type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static DEVICE_ATTR_RO(hw_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static ssize_t hca_type_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			     struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	struct c4iw_dev *c4iw_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 			rdma_device_to_drv_device(dev, struct c4iw_dev, ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	struct ethtool_drvinfo info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	struct net_device *lldev = c4iw_dev->rdev.lldi.ports[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	pr_debug("dev 0x%p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	lldev->ethtool_ops->get_drvinfo(lldev, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	return sprintf(buf, "%s\n", info.driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static DEVICE_ATTR_RO(hca_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static ssize_t board_id_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			     char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	struct c4iw_dev *c4iw_dev =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 			rdma_device_to_drv_device(dev, struct c4iw_dev, ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	pr_debug("dev 0x%p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return sprintf(buf, "%x.%x\n", c4iw_dev->rdev.lldi.pdev->vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		       c4iw_dev->rdev.lldi.pdev->device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static DEVICE_ATTR_RO(board_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) enum counters {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	IP4INSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	IP4OUTSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	IP4RETRANSSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	IP4OUTRSTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	IP6INSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	IP6OUTSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	IP6RETRANSSEGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	IP6OUTRSTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	NR_COUNTERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static const char * const names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	[IP4INSEGS] = "ip4InSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	[IP4OUTSEGS] = "ip4OutSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	[IP4RETRANSSEGS] = "ip4RetransSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	[IP4OUTRSTS] = "ip4OutRsts",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	[IP6INSEGS] = "ip6InSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	[IP6OUTSEGS] = "ip6OutSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	[IP6RETRANSSEGS] = "ip6RetransSegs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	[IP6OUTRSTS] = "ip6OutRsts"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static struct rdma_hw_stats *c4iw_alloc_stats(struct ib_device *ibdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 					      u8 port_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	BUILD_BUG_ON(ARRAY_SIZE(names) != NR_COUNTERS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	if (port_num != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	return rdma_alloc_hw_stats_struct(names, NR_COUNTERS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 					  RDMA_HW_STATS_DEFAULT_LIFESPAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static int c4iw_get_mib(struct ib_device *ibdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			struct rdma_hw_stats *stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 			u8 port, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	struct tp_tcp_stats v4, v6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	struct c4iw_dev *c4iw_dev = to_c4iw_dev(ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	cxgb4_get_tcp_stats(c4iw_dev->rdev.lldi.pdev, &v4, &v6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	stats->value[IP4INSEGS] = v4.tcp_in_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	stats->value[IP4OUTSEGS] = v4.tcp_out_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	stats->value[IP4RETRANSSEGS] = v4.tcp_retrans_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	stats->value[IP4OUTRSTS] = v4.tcp_out_rsts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	stats->value[IP6INSEGS] = v6.tcp_in_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	stats->value[IP6OUTSEGS] = v6.tcp_out_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	stats->value[IP6RETRANSSEGS] = v6.tcp_retrans_segs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	stats->value[IP6OUTRSTS] = v6.tcp_out_rsts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	return stats->num_counters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static struct attribute *c4iw_class_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	&dev_attr_hw_rev.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	&dev_attr_hca_type.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	&dev_attr_board_id.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) static const struct attribute_group c4iw_attr_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	.attrs = c4iw_class_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static int c4iw_port_immutable(struct ib_device *ibdev, u8 port_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 			       struct ib_port_immutable *immutable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	struct ib_port_attr attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	err = ib_query_port(ibdev, port_num, &attr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	immutable->gid_tbl_len = attr.gid_tbl_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static void get_dev_fw_str(struct ib_device *dev, char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	struct c4iw_dev *c4iw_dev = container_of(dev, struct c4iw_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 						 ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	pr_debug("dev 0x%p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u.%u.%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 		 FW_HDR_FW_VER_MAJOR_G(c4iw_dev->rdev.lldi.fw_vers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 		 FW_HDR_FW_VER_MINOR_G(c4iw_dev->rdev.lldi.fw_vers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 		 FW_HDR_FW_VER_MICRO_G(c4iw_dev->rdev.lldi.fw_vers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 		 FW_HDR_FW_VER_BUILD_G(c4iw_dev->rdev.lldi.fw_vers));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static const struct ib_device_ops c4iw_dev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	.owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	.driver_id = RDMA_DRIVER_CXGB4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	.uverbs_abi_ver = C4IW_UVERBS_ABI_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	.alloc_hw_stats = c4iw_alloc_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	.alloc_mr = c4iw_alloc_mr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	.alloc_mw = c4iw_alloc_mw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	.alloc_pd = c4iw_allocate_pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	.alloc_ucontext = c4iw_alloc_ucontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 	.create_cq = c4iw_create_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	.create_qp = c4iw_create_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	.create_srq = c4iw_create_srq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	.dealloc_mw = c4iw_dealloc_mw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	.dealloc_pd = c4iw_deallocate_pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 	.dealloc_ucontext = c4iw_dealloc_ucontext,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	.dereg_mr = c4iw_dereg_mr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	.destroy_cq = c4iw_destroy_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	.destroy_qp = c4iw_destroy_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	.destroy_srq = c4iw_destroy_srq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	.fill_res_cq_entry = c4iw_fill_res_cq_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 	.fill_res_cm_id_entry = c4iw_fill_res_cm_id_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 	.fill_res_mr_entry = c4iw_fill_res_mr_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	.get_dev_fw_str = get_dev_fw_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	.get_dma_mr = c4iw_get_dma_mr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 	.get_hw_stats = c4iw_get_mib,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 	.get_port_immutable = c4iw_port_immutable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	.iw_accept = c4iw_accept_cr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	.iw_add_ref = c4iw_qp_add_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	.iw_connect = c4iw_connect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	.iw_create_listen = c4iw_create_listen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	.iw_destroy_listen = c4iw_destroy_listen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	.iw_get_qp = c4iw_get_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	.iw_reject = c4iw_reject_cr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 	.iw_rem_ref = c4iw_qp_rem_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 	.map_mr_sg = c4iw_map_mr_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	.mmap = c4iw_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	.modify_qp = c4iw_ib_modify_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 	.modify_srq = c4iw_modify_srq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 	.poll_cq = c4iw_poll_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	.post_recv = c4iw_post_receive,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	.post_send = c4iw_post_send,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	.post_srq_recv = c4iw_post_srq_recv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 	.query_device = c4iw_query_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	.query_gid = c4iw_query_gid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	.query_port = c4iw_query_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	.query_qp = c4iw_ib_query_qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 	.reg_user_mr = c4iw_reg_user_mr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 	.req_notify_cq = c4iw_arm_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 	INIT_RDMA_OBJ_SIZE(ib_cq, c4iw_cq, ibcq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 	INIT_RDMA_OBJ_SIZE(ib_mw, c4iw_mw, ibmw),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	INIT_RDMA_OBJ_SIZE(ib_pd, c4iw_pd, ibpd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	INIT_RDMA_OBJ_SIZE(ib_srq, c4iw_srq, ibsrq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 	INIT_RDMA_OBJ_SIZE(ib_ucontext, c4iw_ucontext, ibucontext),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static int set_netdevs(struct ib_device *ib_dev, struct c4iw_rdev *rdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 	for (i = 0; i < rdev->lldi.nports; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 		ret = ib_device_set_netdev(ib_dev, rdev->lldi.ports[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 					   i + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) void c4iw_register_device(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 	struct uld_ctx *ctx = container_of(work, struct uld_ctx, reg_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	struct c4iw_dev *dev = ctx->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	pr_debug("c4iw_dev %p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 	memcpy(&dev->ibdev.node_guid, dev->rdev.lldi.ports[0]->dev_addr, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	dev->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 	if (fastreg_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 		dev->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	dev->ibdev.local_dma_lkey = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	dev->ibdev.uverbs_cmd_mask =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	    (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	    (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	    (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	    (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	    (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 	    (1ull << IB_USER_VERBS_CMD_REG_MR) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 	    (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	    (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	    (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 	    (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 	    (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) 	    (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	    (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	    (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	    (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	    (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 	    (1ull << IB_USER_VERBS_CMD_POST_SEND) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	    (1ull << IB_USER_VERBS_CMD_POST_RECV) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) 	    (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 	    (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 	    (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 	dev->ibdev.node_type = RDMA_NODE_RNIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	BUILD_BUG_ON(sizeof(C4IW_NODE_DESC) > IB_DEVICE_NODE_DESC_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 	memcpy(dev->ibdev.node_desc, C4IW_NODE_DESC, sizeof(C4IW_NODE_DESC));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	dev->ibdev.phys_port_cnt = dev->rdev.lldi.nports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	dev->ibdev.num_comp_vectors =  dev->rdev.lldi.nciq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	dev->ibdev.dev.parent = &dev->rdev.lldi.pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	memcpy(dev->ibdev.iw_ifname, dev->rdev.lldi.ports[0]->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 	       sizeof(dev->ibdev.iw_ifname));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	rdma_set_device_sysfs_group(&dev->ibdev, &c4iw_attr_group);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	ib_set_device_ops(&dev->ibdev, &c4iw_dev_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 	ret = set_netdevs(&dev->ibdev, &dev->rdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 		goto err_dealloc_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) 	dma_set_max_seg_size(&dev->rdev.lldi.pdev->dev, UINT_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 	ret = ib_register_device(&dev->ibdev, "cxgb4_%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 				 &dev->rdev.lldi.pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 		goto err_dealloc_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) err_dealloc_ctx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 	pr_err("%s - Failed registering iwarp device: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) 	       pci_name(ctx->lldi.pdev), ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	c4iw_dealloc(ctx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) void c4iw_unregister_device(struct c4iw_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 	pr_debug("c4iw_dev %p\n", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) 	ib_unregister_device(&dev->ibdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }