^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ad2s1200.c simple support for the ADI Resolver to Digital Converters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * AD2S1200/1205
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2018-2018 David Veenstra <davidjulianveenstra@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2010-2010 Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio/consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define DRV_NAME "ad2s1200"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* input clock on serial interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AD2S1200_HZ 8192000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* clock period in nano second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AD2S1200_TSCLK (1000000000 / AD2S1200_HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * struct ad2s1200_state - driver instance specific data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * @lock: protects both the GPIO pins and the rx buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * @sdev: spi device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * @sample: GPIO pin SAMPLE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * @rdvel: GPIO pin RDVEL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @rx: buffer for spi transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct ad2s1200_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct spi_device *sdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct gpio_desc *sample;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct gpio_desc *rdvel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __be16 rx ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int ad2s1200_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct ad2s1200_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case IIO_ANGL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* 2 * Pi / (2^12 - 1) ~= 0.001534355 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *val2 = 1534355;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return IIO_VAL_INT_PLUS_NANO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) case IIO_ANGL_VEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* 2 * Pi ~= 6.283185 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *val = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) *val2 = 283185;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return IIO_VAL_INT_PLUS_MICRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) gpiod_set_value(st->sample, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) gpiod_set_value(st->sample, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) gpiod_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ret = spi_read(st->sdev, &st->rx, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) switch (chan->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) case IIO_ANGL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *val = be16_to_cpup(&st->rx) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) case IIO_ANGL_VEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) *val = sign_extend32(be16_to_cpup(&st->rx) >> 4, 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* delay (2 * AD2S1200_TSCLK + 20) ns for sample pulse */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const struct iio_chan_spec ad2s1200_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .type = IIO_ANGL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .type = IIO_ANGL_VEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .indexed = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .channel = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static const struct iio_info ad2s1200_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .read_raw = ad2s1200_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int ad2s1200_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct ad2s1200_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) st->sdev = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) st->sample = devm_gpiod_get(&spi->dev, "adi,sample", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (IS_ERR(st->sample)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) dev_err(&spi->dev, "Failed to claim SAMPLE gpio: err=%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) PTR_ERR(st->sample));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return PTR_ERR(st->sample);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) st->rdvel = devm_gpiod_get(&spi->dev, "adi,rdvel", GPIOD_OUT_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (IS_ERR(st->rdvel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dev_err(&spi->dev, "Failed to claim RDVEL gpio: err=%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) PTR_ERR(st->rdvel));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return PTR_ERR(st->rdvel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) indio_dev->info = &ad2s1200_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) indio_dev->channels = ad2s1200_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) indio_dev->num_channels = ARRAY_SIZE(ad2s1200_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) indio_dev->name = spi_get_device_id(spi)->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) spi->max_speed_hz = AD2S1200_HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) spi->mode = SPI_MODE_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = spi_setup(spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev_err(&spi->dev, "spi_setup failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return devm_iio_device_register(&spi->dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static const struct of_device_id ad2s1200_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { .compatible = "adi,ad2s1200", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { .compatible = "adi,ad2s1205", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) MODULE_DEVICE_TABLE(of, ad2s1200_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static const struct spi_device_id ad2s1200_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { "ad2s1200" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { "ad2s1205" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) MODULE_DEVICE_TABLE(spi, ad2s1200_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static struct spi_driver ad2s1200_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .of_match_table = ad2s1200_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .probe = ad2s1200_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .id_table = ad2s1200_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) module_spi_driver(ad2s1200_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) MODULE_AUTHOR("David Veenstra <davidjulianveenstra@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) MODULE_DESCRIPTION("Analog Devices AD2S1200/1205 Resolver to Digital SPI driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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