Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * as3935.c - Support for AS3935 Franklin lightning sensor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2014, 2017-2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Matt Ranostay <matt.ranostay@konsulko.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/iio/iio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/iio/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/iio/trigger.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/iio/trigger_consumer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/iio/buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/iio/triggered_buffer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define AS3935_AFE_GAIN		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define AS3935_AFE_MASK		0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define AS3935_AFE_GAIN_MAX	0x1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define AS3935_AFE_PWR_BIT	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define AS3935_NFLWDTH		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define AS3935_NFLWDTH_MASK	0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define AS3935_INT		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define AS3935_INT_MASK		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define AS3935_DISTURB_INT	BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define AS3935_EVENT_INT	BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define AS3935_NOISE_INT	BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define AS3935_DATA		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define AS3935_DATA_MASK	0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define AS3935_TUNE_CAP		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define AS3935_DEFAULTS		0x3C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define AS3935_CALIBRATE	0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define AS3935_READ_DATA	BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define AS3935_ADDRESS(x)	((x) << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define MAX_PF_CAP		120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define TUNE_CAP_DIV		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) struct as3935_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct spi_device *spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	struct delayed_work work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	unsigned long noise_tripped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u32 tune_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	u32 nflwdth_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	/* Ensure timestamp is naturally aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		u8 chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		s64 timestamp __aligned(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	} scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u8 buf[2] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static const struct iio_chan_spec as3935_channels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.type           = IIO_PROXIMITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		.info_mask_separate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			BIT(IIO_CHAN_INFO_RAW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			BIT(IIO_CHAN_INFO_PROCESSED) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 			BIT(IIO_CHAN_INFO_SCALE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		.scan_index     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.scan_type = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 			.sign           = 'u',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			.realbits       = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 			.storagebits    = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	IIO_CHAN_SOFT_TIMESTAMP(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) static int as3935_read(struct as3935_state *st, unsigned int reg, int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	cmd = (AS3935_READ_DATA | AS3935_ADDRESS(reg)) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	ret = spi_w8r8(st->spi, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	*val = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int as3935_write(struct as3935_state *st,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	u8 *buf = st->buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	buf[0] = AS3935_ADDRESS(reg) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	buf[1] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return spi_write(st->spi, buf, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static ssize_t as3935_sensor_sensitivity_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 					struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 					char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int val, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	ret = as3935_read(st, AS3935_AFE_GAIN, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	val = (val & AS3935_AFE_MASK) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	return sprintf(buf, "%d\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static ssize_t as3935_sensor_sensitivity_store(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 					struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 					const char *buf, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	ret = kstrtoul((const char *) buf, 10, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	if (val > AS3935_AFE_GAIN_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	as3935_write(st, AS3935_AFE_GAIN, val << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static ssize_t as3935_noise_level_tripped_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 					struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 					char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	struct as3935_state *st = iio_priv(dev_to_iio_dev(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	ret = sprintf(buf, "%d\n", !time_after(jiffies, st->noise_tripped + HZ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static IIO_DEVICE_ATTR(sensor_sensitivity, S_IRUGO | S_IWUSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	as3935_sensor_sensitivity_show, as3935_sensor_sensitivity_store, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static IIO_DEVICE_ATTR(noise_level_tripped, S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	as3935_noise_level_tripped_show, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct attribute *as3935_attributes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	&iio_dev_attr_sensor_sensitivity.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	&iio_dev_attr_noise_level_tripped.dev_attr.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const struct attribute_group as3935_attribute_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.attrs = as3935_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int as3935_read_raw(struct iio_dev *indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 			   struct iio_chan_spec const *chan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			   int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 			   int *val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			   long m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	switch (m) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	case IIO_CHAN_INFO_PROCESSED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	case IIO_CHAN_INFO_RAW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		*val2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		ret = as3935_read(st, AS3935_DATA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		/* storm out of range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		if (*val == AS3935_DATA_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		if (m == IIO_CHAN_INFO_RAW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 			return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		if (m == IIO_CHAN_INFO_PROCESSED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 			*val *= 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	case IIO_CHAN_INFO_SCALE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		*val = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	return IIO_VAL_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static const struct iio_info as3935_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	.attrs = &as3935_attribute_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	.read_raw = &as3935_read_raw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static irqreturn_t as3935_trigger_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	struct iio_poll_func *pf = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	struct iio_dev *indio_dev = pf->indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	int val, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	ret = as3935_read(st, AS3935_DATA, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		goto err_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	st->scan.chan = val & AS3935_DATA_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	iio_push_to_buffers_with_timestamp(indio_dev, &st->scan,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 					   iio_get_time_ns(indio_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) err_read:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	iio_trigger_notify_done(indio_dev->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static const struct iio_trigger_ops iio_interrupt_trigger_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static void as3935_event_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct as3935_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	st = container_of(work, struct as3935_state, work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	ret = as3935_read(st, AS3935_INT, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		dev_warn(&st->spi->dev, "read error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	val &= AS3935_INT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	case AS3935_EVENT_INT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		iio_trigger_poll_chained(st->trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case AS3935_DISTURB_INT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	case AS3935_NOISE_INT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		st->noise_tripped = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		dev_warn(&st->spi->dev, "noise level is too high\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static irqreturn_t as3935_interrupt_handler(int irq, void *private)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct iio_dev *indio_dev = private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	 * Delay work for >2 milliseconds after an interrupt to allow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	 * estimated distance to recalculated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	schedule_delayed_work(&st->work, msecs_to_jiffies(3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static void calibrate_as3935(struct as3935_state *st)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	as3935_write(st, AS3935_DEFAULTS, 0x96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	as3935_write(st, AS3935_CALIBRATE, 0x96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	as3935_write(st, AS3935_TUNE_CAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		BIT(5) | (st->tune_cap / TUNE_CAP_DIV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	mdelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	as3935_write(st, AS3935_TUNE_CAP, (st->tune_cap / TUNE_CAP_DIV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	as3935_write(st, AS3935_NFLWDTH, st->nflwdth_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int as3935_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	int val, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	ret = as3935_read(st, AS3935_AFE_GAIN, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		goto err_suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	val |= AS3935_AFE_PWR_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	ret = as3935_write(st, AS3935_AFE_GAIN, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) err_suspend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int as3935_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	int val, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	mutex_lock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	ret = as3935_read(st, AS3935_AFE_GAIN, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		goto err_resume;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	val &= ~AS3935_AFE_PWR_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	ret = as3935_write(st, AS3935_AFE_GAIN, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	calibrate_as3935(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) err_resume:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	mutex_unlock(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static SIMPLE_DEV_PM_OPS(as3935_pm_ops, as3935_suspend, as3935_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define AS3935_PM_OPS (&as3935_pm_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define AS3935_PM_OPS NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static void as3935_stop_work(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	struct iio_dev *indio_dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	struct as3935_state *st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	cancel_delayed_work_sync(&st->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static int as3935_probe(struct spi_device *spi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	struct device *dev = &spi->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	struct iio_dev *indio_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	struct iio_trigger *trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	struct as3935_state *st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	/* Be sure lightning event interrupt is specified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	if (!spi->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		dev_err(dev, "unable to get event interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	if (!indio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	st = iio_priv(indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	st->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	spi_set_drvdata(spi, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	mutex_init(&st->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	ret = device_property_read_u32(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 			"ams,tuning-capacitor-pf", &st->tune_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		st->tune_cap = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 		dev_warn(dev, "no tuning-capacitor-pf set, defaulting to %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 			st->tune_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	if (st->tune_cap > MAX_PF_CAP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 		dev_err(dev, "wrong tuning-capacitor-pf setting of %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 			st->tune_cap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	ret = device_property_read_u32(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			"ams,nflwdth", &st->nflwdth_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	if (!ret && st->nflwdth_reg > AS3935_NFLWDTH_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 		dev_err(dev, "invalid nflwdth setting of %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			st->nflwdth_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	indio_dev->name = spi_get_device_id(spi)->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	indio_dev->channels = as3935_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	indio_dev->num_channels = ARRAY_SIZE(as3935_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	indio_dev->modes = INDIO_DIRECT_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	indio_dev->info = &as3935_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 				      indio_dev->name, indio_dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	if (!trig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	st->trig = trig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	st->noise_tripped = jiffies - HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	trig->dev.parent = indio_dev->dev.parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	iio_trigger_set_drvdata(trig, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	trig->ops = &iio_interrupt_trigger_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	ret = devm_iio_trigger_register(dev, trig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		dev_err(dev, "failed to register trigger\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 					      iio_pollfunc_store_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 					      as3935_trigger_handler, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 		dev_err(dev, "cannot setup iio trigger\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	calibrate_as3935(st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	INIT_DELAYED_WORK(&st->work, as3935_event_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	ret = devm_add_action(dev, as3935_stop_work, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 	ret = devm_request_irq(dev, spi->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 				&as3935_interrupt_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 				IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 				dev_name(dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 				indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 		dev_err(dev, "unable to request irq\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	ret = devm_iio_device_register(dev, indio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 		dev_err(dev, "unable to register device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static const struct of_device_id as3935_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	{ .compatible = "ams,as3935", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	{ /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) MODULE_DEVICE_TABLE(of, as3935_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static const struct spi_device_id as3935_id[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 	{"as3935", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) MODULE_DEVICE_TABLE(spi, as3935_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static struct spi_driver as3935_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 		.name	= "as3935",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		.of_match_table = as3935_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		.pm	= AS3935_PM_OPS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 	.probe		= as3935_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	.id_table	= as3935_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) module_spi_driver(as3935_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MODULE_DESCRIPTION("AS3935 lightning sensor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MODULE_LICENSE("GPL");